DE3584929D1 - Automatische refreshsteuerungsschaltung fuer eine dynamische halbleiterspeicherschaltung. - Google Patents

Automatische refreshsteuerungsschaltung fuer eine dynamische halbleiterspeicherschaltung.

Info

Publication number
DE3584929D1
DE3584929D1 DE8585305697T DE3584929T DE3584929D1 DE 3584929 D1 DE3584929 D1 DE 3584929D1 DE 8585305697 T DE8585305697 T DE 8585305697T DE 3584929 T DE3584929 T DE 3584929T DE 3584929 D1 DE3584929 D1 DE 3584929D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
refresh control
dynamic semiconductor
control circuit
automatic refresh
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585305697T
Other languages
English (en)
Inventor
Takayasu C O Patent Di Sakurai
Tetsuya C O Patent Divi Iizuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3584929D1 publication Critical patent/DE3584929D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
DE8585305697T 1984-08-20 1985-08-12 Automatische refreshsteuerungsschaltung fuer eine dynamische halbleiterspeicherschaltung. Expired - Lifetime DE3584929D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59172754A JPS6150287A (ja) 1984-08-20 1984-08-20 ダイナミツクメモリの自動リフレツシユ制御回路

Publications (1)

Publication Number Publication Date
DE3584929D1 true DE3584929D1 (de) 1992-01-30

Family

ID=15947700

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585305697T Expired - Lifetime DE3584929D1 (de) 1984-08-20 1985-08-12 Automatische refreshsteuerungsschaltung fuer eine dynamische halbleiterspeicherschaltung.

Country Status (4)

Country Link
US (1) US4682306A (de)
EP (1) EP0176203B1 (de)
JP (1) JPS6150287A (de)
DE (1) DE3584929D1 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63121197A (ja) * 1986-11-07 1988-05-25 Fujitsu Ltd 半導体記憶装置
US4870620A (en) * 1987-01-06 1989-09-26 Mitsubishi Denki Kabushiki Kaisha Dynamic random access memory device with internal refresh
JPS63251996A (ja) * 1987-04-08 1988-10-19 Mitsubishi Electric Corp タイマ回路
JPS6432489A (en) * 1987-07-27 1989-02-02 Matsushita Electronics Corp Memory device
JPH01302595A (ja) * 1988-05-30 1989-12-06 Nec Ic Microcomput Syst Ltd 半導体記憶装置
JP2534757B2 (ja) * 1988-07-06 1996-09-18 株式会社東芝 リフレッシュ回路
GB8827130D0 (en) * 1988-11-21 1988-12-29 Krilic G Self-refreshable dynamic memory cell
KR920022293A (ko) * 1991-05-16 1992-12-19 김광호 비정기적인 리프레쉬 동작을 실행하는 반도체 메모리 장치
US5321661A (en) * 1991-11-20 1994-06-14 Oki Electric Industry Co., Ltd. Self-refreshing memory with on-chip timer test circuit
JP2998944B2 (ja) * 1991-12-19 2000-01-17 シャープ株式会社 リングオシレータ
AU6988494A (en) * 1993-05-28 1994-12-20 Rambus Inc. Method and apparatus for implementing refresh in a synchronous dram system
US5455801A (en) * 1994-07-15 1995-10-03 Micron Semiconductor, Inc. Circuit having a control array of memory cells and a current source and a method for generating a self-refresh timing signal
US5581198A (en) * 1995-02-24 1996-12-03 Xilinx, Inc. Shadow DRAM for programmable logic devices
US5847577A (en) * 1995-02-24 1998-12-08 Xilinx, Inc. DRAM memory cell for programmable logic devices
KR100198617B1 (ko) * 1995-12-27 1999-06-15 구본준 모오스 캐패시터의 누설전압감지회로
JP3535963B2 (ja) * 1997-02-17 2004-06-07 シャープ株式会社 半導体記憶装置
KR100363105B1 (ko) 1998-12-23 2003-02-19 주식회사 하이닉스반도체 셀 리키지 커런트 보상용 셀프 리프레쉬 장치
US6628558B2 (en) 2001-06-20 2003-09-30 Cypress Semiconductor Corp. Proportional to temperature voltage generator
KR100413484B1 (ko) * 2001-06-28 2003-12-31 주식회사 하이닉스반도체 반도체 메모리 장치의 리프레쉬 회로
US6714473B1 (en) 2001-11-30 2004-03-30 Cypress Semiconductor Corp. Method and architecture for refreshing a 1T memory proportional to temperature
US7583551B2 (en) * 2004-03-10 2009-09-01 Micron Technology, Inc. Power management control and controlling memory refresh operations
US7564274B2 (en) * 2005-02-24 2009-07-21 Icera, Inc. Detecting excess current leakage of a CMOS device
KR102373544B1 (ko) 2015-11-06 2022-03-11 삼성전자주식회사 요청 기반의 리프레쉬를 수행하는 메모리 장치, 메모리 시스템 및 메모리 장치의 동작방법

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3705392A (en) * 1971-09-07 1972-12-05 Texas Instruments Inc Mos dynamic memory
JPS5683888A (en) * 1979-12-11 1981-07-08 Nec Corp Memory circuit
US4491938A (en) * 1981-12-28 1985-01-01 Texas Instruments Incorporated Low voltage RAM cell
JPS5956291A (ja) * 1982-09-24 1984-03-31 Hitachi Ltd Ｍｏｓ記憶装置
JPS59227090A (ja) * 1983-06-06 1984-12-20 Hitachi Ltd 不揮発性メモリ装置
JPS60212896A (ja) * 1984-04-06 1985-10-25 Hitachi Micro Comput Eng Ltd ダイナミツク型ｒａｍ

Also Published As

Publication number Publication date
EP0176203B1 (de) 1991-12-18
EP0176203A2 (de) 1986-04-02
US4682306A (en) 1987-07-21
JPH0444836B2 (de) 1992-07-22
EP0176203A3 (en) 1988-03-02
JPS6150287A (ja) 1986-03-12

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Legal Events

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8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)