DE3443784C2 - - Google Patents
Info
- Publication number
- DE3443784C2 DE3443784C2 DE19843443784 DE3443784A DE3443784C2 DE 3443784 C2 DE3443784 C2 DE 3443784C2 DE 19843443784 DE19843443784 DE 19843443784 DE 3443784 A DE3443784 A DE 3443784A DE 3443784 C2 DE3443784 C2 DE 3443784C2
- Authority
- DE
- Germany
- Prior art keywords
- layer
- gate
- base layer
- electrode
- thyristor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes)
- H01L23/4824—Pads with extended contours, e.g. grid structure, branch structure, finger structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D18/00—Thyristors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/233—Cathode or anode electrodes for thyristors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/62—Electrodes ohmically coupled to a semiconductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1301—Thyristor
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Thyristors (AREA)
- Electrodes Of Semiconductors (AREA)
- Die Bonding (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58228043A JPS60119777A (ja) | 1983-11-30 | 1983-11-30 | ゲ−トタ−ンオフサイリスタ |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE3443784A1 DE3443784A1 (de) | 1985-07-18 |
| DE3443784C2 true DE3443784C2 (enrdf_load_stackoverflow) | 1991-10-10 |
Family
ID=16870300
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19843448379 Expired - Fee Related DE3448379C2 (de) | 1983-11-30 | 1984-11-30 | Gate-Abschaltthyristor |
| DE19843443784 Granted DE3443784A1 (de) | 1983-11-30 | 1984-11-30 | Gate-abschaltthyristor |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19843448379 Expired - Fee Related DE3448379C2 (de) | 1983-11-30 | 1984-11-30 | Gate-Abschaltthyristor |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPS60119777A (enrdf_load_stackoverflow) |
| DE (2) | DE3448379C2 (enrdf_load_stackoverflow) |
| GB (1) | GB2150754B (enrdf_load_stackoverflow) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4073876B2 (ja) * | 2004-01-14 | 2008-04-09 | 三菱電機株式会社 | 半導体装置 |
| JP5396436B2 (ja) | 2011-06-29 | 2014-01-22 | 日立オートモティブシステムズ株式会社 | 半導体装置ならびに半導体装置の製造方法 |
| US9583425B2 (en) * | 2012-02-15 | 2017-02-28 | Maxim Integrated Products, Inc. | Solder fatigue arrest for wafer level package |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE1105526B (de) * | 1959-12-29 | 1961-04-27 | Siemens Ag | Verfahren zur Herstellung einer Halbleiteranordnung |
| DE1214978B (de) * | 1963-06-11 | 1966-04-21 | Licentia Gmbh | Verfahren zum Anloeten einer Goldfolie an eine vernickelte Molybdaenscheibe |
| DE1283970B (de) * | 1966-03-19 | 1968-11-28 | Siemens Ag | Metallischer Kontakt an einem Halbleiterbauelement |
| GB1149606A (en) * | 1967-02-27 | 1969-04-23 | Motorola Inc | Mounting for a semiconductor wafer which is resistant to fatigue caused by thermal stresses |
| GB1196834A (en) * | 1967-03-29 | 1970-07-01 | Hitachi Ltd | Improvement of Electrode Structure in a Semiconductor Device. |
| GB1196576A (en) * | 1968-03-06 | 1970-07-01 | Westinghouse Electric Corp | High Current Gate Controlled Switches |
| US3599060A (en) * | 1968-11-25 | 1971-08-10 | Gen Electric | A multilayer metal contact for semiconductor device |
| GB1557399A (en) * | 1976-04-09 | 1979-12-12 | Int Rectifier Corp | Gate controlled semiconductor device |
| IT1075077B (it) * | 1977-03-08 | 1985-04-22 | Ates Componenti Elettron | Metodo pr realizzare contatti su semiconduttori |
| US4092703A (en) * | 1977-03-15 | 1978-05-30 | Kabushiki Kaisha Meidensha | Gate controlled semiconductor device |
| JPS57117276A (en) * | 1981-01-14 | 1982-07-21 | Hitachi Ltd | Semiconductor device |
| GB2095904B (en) * | 1981-03-23 | 1985-11-27 | Gen Electric | Semiconductor device with built-up low resistance contact and laterally conducting second contact |
| JPS5830147A (ja) * | 1981-08-18 | 1983-02-22 | Toshiba Corp | 半導体装置 |
| JPS59121871A (ja) * | 1982-12-28 | 1984-07-14 | Toshiba Corp | 半導体装置 |
| DE3301666A1 (de) * | 1983-01-20 | 1984-07-26 | Brown, Boveri & Cie Ag, 6800 Mannheim | Verfahren zur herstellung einer mehrschichtigen kontaktmetallisierung |
-
1983
- 1983-11-30 JP JP58228043A patent/JPS60119777A/ja active Pending
-
1984
- 1984-11-30 GB GB8430310A patent/GB2150754B/en not_active Expired
- 1984-11-30 DE DE19843448379 patent/DE3448379C2/de not_active Expired - Fee Related
- 1984-11-30 DE DE19843443784 patent/DE3443784A1/de active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| GB2150754A (en) | 1985-07-03 |
| GB2150754B (en) | 1987-08-26 |
| DE3448379C2 (de) | 1993-12-16 |
| DE3443784A1 (de) | 1985-07-18 |
| JPS60119777A (ja) | 1985-06-27 |
| GB8430310D0 (en) | 1985-01-09 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| OM8 | Search report available as to paragraph 43 lit. 1 sentence 1 patent law | ||
| 8110 | Request for examination paragraph 44 | ||
| 8172 | Supplementary division/partition in: |
Ref country code: DE Ref document number: 3448379 Format of ref document f/p: P |
|
| Q171 | Divided out to: |
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|
| AH | Division in |
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|
| D2 | Grant after examination | ||
| 8364 | No opposition during term of opposition | ||
| AH | Division in |
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|
| 8320 | Willingness to grant licences declared (paragraph 23) | ||
| 8339 | Ceased/non-payment of the annual fee |