DE3264103D1 - Fet and method for manufacturing such - Google Patents

Fet and method for manufacturing such

Info

Publication number
DE3264103D1
DE3264103D1 DE8282100968T DE3264103T DE3264103D1 DE 3264103 D1 DE3264103 D1 DE 3264103D1 DE 8282100968 T DE8282100968 T DE 8282100968T DE 3264103 T DE3264103 T DE 3264103T DE 3264103 D1 DE3264103 D1 DE 3264103D1
Authority
DE
Germany
Prior art keywords
fet
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282100968T
Other languages
German (de)
English (en)
Inventor
Ven Young Doo
Paul Jamin Tsang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3264103D1 publication Critical patent/DE3264103D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/65—Lateral DMOS [LDMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0221—Manufacture or treatment of FETs having insulated gates [IGFET] having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended-drain MOSFETs [EDMOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/603—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H10D64/518—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their lengths or sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/408—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
    • H10P76/4085—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes characterised by the processes involved to create the masks
DE8282100968T 1981-03-05 1982-02-10 Fet and method for manufacturing such Expired DE3264103D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/240,677 US4442589A (en) 1981-03-05 1981-03-05 Method for manufacturing field effect transistors

Publications (1)

Publication Number Publication Date
DE3264103D1 true DE3264103D1 (en) 1985-07-18

Family

ID=22907491

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282100968T Expired DE3264103D1 (en) 1981-03-05 1982-02-10 Fet and method for manufacturing such

Country Status (4)

Country Link
US (1) US4442589A (enExample)
EP (1) EP0059848B1 (enExample)
JP (1) JPS57157572A (enExample)
DE (1) DE3264103D1 (enExample)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6072272A (ja) * 1983-09-28 1985-04-24 Toshiba Corp 半導体装置の製造方法
JPS60182171A (ja) * 1984-02-29 1985-09-17 Oki Electric Ind Co Ltd 半導体装置の製造方法
US4551909A (en) * 1984-03-29 1985-11-12 Gte Laboratories Incorporated Method of fabricating junction field effect transistors
JPS6149473A (ja) * 1984-08-17 1986-03-11 Mitsubishi Electric Corp ポリサイドゲ−トｍｏｓ　ｉｃの製造方法
US4855246A (en) * 1984-08-27 1989-08-08 International Business Machines Corporation Fabrication of a gaas short channel lightly doped drain mesfet
JPS61191070A (ja) * 1985-02-20 1986-08-25 Toshiba Corp 半導体装置の製造方法
US4826779A (en) * 1986-10-24 1989-05-02 Teledyne Industries, Inc. Integrated capacitor and method of fabricating same
GB2198393B (en) * 1986-12-13 1990-06-06 Spectrol Reliance Ltd Method of producing filaments
US5143860A (en) * 1987-12-23 1992-09-01 Texas Instruments Incorporated High density EPROM fabricaiton method having sidewall floating gates
US4945067A (en) * 1988-09-16 1990-07-31 Xerox Corporation Intra-gate offset high voltage thin film transistor with misalignment immunity and method of its fabrication
USH986H (en) 1989-06-09 1991-11-05 International Business Machines Corporation Field effect-transistor with asymmetrical structure
EP0416141A1 (de) * 1989-09-04 1991-03-13 Siemens Aktiengesellschaft Verfahren zur Herstellung eines FET mit asymmetrisch angeordnetem Gate-Bereich
KR930011031B1 (ko) * 1990-06-30 1993-11-19 금성일렉트론 주식회사 Ldd 제조방법 및 구조
US5424567A (en) * 1991-05-15 1995-06-13 North American Philips Corporation Protected programmable transistor with reduced parasitic capacitances and method of fabrication
JP3221766B2 (ja) * 1993-04-23 2001-10-22 三菱電機株式会社 電界効果トランジスタの製造方法
US5994718A (en) * 1994-04-15 1999-11-30 National Semiconductor Corporation Trench refill with selective polycrystalline materials
US5650340A (en) * 1994-08-18 1997-07-22 Sun Microsystems, Inc. Method of making asymmetric low power MOS devices
US5464785A (en) * 1994-11-30 1995-11-07 United Microelectronics Corporation Method of making a flash EPROM device having a drain edge P+ implant
WO1996022615A1 (en) * 1995-01-17 1996-07-25 National Semiconductor Corporation Co-implantation of arsenic and phosphorus in extended drain region for improved performance of high voltage nmos device
US5744372A (en) 1995-04-12 1998-04-28 National Semiconductor Corporation Fabrication of complementary field-effect transistors each having multi-part channel
KR960042942A (ko) * 1995-05-04 1996-12-21 빈센트 비.인그라시아 반도체 디바이스 형성 방법
US6127700A (en) * 1995-09-12 2000-10-03 National Semiconductor Corporation Field-effect transistor having local threshold-adjust doping
KR100223927B1 (ko) * 1996-07-31 1999-10-15 구본준 전계 효과 트랜지스터 및 그 제조방법
US5950091A (en) * 1996-12-06 1999-09-07 Advanced Micro Devices, Inc. Method of making a polysilicon gate conductor of an integrated circuit formed as a sidewall spacer on a sacrificial material
US6124174A (en) * 1997-05-16 2000-09-26 Advanced Micro Devices, Inc. Spacer structure as transistor gate
US5866934A (en) 1997-06-20 1999-02-02 Advanced Micro Devices, Inc. Parallel and series-coupled transistors having gate conductors formed on sidewall surfaces of a sacrificial structure
US6107127A (en) * 1998-09-02 2000-08-22 Kocon; Christopher B. Method of making shallow well MOSFET structure
US7390535B2 (en) * 2003-07-03 2008-06-24 Aeromet Technologies, Inc. Simple chemical vapor deposition system and methods for depositing multiple-metal aluminide coatings
US20070166971A1 (en) * 2006-01-17 2007-07-19 Atmel Corporation Manufacturing of silicon structures smaller than optical resolution limits
CN101536153B (zh) * 2006-11-06 2011-07-20 Nxp股份有限公司 制造fet栅极的方法
US20100314695A1 (en) * 2009-06-10 2010-12-16 International Rectifier Corporation Self-aligned vertical group III-V transistor and method for fabricated same
US9287362B1 (en) 2014-11-21 2016-03-15 International Business Machines Corporation Vertical field effect transistors with controlled overlap between gate electrode and source/drain contacts

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3846822A (en) * 1973-10-05 1974-11-05 Bell Telephone Labor Inc Methods for making field effect transistors
JPS5928992B2 (ja) * 1975-02-14 1984-07-17 日本電信電話株式会社 Ｍｏｓトランジスタおよびその製造方法
JPS5946107B2 (ja) * 1975-06-04 1984-11-10 株式会社日立製作所 Ｍｉｓ型半導体装置の製造法
US4038107B1 (en) * 1975-12-03 1995-04-18 Samsung Semiconductor Tele Method for making transistor structures
US4033026A (en) * 1975-12-16 1977-07-05 Intel Corporation High density/high speed MOS process and device
DE2611338C3 (de) * 1976-03-17 1979-03-29 Siemens Ag, 1000 Berlin Und 8000 Muenchen Feldeffekttransistor mit sehr kurzer Kanallange
US4078947A (en) * 1976-08-05 1978-03-14 International Business Machines Corporation Method for forming a narrow channel length MOS field effect transistor
US4099987A (en) * 1977-07-25 1978-07-11 International Business Machines Corporation Fabricating integrated circuits incorporating high-performance bipolar transistors
FR2417853A1 (fr) * 1978-02-17 1979-09-14 Thomson Csf Procede de realisation d'un transistor de type mos et transistor realise selon ce procede
US4173818A (en) * 1978-05-30 1979-11-13 International Business Machines Corporation Method for fabricating transistor structures having very short effective channels
US4234362A (en) * 1978-11-03 1980-11-18 International Business Machines Corporation Method for forming an insulator between layers of conductive material
US4209349A (en) * 1978-11-03 1980-06-24 International Business Machines Corporation Method for forming a narrow dimensioned mask opening on a silicon body utilizing reactive ion etching
CA1138571A (en) * 1978-12-15 1982-12-28 Wolfgang M. Feist Semiconductor structures and manufacturing methods
US4272881A (en) * 1979-07-20 1981-06-16 Rca Corporation Method for making a closed gate MOS transistor with self-aligned contacts with dual passivation layer
DE2947350A1 (de) * 1979-11-23 1981-05-27 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von mnos-speichertransistoren mit sehr kurzer kanallaenge in silizium-gate-technologie
US4312680A (en) * 1980-03-31 1982-01-26 Rca Corporation Method of manufacturing submicron channel transistors

Also Published As

Publication number Publication date
US4442589A (en) 1984-04-17
EP0059848A3 (en) 1983-07-20
JPS626349B2 (enExample) 1987-02-10
JPS57157572A (en) 1982-09-29
EP0059848B1 (en) 1985-06-12
EP0059848A2 (en) 1982-09-15

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee