DE3264103D1 - Fet and method for manufacturing such - Google Patents
Fet and method for manufacturing suchInfo
- Publication number
- DE3264103D1 DE3264103D1 DE8282100968T DE3264103T DE3264103D1 DE 3264103 D1 DE3264103 D1 DE 3264103D1 DE 8282100968 T DE8282100968 T DE 8282100968T DE 3264103 T DE3264103 T DE 3264103T DE 3264103 D1 DE3264103 D1 DE 3264103D1
- Authority
- DE
- Germany
- Prior art keywords
- fet
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/42376—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66659—Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/240,677 US4442589A (en) | 1981-03-05 | 1981-03-05 | Method for manufacturing field effect transistors |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3264103D1 true DE3264103D1 (en) | 1985-07-18 |
Family
ID=22907491
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8282100968T Expired DE3264103D1 (en) | 1981-03-05 | 1982-02-10 | Fet and method for manufacturing such |
Country Status (4)
Country | Link |
---|---|
US (1) | US4442589A (de) |
EP (1) | EP0059848B1 (de) |
JP (1) | JPS57157572A (de) |
DE (1) | DE3264103D1 (de) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6072272A (ja) * | 1983-09-28 | 1985-04-24 | Toshiba Corp | 半導体装置の製造方法 |
JPS60182171A (ja) * | 1984-02-29 | 1985-09-17 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
US4551909A (en) * | 1984-03-29 | 1985-11-12 | Gte Laboratories Incorporated | Method of fabricating junction field effect transistors |
JPS6149473A (ja) * | 1984-08-17 | 1986-03-11 | Mitsubishi Electric Corp | ポリサイドゲ−トmos icの製造方法 |
US4855246A (en) * | 1984-08-27 | 1989-08-08 | International Business Machines Corporation | Fabrication of a gaas short channel lightly doped drain mesfet |
JPS61191070A (ja) * | 1985-02-20 | 1986-08-25 | Toshiba Corp | 半導体装置の製造方法 |
US4826779A (en) * | 1986-10-24 | 1989-05-02 | Teledyne Industries, Inc. | Integrated capacitor and method of fabricating same |
GB2198393B (en) * | 1986-12-13 | 1990-06-06 | Spectrol Reliance Ltd | Method of producing filaments |
US5143860A (en) * | 1987-12-23 | 1992-09-01 | Texas Instruments Incorporated | High density EPROM fabricaiton method having sidewall floating gates |
US4945067A (en) * | 1988-09-16 | 1990-07-31 | Xerox Corporation | Intra-gate offset high voltage thin film transistor with misalignment immunity and method of its fabrication |
EP0416141A1 (de) * | 1989-09-04 | 1991-03-13 | Siemens Aktiengesellschaft | Verfahren zur Herstellung eines FET mit asymmetrisch angeordnetem Gate-Bereich |
KR930011031B1 (ko) * | 1990-06-30 | 1993-11-19 | 금성일렉트론 주식회사 | Ldd 제조방법 및 구조 |
US5424567A (en) * | 1991-05-15 | 1995-06-13 | North American Philips Corporation | Protected programmable transistor with reduced parasitic capacitances and method of fabrication |
JP3221766B2 (ja) * | 1993-04-23 | 2001-10-22 | 三菱電機株式会社 | 電界効果トランジスタの製造方法 |
US5994718A (en) * | 1994-04-15 | 1999-11-30 | National Semiconductor Corporation | Trench refill with selective polycrystalline materials |
US5650340A (en) * | 1994-08-18 | 1997-07-22 | Sun Microsystems, Inc. | Method of making asymmetric low power MOS devices |
US5464785A (en) * | 1994-11-30 | 1995-11-07 | United Microelectronics Corporation | Method of making a flash EPROM device having a drain edge P+ implant |
EP0750794A1 (de) * | 1995-01-17 | 1997-01-02 | National Semiconductor Corporation | Gleichzeitige implantation von arsen und phosphor in ausgedehnter drainzone für hochspannung-nmos-anordnung |
US5744372A (en) | 1995-04-12 | 1998-04-28 | National Semiconductor Corporation | Fabrication of complementary field-effect transistors each having multi-part channel |
KR960042942A (ko) * | 1995-05-04 | 1996-12-21 | 빈센트 비.인그라시아 | 반도체 디바이스 형성 방법 |
US6127700A (en) * | 1995-09-12 | 2000-10-03 | National Semiconductor Corporation | Field-effect transistor having local threshold-adjust doping |
KR100223927B1 (ko) * | 1996-07-31 | 1999-10-15 | 구본준 | 전계 효과 트랜지스터 및 그 제조방법 |
US5950091A (en) * | 1996-12-06 | 1999-09-07 | Advanced Micro Devices, Inc. | Method of making a polysilicon gate conductor of an integrated circuit formed as a sidewall spacer on a sacrificial material |
US6124174A (en) * | 1997-05-16 | 2000-09-26 | Advanced Micro Devices, Inc. | Spacer structure as transistor gate |
US5866934A (en) * | 1997-06-20 | 1999-02-02 | Advanced Micro Devices, Inc. | Parallel and series-coupled transistors having gate conductors formed on sidewall surfaces of a sacrificial structure |
US6107127A (en) * | 1998-09-02 | 2000-08-22 | Kocon; Christopher B. | Method of making shallow well MOSFET structure |
US7390535B2 (en) * | 2003-07-03 | 2008-06-24 | Aeromet Technologies, Inc. | Simple chemical vapor deposition system and methods for depositing multiple-metal aluminide coatings |
US20070166971A1 (en) * | 2006-01-17 | 2007-07-19 | Atmel Corporation | Manufacturing of silicon structures smaller than optical resolution limits |
US7838371B2 (en) * | 2006-11-06 | 2010-11-23 | Nxp B.V. | Method of manufacturing a FET gate |
US20100314695A1 (en) * | 2009-06-10 | 2010-12-16 | International Rectifier Corporation | Self-aligned vertical group III-V transistor and method for fabricated same |
US9287362B1 (en) | 2014-11-21 | 2016-03-15 | International Business Machines Corporation | Vertical field effect transistors with controlled overlap between gate electrode and source/drain contacts |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3846822A (en) * | 1973-10-05 | 1974-11-05 | Bell Telephone Labor Inc | Methods for making field effect transistors |
JPS5928992B2 (ja) * | 1975-02-14 | 1984-07-17 | 日本電信電話株式会社 | Mosトランジスタおよびその製造方法 |
JPS5946107B2 (ja) * | 1975-06-04 | 1984-11-10 | 株式会社日立製作所 | Mis型半導体装置の製造法 |
US4038107B1 (en) * | 1975-12-03 | 1995-04-18 | Samsung Semiconductor Tele | Method for making transistor structures |
US4033026A (en) * | 1975-12-16 | 1977-07-05 | Intel Corporation | High density/high speed MOS process and device |
DE2611338C3 (de) * | 1976-03-17 | 1979-03-29 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Feldeffekttransistor mit sehr kurzer Kanallange |
US4078947A (en) * | 1976-08-05 | 1978-03-14 | International Business Machines Corporation | Method for forming a narrow channel length MOS field effect transistor |
US4099987A (en) * | 1977-07-25 | 1978-07-11 | International Business Machines Corporation | Fabricating integrated circuits incorporating high-performance bipolar transistors |
FR2417853A1 (fr) * | 1978-02-17 | 1979-09-14 | Thomson Csf | Procede de realisation d'un transistor de type mos et transistor realise selon ce procede |
US4173818A (en) * | 1978-05-30 | 1979-11-13 | International Business Machines Corporation | Method for fabricating transistor structures having very short effective channels |
US4209349A (en) * | 1978-11-03 | 1980-06-24 | International Business Machines Corporation | Method for forming a narrow dimensioned mask opening on a silicon body utilizing reactive ion etching |
US4234362A (en) * | 1978-11-03 | 1980-11-18 | International Business Machines Corporation | Method for forming an insulator between layers of conductive material |
CA1138571A (en) * | 1978-12-15 | 1982-12-28 | Wolfgang M. Feist | Semiconductor structures and manufacturing methods |
US4272881A (en) * | 1979-07-20 | 1981-06-16 | Rca Corporation | Method for making a closed gate MOS transistor with self-aligned contacts with dual passivation layer |
DE2947350A1 (de) * | 1979-11-23 | 1981-05-27 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen von mnos-speichertransistoren mit sehr kurzer kanallaenge in silizium-gate-technologie |
US4312680A (en) * | 1980-03-31 | 1982-01-26 | Rca Corporation | Method of manufacturing submicron channel transistors |
-
1981
- 1981-03-05 US US06/240,677 patent/US4442589A/en not_active Expired - Lifetime
-
1982
- 1982-02-05 JP JP57016515A patent/JPS57157572A/ja active Granted
- 1982-02-10 EP EP82100968A patent/EP0059848B1/de not_active Expired
- 1982-02-10 DE DE8282100968T patent/DE3264103D1/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
EP0059848B1 (de) | 1985-06-12 |
US4442589A (en) | 1984-04-17 |
EP0059848A2 (de) | 1982-09-15 |
JPS57157572A (en) | 1982-09-29 |
EP0059848A3 (en) | 1983-07-20 |
JPS626349B2 (de) | 1987-02-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8339 | Ceased/non-payment of the annual fee |