DE3246480A1 - Verfahren zur herstellung von halbleiterscheiben mit getternder scheibenrueckseite - Google Patents

Verfahren zur herstellung von halbleiterscheiben mit getternder scheibenrueckseite

Info

Publication number
DE3246480A1
DE3246480A1 DE19823246480 DE3246480A DE3246480A1 DE 3246480 A1 DE3246480 A1 DE 3246480A1 DE 19823246480 DE19823246480 DE 19823246480 DE 3246480 A DE3246480 A DE 3246480A DE 3246480 A1 DE3246480 A1 DE 3246480A1
Authority
DE
Germany
Prior art keywords
rear side
pane
laser
semiconductor wafers
etched
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19823246480
Other languages
German (de)
English (en)
Other versions
DE3246480C2 (enExample
Inventor
Hans-Adolf Dipl.-Ing.(FH) 8263 Burghausen Gerber
Josef 8261 Burgkirchen Kramler
Franz Dipl.-Phys. Dr. 8261 Emmerting Kuhn-Kuhnenfeld
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siltronic AG
Original Assignee
Wacker Siltronic AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wacker Siltronic AG filed Critical Wacker Siltronic AG
Priority to DE19823246480 priority Critical patent/DE3246480A1/de
Priority to IT48772/83A priority patent/IT1174767B/it
Priority to US06/543,411 priority patent/US4539050A/en
Priority to JP58229994A priority patent/JPS59115530A/ja
Publication of DE3246480A1 publication Critical patent/DE3246480A1/de
Application granted granted Critical
Publication of DE3246480C2 publication Critical patent/DE3246480C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/06—Gettering

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Weting (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Bipolar Transistors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
DE19823246480 1982-12-15 1982-12-15 Verfahren zur herstellung von halbleiterscheiben mit getternder scheibenrueckseite Granted DE3246480A1 (de)

Priority Applications (4)

Application Number Priority Date Filing Date Title
DE19823246480 DE3246480A1 (de) 1982-12-15 1982-12-15 Verfahren zur herstellung von halbleiterscheiben mit getternder scheibenrueckseite
IT48772/83A IT1174767B (it) 1982-12-15 1983-07-28 Procedimento per al produzione di piastrine di semiconduttori con lato dorsale di piastrina getterizzante
US06/543,411 US4539050A (en) 1982-12-15 1983-10-19 Process for the manufacture of semiconductor wafers with a rear side having a gettering action
JP58229994A JPS59115530A (ja) 1982-12-15 1983-12-07 裏面がゲツタ−リング作用を有する半導体ウエフアの製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19823246480 DE3246480A1 (de) 1982-12-15 1982-12-15 Verfahren zur herstellung von halbleiterscheiben mit getternder scheibenrueckseite

Publications (2)

Publication Number Publication Date
DE3246480A1 true DE3246480A1 (de) 1984-06-20
DE3246480C2 DE3246480C2 (enExample) 1989-05-24

Family

ID=6180769

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19823246480 Granted DE3246480A1 (de) 1982-12-15 1982-12-15 Verfahren zur herstellung von halbleiterscheiben mit getternder scheibenrueckseite

Country Status (4)

Country Link
US (1) US4539050A (enExample)
JP (1) JPS59115530A (enExample)
DE (1) DE3246480A1 (enExample)
IT (1) IT1174767B (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0251280A3 (en) * 1986-06-30 1989-11-23 Nec Corporation Method of gettering semiconductor wafers with a laser beam
RU2262152C1 (ru) * 2003-12-10 2005-10-10 Марийский государственный университет Способ изготовления подложки для толстопленочной втсп-схемы

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4659400A (en) * 1985-06-27 1987-04-21 General Instrument Corp. Method for forming high yield epitaxial wafers
DE3934140A1 (de) * 1989-10-12 1991-04-18 Wacker Chemitronic Verfahren zur die ausbildung von getterfaehigen zentren induzierenden oberflaechenbehandlung von halbleiterscheiben und dadurch erhaeltliche beidseitig polierte scheiben
JPH0472735A (ja) * 1990-07-13 1992-03-06 Mitsubishi Materials Corp 半導体ウエーハのゲッタリング方法
JPH06103714B2 (ja) * 1990-11-22 1994-12-14 信越半導体株式会社 シリコン単結晶の電気特性検査方法
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
JP2910507B2 (ja) * 1993-06-08 1999-06-23 信越半導体株式会社 半導体ウエーハの製造方法
US5426061A (en) * 1994-09-06 1995-06-20 Midwest Research Institute Impurity gettering in semiconductors
FR2748851B1 (fr) 1996-05-15 1998-08-07 Commissariat Energie Atomique Procede de realisation d'une couche mince de materiau semiconducteur
US6291313B1 (en) 1997-05-12 2001-09-18 Silicon Genesis Corporation Method and device for controlled cleaving process
US6010579A (en) 1997-05-12 2000-01-04 Silicon Genesis Corporation Reusable substrate for thin film separation
US20070122997A1 (en) 1998-02-19 2007-05-31 Silicon Genesis Corporation Controlled process and resulting device
US6033974A (en) 1997-05-12 2000-03-07 Silicon Genesis Corporation Method for controlled cleaving process
US6548382B1 (en) 1997-07-18 2003-04-15 Silicon Genesis Corporation Gettering technique for wafers made using a controlled cleaving process
FR2773261B1 (fr) 1997-12-30 2000-01-28 Commissariat Energie Atomique Procede pour le transfert d'un film mince comportant une etape de creation d'inclusions
US6033489A (en) * 1998-05-29 2000-03-07 Fairchild Semiconductor Corp. Semiconductor substrate and method of making same
US6291326B1 (en) 1998-06-23 2001-09-18 Silicon Genesis Corporation Pre-semiconductor process implant and post-process film separation
US6221740B1 (en) 1999-08-10 2001-04-24 Silicon Genesis Corporation Substrate cleaving tool and method
WO2001011930A2 (en) 1999-08-10 2001-02-15 Silicon Genesis Corporation A cleaving process to fabricate multilayered substrates using low implantation doses
US6263941B1 (en) 1999-08-10 2001-07-24 Silicon Genesis Corporation Nozzle for cleaving substrates
US6544862B1 (en) 2000-01-14 2003-04-08 Silicon Genesis Corporation Particle distribution method and resulting structure for a layer transfer process
FR2823599B1 (fr) 2001-04-13 2004-12-17 Commissariat Energie Atomique Substrat demomtable a tenue mecanique controlee et procede de realisation
US8187377B2 (en) 2002-10-04 2012-05-29 Silicon Genesis Corporation Non-contact etch annealing of strained layers
FR2848336B1 (fr) 2002-12-09 2005-10-28 Commissariat Energie Atomique Procede de realisation d'une structure contrainte destinee a etre dissociee
FR2856844B1 (fr) 2003-06-24 2006-02-17 Commissariat Energie Atomique Circuit integre sur puce de hautes performances
FR2857953B1 (fr) 2003-07-21 2006-01-13 Commissariat Energie Atomique Structure empilee, et procede pour la fabriquer
FR2861497B1 (fr) 2003-10-28 2006-02-10 Soitec Silicon On Insulator Procede de transfert catastrophique d'une couche fine apres co-implantation
FR2889887B1 (fr) 2005-08-16 2007-11-09 Commissariat Energie Atomique Procede de report d'une couche mince sur un support
US8993410B2 (en) 2006-09-08 2015-03-31 Silicon Genesis Corporation Substrate cleaving under controlled stress conditions
US9362439B2 (en) 2008-05-07 2016-06-07 Silicon Genesis Corporation Layer transfer of films utilizing controlled shear region
US8293619B2 (en) 2008-08-28 2012-10-23 Silicon Genesis Corporation Layer transfer of films utilizing controlled propagation
US7811900B2 (en) 2006-09-08 2010-10-12 Silicon Genesis Corporation Method and structure for fabricating solar cells using a thick layer transfer process
FR2910179B1 (fr) 2006-12-19 2009-03-13 Commissariat Energie Atomique PROCEDE DE FABRICATION DE COUCHES MINCES DE GaN PAR IMPLANTATION ET RECYCLAGE D'UN SUBSTRAT DE DEPART
FR2925221B1 (fr) 2007-12-17 2010-02-19 Commissariat Energie Atomique Procede de transfert d'une couche mince
US8330126B2 (en) 2008-08-25 2012-12-11 Silicon Genesis Corporation Race track configuration and method for wafering silicon solar substrates
US8329557B2 (en) 2009-05-13 2012-12-11 Silicon Genesis Corporation Techniques for forming thin films by implantation with reduced channeling
FR2947098A1 (fr) 2009-06-18 2010-12-24 Commissariat Energie Atomique Procede de transfert d'une couche mince sur un substrat cible ayant un coefficient de dilatation thermique different de celui de la couche mince

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3905162A (en) * 1974-07-23 1975-09-16 Silicon Material Inc Method of preparing high yield semiconductor wafer
US4131487A (en) * 1977-10-26 1978-12-26 Western Electric Company, Inc. Gettering semiconductor wafers with a high energy laser beam
DE2829983A1 (de) * 1978-07-07 1980-01-24 Siemens Ag Verfahren zum gettern von halbleiterbauelementen und integrierten halbleiterschaltkreisen
DE2927220A1 (de) * 1979-07-05 1981-01-15 Wacker Chemitronic Verfahren zur stapelfehlerinduzierenden oberflaechenzerstoerung von halbleiterscheiben
US4247827A (en) * 1978-01-24 1981-01-27 Plessey Handel Und Investments Ag Surface acoustic wave filter arrangement

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4144099A (en) * 1977-10-31 1979-03-13 International Business Machines Corporation High performance silicon wafer and fabrication process
JPS54110783A (en) * 1978-02-20 1979-08-30 Hitachi Ltd Semiconductor substrate and its manufacture
JPS567439A (en) * 1979-06-29 1981-01-26 Sony Corp Treating method for semiconductor substrate
US4257827A (en) * 1979-11-13 1981-03-24 International Business Machines Corporation High efficiency gettering in silicon through localized superheated melt formation
JPS57100724A (en) * 1980-12-15 1982-06-23 Toshiba Corp Manufacture of semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3905162A (en) * 1974-07-23 1975-09-16 Silicon Material Inc Method of preparing high yield semiconductor wafer
US4131487A (en) * 1977-10-26 1978-12-26 Western Electric Company, Inc. Gettering semiconductor wafers with a high energy laser beam
US4247827A (en) * 1978-01-24 1981-01-27 Plessey Handel Und Investments Ag Surface acoustic wave filter arrangement
DE2829983A1 (de) * 1978-07-07 1980-01-24 Siemens Ag Verfahren zum gettern von halbleiterbauelementen und integrierten halbleiterschaltkreisen
DE2927220A1 (de) * 1979-07-05 1981-01-15 Wacker Chemitronic Verfahren zur stapelfehlerinduzierenden oberflaechenzerstoerung von halbleiterscheiben

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
J. Electr. Soc. 128, p. 1975-1980 (1981) in Extended Abstr. Nr. 485 Los Angeles Meeting Electr. Soc. 14 19.10.1978 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0251280A3 (en) * 1986-06-30 1989-11-23 Nec Corporation Method of gettering semiconductor wafers with a laser beam
RU2262152C1 (ru) * 2003-12-10 2005-10-10 Марийский государственный университет Способ изготовления подложки для толстопленочной втсп-схемы

Also Published As

Publication number Publication date
IT1174767B (it) 1987-07-01
DE3246480C2 (enExample) 1989-05-24
IT8348772A0 (it) 1983-07-28
JPS59115530A (ja) 1984-07-04
JPH0334852B2 (enExample) 1991-05-24
US4539050A (en) 1985-09-03

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee