DE3119137A1 - Halbleiter und verfahren zu deren herstellung - Google Patents

Halbleiter und verfahren zu deren herstellung

Info

Publication number
DE3119137A1
DE3119137A1 DE19813119137 DE3119137A DE3119137A1 DE 3119137 A1 DE3119137 A1 DE 3119137A1 DE 19813119137 DE19813119137 DE 19813119137 DE 3119137 A DE3119137 A DE 3119137A DE 3119137 A1 DE3119137 A1 DE 3119137A1
Authority
DE
Germany
Prior art keywords
layer
doped
grooves
silicon
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19813119137
Other languages
German (de)
English (en)
Inventor
Muni M. 11746 Huntingdon Station N.Y. Mitchell
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Arris Technology Inc
Original Assignee
Arris Technology Inc
General Instrument Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Arris Technology Inc, General Instrument Corp filed Critical Arris Technology Inc
Publication of DE3119137A1 publication Critical patent/DE3119137A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • H10D30/668Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126Top-view geometrical layouts of the regions or the junctions
    • H10D62/127Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/512Disposition of the gate electrodes, e.g. buried gates
    • H10D64/513Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
DE19813119137 1980-05-29 1981-05-14 Halbleiter und verfahren zu deren herstellung Withdrawn DE3119137A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/154,280 US4379305A (en) 1980-05-29 1980-05-29 Mesh gate V-MOS power FET

Publications (1)

Publication Number Publication Date
DE3119137A1 true DE3119137A1 (de) 1982-03-04

Family

ID=22550726

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19813119137 Withdrawn DE3119137A1 (de) 1980-05-29 1981-05-14 Halbleiter und verfahren zu deren herstellung

Country Status (6)

Country Link
US (1) US4379305A (enExample)
JP (1) JPS5756975A (enExample)
CA (1) CA1154543A (enExample)
DE (1) DE3119137A1 (enExample)
FR (1) FR2483685A1 (enExample)
GB (1) GB2077495B (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2089119A (en) * 1980-12-10 1982-06-16 Philips Electronic Associated High voltage semiconductor devices
JPS58106870A (ja) * 1981-12-18 1983-06-25 Nissan Motor Co Ltd パワ−mosfet
EP0091686B1 (en) * 1982-04-12 1989-06-28 General Electric Company Semiconductor device having a diffused region of reduced length and method of fabricating the same
JP2739004B2 (ja) * 1992-01-16 1998-04-08 三菱電機株式会社 半導体装置
DE19918198B4 (de) * 1998-04-23 2008-04-17 International Rectifier Corp., El Segundo Struktur eines P-Kanal-Graben-MOSFETs
US7462910B1 (en) 1998-10-14 2008-12-09 International Rectifier Corporation P-channel trench MOSFET structure
US7737533B2 (en) * 2006-08-10 2010-06-15 Vishay General Semiconductor Llc Low voltage transient voltage suppressor with tapered recess extending into substrate of device allowing for reduced breakdown voltage
US8072027B2 (en) * 2009-06-08 2011-12-06 Fairchild Semiconductor Corporation 3D channel architecture for semiconductor devices
FR3070221B1 (fr) 2017-08-16 2020-05-15 Stmicroelectronics (Rousset) Sas Transistors mos en parallele
FR3070222A1 (fr) 2017-08-16 2019-02-22 Stmicroelectronics (Rousset) Sas Puce comprenant deux transistors mos en parallele

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4148047A (en) * 1978-01-16 1979-04-03 Honeywell Inc. Semiconductor apparatus
DE2904769A1 (de) * 1978-02-17 1979-08-23 Siliconix Inc Verfahren zum herstellen eines v-nut-mos-feldeffekttransistors und transistor dieses typs

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4145703A (en) * 1977-04-15 1979-03-20 Supertex, Inc. High power MOS device and fabrication method therefor
JPS53142189A (en) * 1977-05-17 1978-12-11 Matsushita Electronics Corp Insulating gate type field effect transistor
JPS5469085A (en) * 1977-11-03 1979-06-02 Ei Hoerunii Jiin Large power semiconductor
US4198693A (en) * 1978-03-20 1980-04-15 Texas Instruments Incorporated VMOS Read only memory
NL184551C (nl) * 1978-07-24 1989-08-16 Philips Nv Veldeffekttransistor met geisoleerde stuurelektrode.
US4268537A (en) * 1979-12-03 1981-05-19 Rca Corporation Method for manufacturing a self-aligned contact in a grooved semiconductor surface

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4148047A (en) * 1978-01-16 1979-04-03 Honeywell Inc. Semiconductor apparatus
DE2904769A1 (de) * 1978-02-17 1979-08-23 Siliconix Inc Verfahren zum herstellen eines v-nut-mos-feldeffekttransistors und transistor dieses typs

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
US-Z.: Electronics, Ausgabe v. 14.2.1980, S. 46,47 *
US-Z.: IEEE Trans. Electron Devices, Vol. ED-25, 1978, S. 1229-1234 *

Also Published As

Publication number Publication date
FR2483685B1 (enExample) 1984-05-18
JPS5756975A (en) 1982-04-05
GB2077495A (en) 1981-12-16
US4379305A (en) 1983-04-05
FR2483685A1 (fr) 1981-12-04
GB2077495B (en) 1985-04-11
CA1154543A (en) 1983-09-27

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8128 New person/name/address of the agent

Representative=s name: ZELLENTIN, R., DIPL.-GEOLOGE DR.RER.NAT., 8000 MUE

8139 Disposal/non-payment of the annual fee