DE2742935C3 - Nichtflüchtiger Langzeitspeicher - Google Patents

Nichtflüchtiger Langzeitspeicher

Info

Publication number
DE2742935C3
DE2742935C3 DE2742935A DE2742935A DE2742935C3 DE 2742935 C3 DE2742935 C3 DE 2742935C3 DE 2742935 A DE2742935 A DE 2742935A DE 2742935 A DE2742935 A DE 2742935A DE 2742935 C3 DE2742935 C3 DE 2742935C3
Authority
DE
Germany
Prior art keywords
electrode
substrate
insulating layer
memory according
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2742935A
Other languages
German (de)
English (en)
Other versions
DE2742935A1 (de
DE2742935B2 (de
Inventor
Alain Gif-Sur-Yvette Bert
Gerard Parly Kantorowicz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thomson CSF SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson CSF SA filed Critical Thomson CSF SA
Publication of DE2742935A1 publication Critical patent/DE2742935A1/de
Publication of DE2742935B2 publication Critical patent/DE2742935B2/de
Application granted granted Critical
Publication of DE2742935C3 publication Critical patent/DE2742935C3/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/69IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/35Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices with charge storage in a depletion layer, e.g. charge coupled devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C14/00Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/005Arrangements for selecting an address in a digital store with travelling wave access

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
DE2742935A 1976-09-24 1977-09-23 Nichtflüchtiger Langzeitspeicher Expired DE2742935C3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7628766A FR2365859A1 (fr) 1976-09-24 1976-09-24 Memoire non volatile pour signaux rapides

Publications (3)

Publication Number Publication Date
DE2742935A1 DE2742935A1 (de) 1978-03-30
DE2742935B2 DE2742935B2 (de) 1980-03-06
DE2742935C3 true DE2742935C3 (de) 1980-11-06

Family

ID=9178048

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2742935A Expired DE2742935C3 (de) 1976-09-24 1977-09-23 Nichtflüchtiger Langzeitspeicher

Country Status (4)

Country Link
US (1) US4122543A (ref)
DE (1) DE2742935C3 (ref)
FR (1) FR2365859A1 (ref)
GB (1) GB1592675A (ref)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4246502A (en) * 1978-08-16 1981-01-20 Mitel Corporation Means for coupling incompatible signals to an integrated circuit and for deriving operating supply therefrom
DE2844878A1 (de) * 1978-10-14 1980-04-30 Itt Ind Gmbh Deutsche Integrierbarer isolierschicht-feldeffekttransistor
US4314265A (en) * 1979-01-24 1982-02-02 Xicor, Inc. Dense nonvolatile electrically-alterable memory devices with four layer electrodes
DE2918888C2 (de) * 1979-05-10 1984-10-18 Siemens AG, 1000 Berlin und 8000 München MNOS-Speicherzelle und Verfahren zu ihrem Betrieb sowie zu ihrer Herstellung
US4247916A (en) * 1979-10-30 1981-01-27 Erb Darrell M Memory device in which one type carrier stored during write controls the flow of the other type carrier during read
DE3312094A1 (de) * 1983-04-02 1984-10-11 Licentia Patent-Verwaltungs-Gmbh Zentralelektronik
US5291439A (en) * 1991-09-12 1994-03-01 International Business Machines Corporation Semiconductor memory cell and memory array with inversion layer
EP0977267B1 (en) * 1998-07-30 2007-07-04 STMicroelectronics S.r.l. Non volatile memory structure and corresponding manufacturing process
KR101192358B1 (ko) * 2007-07-31 2012-10-18 삼성전자주식회사 불휘발성 메모리 장치 및 프로그래밍 방법

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3697962A (en) * 1970-11-27 1972-10-10 Ibm Two device monolithic bipolar memory array

Also Published As

Publication number Publication date
GB1592675A (en) 1981-07-08
US4122543A (en) 1978-10-24
DE2742935A1 (de) 1978-03-30
FR2365859A1 (fr) 1978-04-21
FR2365859B1 (ref) 1979-01-12
DE2742935B2 (de) 1980-03-06

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Legal Events

Date Code Title Description
OAP Request for examination filed
OD Request for examination
C3 Grant after two publication steps (3rd publication)
8339 Ceased/non-payment of the annual fee