DE2655341C2 - Halbleiteranordnung mit einer Passivierungsschicht aus Halbleitermaterial und Verfahren zu ihrer Herstellung - Google Patents

Halbleiteranordnung mit einer Passivierungsschicht aus Halbleitermaterial und Verfahren zu ihrer Herstellung

Info

Publication number
DE2655341C2
DE2655341C2 DE2655341A DE2655341A DE2655341C2 DE 2655341 C2 DE2655341 C2 DE 2655341C2 DE 2655341 A DE2655341 A DE 2655341A DE 2655341 A DE2655341 A DE 2655341A DE 2655341 C2 DE2655341 C2 DE 2655341C2
Authority
DE
Germany
Prior art keywords
semiconductor
layer
amount
semiconductor layer
passivation layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2655341A
Other languages
German (de)
English (en)
Other versions
DE2655341A1 (de
Inventor
Jean-Pierre Henri Caen Biet
Sio Dhat Herouville St. Clair Laou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of DE2655341A1 publication Critical patent/DE2655341A1/de
Application granted granted Critical
Publication of DE2655341C2 publication Critical patent/DE2655341C2/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
    • H10W74/481—Encapsulations, e.g. protective coatings characterised by their materials comprising semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/134—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being in grooves in the semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/137—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being directly on the semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/147—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being multilayered
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/122—Polycrystalline
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/125—Polycrystalline passivation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/905—Plural dram cells share common contact or common trench
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/958—Passivation layer

Landscapes

  • Formation Of Insulating Films (AREA)
  • Bipolar Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
DE2655341A 1975-12-19 1976-12-07 Halbleiteranordnung mit einer Passivierungsschicht aus Halbleitermaterial und Verfahren zu ihrer Herstellung Expired DE2655341C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7539046A FR2335951A1 (fr) 1975-12-19 1975-12-19 Dispositif semiconducteur a surface passivee et procede d'obtention de la structure de passivation

Publications (2)

Publication Number Publication Date
DE2655341A1 DE2655341A1 (de) 1977-06-30
DE2655341C2 true DE2655341C2 (de) 1984-01-19

Family

ID=9163957

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2655341A Expired DE2655341C2 (de) 1975-12-19 1976-12-07 Halbleiteranordnung mit einer Passivierungsschicht aus Halbleitermaterial und Verfahren zu ihrer Herstellung

Country Status (8)

Country Link
US (1) US4086613A (https=)
JP (1) JPS5948539B2 (https=)
CA (1) CA1069620A (https=)
DE (1) DE2655341C2 (https=)
FR (1) FR2335951A1 (https=)
GB (1) GB1565990A (https=)
IT (1) IT1068031B (https=)
NL (1) NL7613893A (https=)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4194934A (en) * 1977-05-23 1980-03-25 Varo Semiconductor, Inc. Method of passivating a semiconductor device utilizing dual polycrystalline layers
DE2730367A1 (de) * 1977-07-05 1979-01-18 Siemens Ag Verfahren zum passivieren von halbleiterelementen
DE2739762C2 (de) * 1977-09-03 1982-12-02 SEMIKRON Gesellschaft für Gleichrichterbau u. Elektronik mbH, 8500 Nürnberg Verfahren zur Passivierung von Halbleiterkörpern
US4140558A (en) * 1978-03-02 1979-02-20 Bell Telephone Laboratories, Incorporated Isolation of integrated circuits utilizing selective etching and diffusion
US4191788A (en) * 1978-11-13 1980-03-04 Trw Inc. Method to reduce breakage of V-grooved <100> silicon substrate
US4262299A (en) * 1979-01-29 1981-04-14 Rca Corporation Semiconductor-on-insulator device and method for its manufacture
US4199384A (en) * 1979-01-29 1980-04-22 Rca Corporation Method of making a planar semiconductor on insulating substrate device utilizing the deposition of a dual dielectric layer between device islands
US4242697A (en) * 1979-03-14 1980-12-30 Bell Telephone Laboratories, Incorporated Dielectrically isolated high voltage semiconductor devices
US4229474A (en) * 1979-05-25 1980-10-21 Trw Inc. Breakage resistant V-grooved <100> silicon substrates
FR2459551A1 (fr) * 1979-06-19 1981-01-09 Thomson Csf Procede et structure de passivation a autoalignement sur l'emplacement d'un masque
GB2071411B (en) * 1980-03-07 1983-12-21 Philips Electronic Associated Passivating p-n junction devices
FR2487576A1 (fr) * 1980-07-24 1982-01-29 Thomson Csf Procede de fabrication de diodes mesa glassivees
US4339285A (en) * 1980-07-28 1982-07-13 Rca Corporation Method for fabricating adjacent conducting and insulating regions in a film by laser irradiation
US4803528A (en) * 1980-07-28 1989-02-07 General Electric Company Insulating film having electrically conducting portions
US4349408A (en) * 1981-03-26 1982-09-14 Rca Corporation Method of depositing a refractory metal on a semiconductor substrate
GB2133928B (en) * 1982-12-04 1986-07-30 Plessey Co Plc Coatings for semiconductor devices
JPS59161864A (ja) * 1983-03-04 1984-09-12 Fujitsu Ltd 半導体装置
JPS61222172A (ja) * 1985-03-15 1986-10-02 Sharp Corp Ｍｏｓｆｅｔのゲ−ト絶縁膜形成方法
NL8800220A (nl) * 1988-01-29 1989-08-16 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij een metalen geleiderspoor op een oppervlak van een halfgeleiderlichaam wordt gebracht.
US5166769A (en) * 1988-07-18 1992-11-24 General Instrument Corporation Passitvated mesa semiconductor and method for making same
US5605862A (en) * 1995-04-05 1997-02-25 International Business Machines Corporation Process for making low-leakage contacts
US5677562A (en) * 1996-05-14 1997-10-14 General Instrument Corporation Of Delaware Planar P-N junction semiconductor structure with multilayer passivation
US5763905A (en) * 1996-07-09 1998-06-09 Abb Research Ltd. Semiconductor device having a passivation layer
US6891202B2 (en) * 2001-12-14 2005-05-10 Infinera Corporation Oxygen-doped Al-containing current blocking layers in active semiconductor devices
DE102020001835A1 (de) * 2020-03-20 2021-09-23 Azur Space Solar Power Gmbh Stapelförmige hochsperrende lll-V-Halbleiterleistungsdiode
DE102020001838A1 (de) * 2020-03-20 2021-09-23 Azur Space Solar Power Gmbh Stapelförmige hochsperrende lll-V-Halbleiterleistungsdiode

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2789258A (en) * 1955-06-29 1957-04-16 Raytheon Mfg Co Intrinsic coatings for semiconductor junctions
DE1184178B (de) * 1960-02-20 1964-12-23 Standard Elektrik Lorenz Ag Verfahren zum Stabilisieren der Oberflaeche von Halbleiterkoerpern mit pn-UEbergaengen durch Vakuumbedampfen
JPS501513B1 (https=) * 1968-12-11 1975-01-18
JPS5541025B2 (https=) * 1972-12-20 1980-10-21
JPS523277B2 (https=) * 1973-05-19 1977-01-27
JPS5024592A (https=) * 1973-07-05 1975-03-15
JPS532552B2 (https=) * 1974-03-30 1978-01-28
JPS5513426B2 (https=) * 1974-06-18 1980-04-09

Also Published As

Publication number Publication date
DE2655341A1 (de) 1977-06-30
CA1069620A (en) 1980-01-08
JPS5948539B2 (ja) 1984-11-27
JPS5279661A (en) 1977-07-04
GB1565990A (en) 1980-04-30
NL7613893A (nl) 1977-06-21
FR2335951B1 (https=) 1978-07-13
US4086613A (en) 1978-04-25
FR2335951A1 (fr) 1977-07-15
IT1068031B (it) 1985-03-21

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Legal Events

Date Code Title Description
OD Request for examination
8181 Inventor (new situation)

Free format text: BIET, JEAN-PIERRE HENRI, CAEN, FR LAOU, SIO DHAT, HEROUVILLE ST. CLAIR, FR

D2 Grant after examination
8363 Opposition against the patent
8365 Fully valid after opposition proceedings
8339 Ceased/non-payment of the annual fee