DE2546650C2 - Verfahren zur Herstellung von Halbleiterbauelementen mit einem scheibenförmigen Halbleiterkörper - Google Patents

Verfahren zur Herstellung von Halbleiterbauelementen mit einem scheibenförmigen Halbleiterkörper

Info

Publication number
DE2546650C2
DE2546650C2 DE2546650A DE2546650A DE2546650C2 DE 2546650 C2 DE2546650 C2 DE 2546650C2 DE 2546650 A DE2546650 A DE 2546650A DE 2546650 A DE2546650 A DE 2546650A DE 2546650 C2 DE2546650 C2 DE 2546650C2
Authority
DE
Germany
Prior art keywords
disk
semiconductor body
shaped semiconductor
coating
depressions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2546650A
Other languages
German (de)
English (en)
Other versions
DE2546650A1 (de
Inventor
Yoshichika Ibaraki Osaka Kobayashi
Yoshio Takatsuki Osaka Ohkubo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP49120912A external-priority patent/JPS5146867A/ja
Priority claimed from JP13413274A external-priority patent/JPS5419130B2/ja
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Publication of DE2546650A1 publication Critical patent/DE2546650A1/de
Application granted granted Critical
Publication of DE2546650C2 publication Critical patent/DE2546650C2/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/80FETs having rectifying junction gate electrodes
    • H10D30/83FETs having PN junction gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10Integrated devices
    • H10F39/12Image sensors
    • H10F39/18Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302Non-deposition formation processes
    • H10P14/6304Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6306Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302Non-deposition formation processes
    • H10P14/6322Formation by thermal treatments
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/286Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
    • H10P50/287Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials

Landscapes

  • Element Separation (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Light Receiving Elements (AREA)
DE2546650A 1974-10-18 1975-10-17 Verfahren zur Herstellung von Halbleiterbauelementen mit einem scheibenförmigen Halbleiterkörper Expired DE2546650C2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP49120912A JPS5146867A (en) 1974-10-18 1974-10-18 Handotaisochino seizohoho
JP13413274A JPS5419130B2 (https=) 1974-11-20 1974-11-20

Publications (2)

Publication Number Publication Date
DE2546650A1 DE2546650A1 (de) 1976-04-29
DE2546650C2 true DE2546650C2 (de) 1984-03-29

Family

ID=26458400

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2546650A Expired DE2546650C2 (de) 1974-10-18 1975-10-17 Verfahren zur Herstellung von Halbleiterbauelementen mit einem scheibenförmigen Halbleiterkörper

Country Status (5)

Country Link
US (1) US4046595A (https=)
CA (1) CA1065497A (https=)
DE (1) DE2546650C2 (https=)
FR (1) FR2288393A1 (https=)
GB (1) GB1522630A (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4810669A (en) * 1987-07-07 1989-03-07 Oki Electric Industry Co., Ltd. Method of fabricating a semiconductor device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1564427B2 (de) * 1965-08-09 1971-11-11 Nippon Electric Co. Ltd., Tokio Verfahren zum herstellen eines doppeldiffusions halbleiter elementes
USRE28653E (en) 1968-04-23 1975-12-16 Method of fabricating semiconductor devices
NL170348C (nl) * 1970-07-10 1982-10-18 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een tegen dotering en tegen thermische oxydatie maskerend masker wordt aangebracht, de door de vensters in het masker vrijgelaten delen van het oppervlak worden onderworpen aan een etsbehandeling voor het vormen van verdiepingen en het halfgeleiderlichaam met het masker wordt onderworpen aan een thermische oxydatiebehandeling voor het vormen van een oxydepatroon dat de verdiepingen althans ten dele opvult.
US3746587A (en) * 1970-11-04 1973-07-17 Raytheon Co Method of making semiconductor diodes
US3748187A (en) * 1971-08-03 1973-07-24 Hughes Aircraft Co Self-registered doped layer for preventing field inversion in mis circuits
US3808058A (en) * 1972-08-17 1974-04-30 Bell Telephone Labor Inc Fabrication of mesa diode with channel guard

Also Published As

Publication number Publication date
CA1065497A (en) 1979-10-30
US4046595A (en) 1977-09-06
FR2288393B1 (https=) 1979-04-27
GB1522630A (en) 1978-08-23
FR2288393A1 (fr) 1976-05-14
DE2546650A1 (de) 1976-04-29

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Legal Events

Date Code Title Description
8125 Change of the main classification

Ipc: H01L 21/308

D2 Grant after examination
8363 Opposition against the patent
8328 Change in the person/name/address of the agent

Free format text: SCHWABE, H., DIPL.-ING. SANDMAIR, K., DIPL.-CHEM. DR.JUR. DR.RER.NAT., PAT.-ANW., 8000 MUENCHEN

8365 Fully valid after opposition proceedings
8380 Miscellaneous part iii

Free format text: IN SPALTE 3 BZW. 4 IST IN ZEILE 4 BZW. 67 NACH DEM WORT "SILIZIUMSCHEIBE" BZW. "SEITE" DAS BEZUGSZEICHEN 1 BZW. 321 EINZUFUEGEN.