CA1065497A - Method of forming recessed oxide isolation - Google Patents

Method of forming recessed oxide isolation

Info

Publication number
CA1065497A
CA1065497A CA237,865A CA237865A CA1065497A CA 1065497 A CA1065497 A CA 1065497A CA 237865 A CA237865 A CA 237865A CA 1065497 A CA1065497 A CA 1065497A
Authority
CA
Canada
Prior art keywords
recess
layer
projecting portion
forming
semiconductor devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA237,865A
Other languages
English (en)
French (fr)
Other versions
CA237865S (en
Inventor
Yoshio Ohkubo
Yoshichika Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP49120912A external-priority patent/JPS5146867A/ja
Priority claimed from JP13413274A external-priority patent/JPS5419130B2/ja
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Application granted granted Critical
Publication of CA1065497A publication Critical patent/CA1065497A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/83—FETs having PN junction gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/18—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6306—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6322—Formation by thermal treatments
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/286—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
    • H10P50/287—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials

Landscapes

  • Element Separation (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Light Receiving Elements (AREA)
CA237,865A 1974-10-18 1975-10-17 Method of forming recessed oxide isolation Expired CA1065497A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP49120912A JPS5146867A (en) 1974-10-18 1974-10-18 Handotaisochino seizohoho
JP13413274A JPS5419130B2 (https=) 1974-11-20 1974-11-20

Publications (1)

Publication Number Publication Date
CA1065497A true CA1065497A (en) 1979-10-30

Family

ID=26458400

Family Applications (1)

Application Number Title Priority Date Filing Date
CA237,865A Expired CA1065497A (en) 1974-10-18 1975-10-17 Method of forming recessed oxide isolation

Country Status (5)

Country Link
US (1) US4046595A (https=)
CA (1) CA1065497A (https=)
DE (1) DE2546650C2 (https=)
FR (1) FR2288393A1 (https=)
GB (1) GB1522630A (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4810669A (en) * 1987-07-07 1989-03-07 Oki Electric Industry Co., Ltd. Method of fabricating a semiconductor device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1564427B2 (de) * 1965-08-09 1971-11-11 Nippon Electric Co. Ltd., Tokio Verfahren zum herstellen eines doppeldiffusions halbleiter elementes
USRE28653E (en) 1968-04-23 1975-12-16 Method of fabricating semiconductor devices
NL170348C (nl) * 1970-07-10 1982-10-18 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een tegen dotering en tegen thermische oxydatie maskerend masker wordt aangebracht, de door de vensters in het masker vrijgelaten delen van het oppervlak worden onderworpen aan een etsbehandeling voor het vormen van verdiepingen en het halfgeleiderlichaam met het masker wordt onderworpen aan een thermische oxydatiebehandeling voor het vormen van een oxydepatroon dat de verdiepingen althans ten dele opvult.
US3746587A (en) * 1970-11-04 1973-07-17 Raytheon Co Method of making semiconductor diodes
US3748187A (en) * 1971-08-03 1973-07-24 Hughes Aircraft Co Self-registered doped layer for preventing field inversion in mis circuits
US3808058A (en) * 1972-08-17 1974-04-30 Bell Telephone Labor Inc Fabrication of mesa diode with channel guard

Also Published As

Publication number Publication date
US4046595A (en) 1977-09-06
FR2288393B1 (https=) 1979-04-27
GB1522630A (en) 1978-08-23
DE2546650C2 (de) 1984-03-29
FR2288393A1 (fr) 1976-05-14
DE2546650A1 (de) 1976-04-29

Similar Documents

Publication Publication Date Title
US4084986A (en) Method of manufacturing a semi-insulating silicon layer
US4521952A (en) Method of making integrated circuits using metal silicide contacts
CA1120609A (en) Method for forming a narrow dimensioned mask opening on a silicon body
US5019522A (en) Method of making topographic pattern delineated power MOSFET with profile tailored recessed source
US3747203A (en) Methods of manufacturing a semiconductor device
US5045903A (en) Topographic pattern delineated power MOSFET with profile tailored recessed source
US4125426A (en) Method of manufacturing semiconductor device
US5182234A (en) Profile tailored trench etch using a SF6 -O2 etching composition wherein both isotropic and anisotropic etching is achieved by varying the amount of oxygen
KR0154702B1 (ko) 항복전압을 향상시킨 다이오드 제조 방법
CA1078529A (en) Fabrication of semiconductive devices
CA1139015A (en) Bipolar transistor fabrication process with an ion implanted emitter
GB2071411A (en) Passivating p-n junction devices
GB2197532A (en) Source drain doping technique
GB2090062A (en) Igfet manufacture
US4261763A (en) Fabrication of integrated circuits employing only ion implantation for all dopant layers
US4561168A (en) Method of making shadow isolated metal DMOS FET device
GB1355806A (en) Methods of manufacturing a semiconductor device
US4538166A (en) Semiconductor memory device
US4044454A (en) Method for forming integrated circuit regions defined by recessed dielectric isolation
US3920861A (en) Method of making a semiconductor device
EP0160255B1 (en) Field effect transistor device and method of making same
EP0052198A2 (en) Method of manufacturing semiconductor devices using self-alignment techniques
US4473941A (en) Method of fabricating zener diodes
CA1096052A (en) Method of manufacturing a gate turn-off thyristor
US4290186A (en) Method of making integrated semiconductor structure having an MOS and a capacitor device