DE2423670A1 - Verfahren zur herstellung eines feldeffekttransistors - Google Patents

Verfahren zur herstellung eines feldeffekttransistors

Info

Publication number
DE2423670A1
DE2423670A1 DE2423670A DE2423670A DE2423670A1 DE 2423670 A1 DE2423670 A1 DE 2423670A1 DE 2423670 A DE2423670 A DE 2423670A DE 2423670 A DE2423670 A DE 2423670A DE 2423670 A1 DE2423670 A1 DE 2423670A1
Authority
DE
Germany
Prior art keywords
layer
strips
coating
fingers
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE2423670A
Other languages
German (de)
English (en)
Inventor
Peter Gutknecht
Terrence M Heng
Harvey C Nathanson
Pa Pittsburgh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Westinghouse Electric Corp
Original Assignee
Westinghouse Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Westinghouse Electric Corp filed Critical Westinghouse Electric Corp
Publication of DE2423670A1 publication Critical patent/DE2423670A1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/63—Vertical IGFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/512—Disposition of the gate electrodes, e.g. buried gates
    • H10D64/513—Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/143—Shadow masking

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
DE2423670A 1973-05-16 1974-05-15 Verfahren zur herstellung eines feldeffekttransistors Pending DE2423670A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00360996A US3851379A (en) 1973-05-16 1973-05-16 Solid state components

Publications (1)

Publication Number Publication Date
DE2423670A1 true DE2423670A1 (de) 1974-12-05

Family

ID=23420237

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2423670A Pending DE2423670A1 (de) 1973-05-16 1974-05-15 Verfahren zur herstellung eines feldeffekttransistors

Country Status (5)

Country Link
US (1) US3851379A (enrdf_load_html_response)
JP (1) JPS546357B2 (enrdf_load_html_response)
DE (1) DE2423670A1 (enrdf_load_html_response)
FR (1) FR2230082B1 (enrdf_load_html_response)
GB (1) GB1465629A (enrdf_load_html_response)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2341154C2 (de) * 1973-08-14 1975-06-26 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung einer Zweiphasen-Ladungsverschiebeanordnung
IE39611B1 (en) * 1973-08-14 1978-11-22 Siemens Ag Improvements in or relating to two-phase charge coupled devices
US3951708A (en) * 1974-10-15 1976-04-20 Rca Corporation Method of manufacturing a semiconductor device
US4070690A (en) * 1976-08-17 1978-01-24 Westinghouse Electric Corporation VMOS transistor
JPS5380976A (en) * 1976-12-25 1978-07-17 Toshiba Corp Semiconductor device
US4129879A (en) * 1977-04-21 1978-12-12 General Electric Company Vertical field effect transistor
JPS6013313B2 (ja) * 1977-05-19 1985-04-06 松下電器産業株式会社 半導体装置の製造方法
US4206469A (en) * 1978-09-15 1980-06-03 Westinghouse Electric Corp. Power metal-oxide-semiconductor-field-effect-transistor
US4198250A (en) * 1979-02-05 1980-04-15 Intel Corporation Shadow masking process for forming source and drain regions for field-effect transistors and like regions
US4262296A (en) * 1979-07-27 1981-04-14 General Electric Company Vertical field effect transistor with improved gate and channel structure
US4377899A (en) * 1979-11-19 1983-03-29 Sumitomo Electric Industries, Ltd. Method of manufacturing Schottky field-effect transistors utilizing shadow masking
US4393391A (en) * 1980-06-16 1983-07-12 Supertex, Inc. Power MOS transistor with a plurality of longitudinal grooves to increase channel conducting area
FR2507821A1 (fr) * 1981-06-16 1982-12-17 Thomson Csf Transistor a effet de champ vertical a jonction et procede de fabrication
US4449285A (en) * 1981-08-19 1984-05-22 The Secretary Of State For Defence In Her Britannic Majesty's Government Of The United Kingdom Of Great Britain And Northern Ireland Method for producing a vertical channel transistor
US4570174A (en) * 1981-08-21 1986-02-11 The United States Of America As Represented By The Secretary Of The Army Vertical MESFET with air spaced gate electrode
US4625388A (en) * 1982-04-26 1986-12-02 Acrian, Inc. Method of fabricating mesa MOSFET using overhang mask and resulting structure
US4419811A (en) * 1982-04-26 1983-12-13 Acrian, Inc. Method of fabricating mesa MOSFET using overhang mask
US4525919A (en) * 1982-06-16 1985-07-02 Raytheon Company Forming sub-micron electrodes by oblique deposition
US4738936A (en) * 1983-07-01 1988-04-19 Acrian, Inc. Method of fabrication lateral FET structure having a substrate to source contact
FR2555816B1 (fr) * 1983-11-25 1986-04-11 Thomson Csf Transistor a effet de champ a structure verticale
FR2557368B1 (fr) * 1983-12-27 1986-04-11 Thomson Csf Transistor a effet de champ, de structure verticale submicronique, et son procede de realisation
US4888626A (en) * 1985-03-07 1989-12-19 The United States Of America As Represented By The Secretary Of The Navy Self-aligned gaas fet with low 1/f noise
US4941026A (en) * 1986-12-05 1990-07-10 General Electric Company Semiconductor devices exhibiting minimum on-resistance
JPH0168532U (enrdf_load_html_response) * 1987-10-23 1989-05-02
US5166769A (en) * 1988-07-18 1992-11-24 General Instrument Corporation Passitvated mesa semiconductor and method for making same
JP2768988B2 (ja) * 1989-08-17 1998-06-25 三菱電機株式会社 端面部分コーティング方法
JP3461277B2 (ja) * 1998-01-23 2003-10-27 株式会社東芝 半導体装置及びその製造方法
US6667215B2 (en) * 2002-05-02 2003-12-23 3M Innovative Properties Method of making transistors

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2875505A (en) * 1952-12-11 1959-03-03 Bell Telephone Labor Inc Semiconductor translating device
US3387360A (en) * 1965-04-01 1968-06-11 Sony Corp Method of making a semiconductor device
US3761785A (en) * 1971-04-23 1973-09-25 Bell Telephone Labor Inc Methods for making transistor structures
US3689993A (en) * 1971-07-26 1972-09-12 Texas Instruments Inc Fabrication of semiconductor devices having low thermal inpedance bonds to heat sinks

Also Published As

Publication number Publication date
FR2230082B1 (enrdf_load_html_response) 1979-02-16
JPS546357B2 (enrdf_load_html_response) 1979-03-27
FR2230082A1 (enrdf_load_html_response) 1974-12-13
GB1465629A (en) 1977-02-23
US3851379A (en) 1974-12-03
JPS5019379A (enrdf_load_html_response) 1975-02-28

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