DE2326614C3 - Verfahren zum Herstellen einer Deckplatteneinheit zum hermetischen Abschließen eines Halbleiterbauelementgehäuses - Google Patents

Verfahren zum Herstellen einer Deckplatteneinheit zum hermetischen Abschließen eines Halbleiterbauelementgehäuses

Info

Publication number
DE2326614C3
DE2326614C3 DE2326614A DE2326614A DE2326614C3 DE 2326614 C3 DE2326614 C3 DE 2326614C3 DE 2326614 A DE2326614 A DE 2326614A DE 2326614 A DE2326614 A DE 2326614A DE 2326614 C3 DE2326614 C3 DE 2326614C3
Authority
DE
Germany
Prior art keywords
cover plate
ring
electrodes
solder ring
housing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2326614A
Other languages
German (de)
English (en)
Other versions
DE2326614A1 (de
DE2326614B2 (de
Inventor
Norman Portchester N.Y. Hascoe (V.St.A.)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Honeywell International Inc
Original Assignee
Semi-Alloys, Inc., Mount Vernon, N.Y. (V.St.A.)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=22976114&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE2326614(C3) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Semi-Alloys, Inc., Mount Vernon, N.Y. (V.St.A.) filed Critical Semi-Alloys, Inc., Mount Vernon, N.Y. (V.St.A.)
Publication of DE2326614A1 publication Critical patent/DE2326614A1/de
Publication of DE2326614B2 publication Critical patent/DE2326614B2/de
Application granted granted Critical
Publication of DE2326614C3 publication Critical patent/DE2326614C3/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67126Apparatus for sealing, encapsulating, glassing, decapsulating or the like
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00Soldering, e.g. brazing, or unsoldering
    • B23K1/0004Resistance soldering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/163Connection portion, e.g. seal
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49121Beam lead frame or beam lead device
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Fuses (AREA)
  • Casings For Electric Apparatus (AREA)
  • Manufacturing Of Electrical Connectors (AREA)
  • Connection Of Batteries Or Terminals (AREA)
DE2326614A 1972-05-26 1973-05-25 Verfahren zum Herstellen einer Deckplatteneinheit zum hermetischen Abschließen eines Halbleiterbauelementgehäuses Expired DE2326614C3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00257390A US3823468A (en) 1972-05-26 1972-05-26 Method of fabricating an hermetically sealed container

Publications (3)

Publication Number Publication Date
DE2326614A1 DE2326614A1 (de) 1973-12-20
DE2326614B2 DE2326614B2 (de) 1979-11-08
DE2326614C3 true DE2326614C3 (de) 1980-07-24

Family

ID=22976114

Family Applications (2)

Application Number Title Priority Date Filing Date
DE2326614A Expired DE2326614C3 (de) 1972-05-26 1973-05-25 Verfahren zum Herstellen einer Deckplatteneinheit zum hermetischen Abschließen eines Halbleiterbauelementgehäuses
DE2366284A Expired DE2366284C2 (de) 1972-05-26 1973-05-25 Verfahren zum Verschließen eines Halbleiterbauelementgehäuses

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE2366284A Expired DE2366284C2 (de) 1972-05-26 1973-05-25 Verfahren zum Verschließen eines Halbleiterbauelementgehäuses

Country Status (6)

Country Link
US (1) US3823468A (enExample)
JP (2) JPS5636577B2 (enExample)
CA (1) CA966556A (enExample)
DE (2) DE2326614C3 (enExample)
GB (1) GB1391383A (enExample)
NL (1) NL169044C (enExample)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2227182B2 (enExample) * 1973-01-26 1979-01-19 Usinor
JPS5197978A (en) * 1975-02-25 1976-08-28 Shusekikairono patsukeejino shiiringuyosuzuro
US4117300A (en) * 1977-04-05 1978-09-26 Gte Sylvania Incorporated Redundant welding method for metal battery containers
IT1160700B (it) * 1977-10-25 1987-03-11 Bfg Glassgroup Pannelli
JPS6011644Y2 (ja) * 1978-12-28 1985-04-17 富士通株式会社 半導体装置
US4280039A (en) * 1979-01-12 1981-07-21 Thomas P. Mahoney Apparatus for fabricating and welding core reinforced panel
US4190176A (en) * 1979-01-23 1980-02-26 Semi-Alloys, Inc. Sealing cover unit for a container for a semiconductor device
US4232814A (en) * 1979-06-14 1980-11-11 Semi-Alloys, Inc. Method and apparatus for fabricating a sealing cover unit for a container for a semiconductor device
US4291815B1 (en) * 1980-02-19 1998-09-29 Semiconductor Packaging Materi Ceramic lid assembly for hermetic sealing of a semiconductor chip
JPS58186951A (ja) * 1982-04-24 1983-11-01 Toshiba Corp 電子部品のパッケ−ジング方法
US4436220A (en) 1982-06-29 1984-03-13 The United States Of America As Represented By The Secretary Of The Air Force Hermetic package using membrane seal
US4572924A (en) * 1983-05-18 1986-02-25 Spectrum Ceramics, Inc. Electronic enclosures having metal parts
DE3587003T2 (de) * 1984-04-30 1993-06-17 Allied Signal Inc Nickel/indium-legierung fuer die herstellung eines hermetisch verschlossenen gehaeuses fuer halbleiteranordnungen und andere elektronische anordnungen.
US4666796A (en) * 1984-09-26 1987-05-19 Allied Corporation Plated parts and their production
US4601958A (en) * 1984-09-26 1986-07-22 Allied Corporation Plated parts and their production
JPS61204953A (ja) * 1985-03-08 1986-09-11 Sumitomo Metal Mining Co Ltd ハ−メチツクシ−ルカバ−及びその製造方法
US4640438A (en) * 1986-03-17 1987-02-03 Comienco Limited Cover for semiconductor device packages
US4852250A (en) * 1988-01-19 1989-08-01 Microelectronics And Computer Technology Corporation Hermetically sealed package having an electronic component and method of making
US5639014A (en) * 1995-07-05 1997-06-17 Johnson Matthey Electronics, Inc. Integral solder and plated sealing cover and method of making same
US6390353B1 (en) 1998-01-06 2002-05-21 Williams Advanced Materials, Inc. Integral solder and plated sealing cover and method of making the same
US6958446B2 (en) * 2002-04-17 2005-10-25 Agilent Technologies, Inc. Compliant and hermetic solder seal
JP3776907B2 (ja) * 2003-11-21 2006-05-24 ローム株式会社 回路基板
US10065262B2 (en) * 2010-09-06 2018-09-04 Honda Motor Co., Ltd. Welding method and welding device
JP7138026B2 (ja) * 2018-11-28 2022-09-15 京セラ株式会社 光学装置用蓋体および光学装置用蓋体の製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3340602A (en) 1965-02-01 1967-09-12 Philco Ford Corp Process for sealing

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE564064A (enExample) * 1957-03-01 1900-01-01
US2979599A (en) * 1959-05-12 1961-04-11 Air Reduction Multiple electrode holder
US3141226A (en) * 1961-09-27 1964-07-21 Hughes Aircraft Co Semiconductor electrode attachment
US3266137A (en) * 1962-06-07 1966-08-16 Hughes Aircraft Co Metal ball connection to crystals
US3415973A (en) * 1966-02-08 1968-12-10 Budd Co Method of welding sheet material
US3538597A (en) * 1967-07-13 1970-11-10 Us Navy Flatpack lid and method
US3579817A (en) * 1969-05-21 1971-05-25 Alpha Metals Cover for coplanar walls of an open top circuit package
US3648357A (en) * 1969-07-31 1972-03-14 Gen Dynamics Corp Method for sealing microelectronic device packages

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3340602A (en) 1965-02-01 1967-09-12 Philco Ford Corp Process for sealing

Also Published As

Publication number Publication date
DE2366284C2 (de) 1982-12-23
JPS5749142B2 (enExample) 1982-10-20
US3823468A (en) 1974-07-16
JPS52132676A (en) 1977-11-07
DE2326614A1 (de) 1973-12-20
JPS4943578A (enExample) 1974-04-24
NL7305997A (enExample) 1973-11-28
NL169044C (nl) 1982-06-01
NL169044B (nl) 1982-01-04
CA966556A (en) 1975-04-22
GB1391383A (en) 1975-04-23
DE2326614B2 (de) 1979-11-08
JPS5636577B2 (enExample) 1981-08-25

Similar Documents

Publication Publication Date Title
DE2326614C3 (de) Verfahren zum Herstellen einer Deckplatteneinheit zum hermetischen Abschließen eines Halbleiterbauelementgehäuses
DE19857299B4 (de) Verfahren zur Herstellung eines Sicherungselementes und Sicherungselement hergestellt mit demselben
DE3134557C2 (enExample)
DE69210183T2 (de) Verpackungsstrukture fuer halbleiteranordnung und verfahren zu deren herstellung
DE3042085C2 (de) Halbleiteranordnung
DE19915019B4 (de) Verfahren zum Herstellen einer Schmelzdichtung für eine LCD-Einrichtung
DE3328853C2 (de) Vorrichtung zur Messung der Masse eines strömenden Mediums
DE1640467B1 (de) Verfahren zum kontaktgerechten Aufbringen von mikrominiaturisierten Komponenten auf eine dielektrische Grundplatte
DE2363833C2 (de) Verfahren zum elektrischen und mechanischen Verbinden einer Vielzahl von mit streifenförmigen Leitern (beamlead) kontaktierten Halbleiterchips mit jeweils einem äußeren Leiterrahmen
EP3817881B1 (de) Verfahren zur herstellung einer hochtemperaturfesten bleifreien lotverbindung und anordnung mit einer hochtemperaturfesten bleifreien lotverbindung
DE19500655B4 (de) Chipträger-Anordnung zur Herstellung einer Chip-Gehäusung
DE3340939A1 (de) Thermische sicherung
DE19813468C1 (de) Sensorbauelement
EP0420050B1 (de) Verfahren zum Auflöten von Bauelementen auf Leiterplatten
DE2925509A1 (de) Packung fuer schaltungselemente
DE2454605C2 (de) Halbleiterbauelement
DE3913066A1 (de) Verfahren zur herstellung eines hermetisch dichten gehaeuses sowie nach diesem verfahren hergestelltes gehaeuse
EP0003034A1 (de) Gehäuse für eine Leistungshalbleiterbauelement
DE19601612A1 (de) Verfahren zum Befestigen eines ersten Teils aus Metall oder Keramik an einem zweiten Teil aus Metall oder Keramik
DE69520699T2 (de) Elektrisches Bauelement und Verfahren zu seiner Herstellung
DE19931113A1 (de) Verfahren zum Aufbringen von Verbindungsmaterialien für eine Verbindung zwischen einem Mikrochip und einem Substrat, Verfahren zum Herstellen einer elektrischen und mechanischen Verbindung zwischen einem Mikrochip und einem Substrat sowie Verwendung eines nach dem Tintendruckprinzip arbeitenden Druckkopfes
DE69203635T2 (de) Deckel für elektrische Bauelementenpackung.
DE1236081B (de) Verfahren zur Herstellung von ohmschen Kontakten an Halbleiterbauelementen
DE1514288C3 (de) Verfahren zum Befestigen eines Halbleiterkörpers an einer Trägerplatte
EP3200568B1 (de) Batteriebrücke und verfahren zum aktivieren einer elektronischen vorrichtung

Legal Events

Date Code Title Description
OGA New person/name/address of the applicant
OI Miscellaneous see part 1
OI Miscellaneous see part 1
OI Miscellaneous see part 1
C3 Grant after two publication steps (3rd publication)
AH Division in

Ref country code: DE

Ref document number: 2366284

Format of ref document f/p: P

8327 Change in the person/name/address of the patent owner

Owner name: ALLIED CORP., MORRIS TOWNSHIP, N.J., US

8328 Change in the person/name/address of the agent

Free format text: RUEGER, R., DR.-ING. BARTHELT, H., DIPL.-ING., PAT.-ANW., 7300 ESSLINGEN

8339 Ceased/non-payment of the annual fee