DE2164838C3 - Verfahren zum Aufbringen von planaren Schichten - Google Patents

Verfahren zum Aufbringen von planaren Schichten

Info

Publication number
DE2164838C3
DE2164838C3 DE2164838A DE2164838A DE2164838C3 DE 2164838 C3 DE2164838 C3 DE 2164838C3 DE 2164838 A DE2164838 A DE 2164838A DE 2164838 A DE2164838 A DE 2164838A DE 2164838 C3 DE2164838 C3 DE 2164838C3
Authority
DE
Germany
Prior art keywords
etching process
sputtering
layers
silicon dioxide
protective
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2164838A
Other languages
German (de)
English (en)
Other versions
DE2164838B2 (de
DE2164838A1 (de
Inventor
Raymond Ping Poughkeepsie N.Y. Auyang
Harold Raymond Derry N.H. Koenig
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE2164838A1 publication Critical patent/DE2164838A1/de
Publication of DE2164838B2 publication Critical patent/DE2164838B2/de
Application granted granted Critical
Publication of DE2164838C3 publication Critical patent/DE2164838C3/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Optics & Photonics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physical Vapour Deposition (AREA)
  • Drying Of Semiconductors (AREA)
  • Weting (AREA)
DE2164838A 1970-12-31 1971-12-27 Verfahren zum Aufbringen von planaren Schichten Expired DE2164838C3 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10325070A 1970-12-31 1970-12-31
US05/512,781 US3983022A (en) 1970-12-31 1974-10-07 Process for planarizing a surface

Publications (3)

Publication Number Publication Date
DE2164838A1 DE2164838A1 (de) 1972-07-20
DE2164838B2 DE2164838B2 (de) 1980-04-24
DE2164838C3 true DE2164838C3 (de) 1980-12-18

Family

ID=26800239

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2164838A Expired DE2164838C3 (de) 1970-12-31 1971-12-27 Verfahren zum Aufbringen von planaren Schichten

Country Status (4)

Country Link
US (1) US3983022A (enExample)
DE (1) DE2164838C3 (enExample)
FR (1) FR2119930B1 (enExample)
GB (1) GB1361214A (enExample)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3804738A (en) * 1973-06-29 1974-04-16 Ibm Partial planarization of electrically insulative films by resputtering
US4036723A (en) * 1975-08-21 1977-07-19 International Business Machines Corporation RF bias sputtering method for producing insulating films free of surface irregularities
US4035276A (en) * 1976-04-29 1977-07-12 Ibm Corporation Making coplanar layers of thin films
NL7701559A (nl) * 1977-02-15 1978-08-17 Philips Nv Het maken van schuine hellingen aan metaal- patronen, alsmede substraat voor een geinte- greerde schakeling voorzien van een dergelijk patroon.
US4131533A (en) * 1977-12-30 1978-12-26 International Business Machines Corporation RF sputtering apparatus having floating anode shield
JPS56133884A (en) * 1980-03-24 1981-10-20 Hitachi Ltd Manufacture of photoelectric transducer
US4492717A (en) * 1981-07-27 1985-01-08 International Business Machines Corporation Method for forming a planarized integrated circuit
JPS5982746A (ja) * 1982-11-04 1984-05-12 Toshiba Corp 半導体装置の電極配線方法
US4470874A (en) * 1983-12-15 1984-09-11 International Business Machines Corporation Planarization of multi-level interconnected metallization system
US4515668A (en) * 1984-04-25 1985-05-07 Honeywell Inc. Method of forming a dielectric layer comprising a gettering material
US4797375A (en) * 1984-10-05 1989-01-10 Honeywell Inc. Fabrication of metal interconnect for semiconductor device
JPH0697660B2 (ja) * 1985-03-23 1994-11-30 日本電信電話株式会社 薄膜形成方法
KR900005785B1 (ko) * 1985-05-13 1990-08-11 닛뽄덴신덴와 가부시끼가이샤 평탄성 박막의 제조방법
US4690746A (en) * 1986-02-24 1987-09-01 Genus, Inc. Interlayer dielectric process
US4732658A (en) * 1986-12-03 1988-03-22 Honeywell Inc. Planarization of silicon semiconductor devices
US4756810A (en) * 1986-12-04 1988-07-12 Machine Technology, Inc. Deposition and planarizing methods and apparatus
US4874493A (en) * 1988-03-28 1989-10-17 Microelectronics And Computer Technology Corporation Method of deposition of metal into cavities on a substrate
US5545594A (en) * 1993-10-26 1996-08-13 Yazaki Meter Co., Ltd. Semiconductor sensor anodic-bonding process, wherein bonding of corrugation is prevented
US5393703A (en) * 1993-11-12 1995-02-28 Motorola, Inc. Process for forming a conductive layer for semiconductor devices
JP3971213B2 (ja) * 2002-03-11 2007-09-05 アルプス電気株式会社 キーボード入力装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE526527A (enExample) * 1953-02-17
US3287612A (en) * 1963-12-17 1966-11-22 Bell Telephone Labor Inc Semiconductor contacts and protective coatings for planar devices
NL134170C (enExample) * 1963-12-17 1900-01-01
US3479269A (en) * 1967-01-04 1969-11-18 Bell Telephone Labor Inc Method for sputter etching using a high frequency negative pulse train
GB1299452A (en) * 1969-02-21 1972-12-13 Smiths Industries Ltd Improvements in or relating to methods of machining
US3661761A (en) * 1969-06-02 1972-05-09 Ibm Rf sputtering apparatus for promoting resputtering of film during deposition
US3661747A (en) * 1969-08-11 1972-05-09 Bell Telephone Labor Inc Method for etching thin film materials by direct cathodic back sputtering
US3676317A (en) * 1970-10-23 1972-07-11 Stromberg Datagraphix Inc Sputter etching process

Also Published As

Publication number Publication date
FR2119930B1 (enExample) 1974-08-19
DE2164838B2 (de) 1980-04-24
FR2119930A1 (enExample) 1972-08-11
DE2164838A1 (de) 1972-07-20
GB1361214A (en) 1974-07-24
US3983022A (en) 1976-09-28

Similar Documents

Publication Publication Date Title
DE2164838C3 (de) Verfahren zum Aufbringen von planaren Schichten
DE2945533C2 (de) Verfahren zur Herstellung eines Verdrahtungssystems
DE10051890A1 (de) Halbleiterwaferteilungsverfahren
DE3872859T2 (de) Verfahren zur metallisierung eines kieselsaeure-, quartz-, glas- oder saphirsubstrates und so erhaltenes substrat.
DE2636971C2 (de) Verfahren zum Herstellen einer isolierenden Schicht mit ebener Oberfläche auf einer unebenen Oberfläche eines Substrats
EP0905754B1 (de) Verfahren zum Planarisieren
DE2048915A1 (de) Verfahren zur Veränderung von Eigen schäften eines metallischen Films
DE1963162C3 (de) Verfahren zur Herstellung mehrerer Halbleiterbauelemente aus einer einkristallinen Halbleiterscheibe
DE3604368A1 (de) Verfahren zur herstellung eines duennfilm-transistors
DE2432719B2 (de) Verfahren zum erzeugen von feinen strukturen aus aufdampfbaren materialien auf einer unterlage und anwendung des verfahrens
DE2556038C2 (de) Verfahren zur Herstellung von Feldeffekttransistoren mit Schottky-Gate für sehr hohe Frequenzen
DE2239687C3 (de) Verfahren zum Ätzen eines mehrschichtigen Halbleiterkörpers mit einem flüssigen Ätzmittel
DE1258941B (de) Verfahren zur Herstellung von mehrschichtigen Duennfilmschaltungsplatten
DE2643811C2 (de) Lithographie-Maske mit einer für Strahlung durchlässigen Membran und Verfahren zu ihrer Herstellung
DE3034980A1 (de) Verfahren zur herstellung von verbundkoerpern
EP0218039A1 (de) Verfahren zur Übertragung feinster Fotolackstrukturen
DE2225366A1 (de) Verfahren zum Entfernen von Vor Sprüngen an Epitaxie Schichten
DE2944576A1 (de) Verfahren zur herstellung einer lochblende, etwa fuer eine elektronenstrahlbelichtungsvorrichtung
DE2540301C2 (de) Verfahren zur Herstellung einer Halbleiteranordnung mit einem Leitermuster
EP0010222A1 (de) Steuerplatte für einen flachen Plasmabildschirm
DE3545385C2 (enExample)
DE69601602T2 (de) Verfahren zum Herstellen einer Mesastruktur mit einer daraufliegenden Deckschicht insbesondere auf einem Halbleitersubstrat
DE1947026A1 (de) Verfahren zum Herstellen eines Halbleiterbauelements
DE2634156A1 (de) Verfahren zum herstellen von magnetkoepfen
DE1193335B (de) Verfahren zum formgebenden und/oder trennenden Bearbeiten von fotoelektrisch wirksamen Halbleiterkristallen

Legal Events

Date Code Title Description
OD Request for examination
C3 Grant after two publication steps (3rd publication)
8339 Ceased/non-payment of the annual fee