DE19980980T1 - Verfahren zur Herstellung einer Halbleiter-Vorrichtung und durch dieses Verfahren hergestellte Halbleiter-Vorrichtung - Google Patents

Verfahren zur Herstellung einer Halbleiter-Vorrichtung und durch dieses Verfahren hergestellte Halbleiter-Vorrichtung

Info

Publication number
DE19980980T1
DE19980980T1 DE19980980T DE19980980T DE19980980T1 DE 19980980 T1 DE19980980 T1 DE 19980980T1 DE 19980980 T DE19980980 T DE 19980980T DE 19980980 T DE19980980 T DE 19980980T DE 19980980 T1 DE19980980 T1 DE 19980980T1
Authority
DE
Germany
Prior art keywords
semiconductor device
manufacturing
device made
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19980980T
Other languages
English (en)
Other versions
DE19980980B4 (de
Inventor
Teruki Takeshita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Asahi Kasei Microsystems Co Ltd
Original Assignee
Asahi Kasei Microsystems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asahi Kasei Microsystems Co Ltd filed Critical Asahi Kasei Microsystems Co Ltd
Publication of DE19980980T1 publication Critical patent/DE19980980T1/de
Application granted granted Critical
Publication of DE19980980B4 publication Critical patent/DE19980980B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20—Resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE19980980T 1998-04-24 1999-04-16 Verfahren zur Herstellung einer Halbleiter-Vorrichtung Expired - Fee Related DE19980980B4 (de)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP11526498 1998-04-24
JP10/115264 1998-04-24
JP10/230902 1998-08-17
JP23090298 1998-08-17
PCT/JP1999/002029 WO1999056318A1 (fr) 1998-04-24 1999-04-16 Dispositif a semi-conducteur et procede de production

Publications (2)

Publication Number Publication Date
DE19980980T1 true DE19980980T1 (de) 2000-06-15
DE19980980B4 DE19980980B4 (de) 2005-05-19

Family

ID=26453802

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19980980T Expired - Fee Related DE19980980B4 (de) 1998-04-24 1999-04-16 Verfahren zur Herstellung einer Halbleiter-Vorrichtung

Country Status (6)

Country Link
US (1) US6323079B1 (de)
JP (1) JP3316804B2 (de)
KR (1) KR100350030B1 (de)
DE (1) DE19980980B4 (de)
TW (1) TW448539B (de)
WO (1) WO1999056318A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3746907B2 (ja) * 1998-12-28 2006-02-22 富士通株式会社 半導体装置の製造方法
US7060584B1 (en) * 1999-07-12 2006-06-13 Zilog, Inc. Process to improve high performance capacitor properties in integrated MOS technology
US6586299B1 (en) * 2002-10-01 2003-07-01 United Microelectronics Corp. Mixed mode process
JP4565847B2 (ja) * 2004-01-14 2010-10-20 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US6916700B1 (en) * 2004-01-15 2005-07-12 Taiwan Semiconductor Manufacturing Co., Ltd. Mixed-mode process
US6806136B1 (en) * 2004-02-17 2004-10-19 Episil Technologies, Inc. Method of forming a semiconductor device having a capacitor and a resistor
DE102004026108B4 (de) * 2004-05-28 2008-10-02 Qimonda Ag Integrierte Halbleiterschaltungsanordnung und Verfahren zu deren Herstellung
JP5220338B2 (ja) * 2007-04-27 2013-06-26 セイコーインスツル株式会社 半導体装置及び半導体装置製造方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2858815C2 (de) * 1977-01-26 1996-01-18 Sgs Thomson Microelectronics Verfahren zur Ausbildung eines Feldeffekttransistors in einer Halbleitervorrichtung
JPH01211958A (ja) 1988-02-18 1989-08-25 Hitachi Ltd 半導体集積回路装置及びその製造方法
JP2791525B2 (ja) 1992-04-16 1998-08-27 三菱電機株式会社 反射防止膜の選定方法およびその方法により選定された反射防止膜
US5397729A (en) * 1992-06-15 1995-03-14 Asahi Kasei Microsystems Co., Ltd. Method for fabrication of semiconductor device having polycrystalline silicon and metal silicides
JP3342164B2 (ja) 1993-04-16 2002-11-05 三菱電機株式会社 半導体装置およびその製造方法
US5470775A (en) * 1993-11-09 1995-11-28 Vlsi Technology, Inc. Method of forming a polysilicon-on-silicide capacitor
KR960005761A (ko) 1994-07-27 1996-02-23 이데이 노부유끼 반도체장치
US5618749A (en) 1995-03-31 1997-04-08 Yamaha Corporation Method of forming a semiconductor device having a capacitor and a resistor
US5604157A (en) 1995-05-25 1997-02-18 Industrial Technology Research Institute Reduced notching of polycide gates using silicon anti reflection layer
JPH0955351A (ja) 1995-08-15 1997-02-25 Sony Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
DE19980980B4 (de) 2005-05-19
KR100350030B1 (ko) 2002-08-24
JP3316804B2 (ja) 2002-08-19
KR20010014122A (ko) 2001-02-26
TW448539B (en) 2001-08-01
WO1999056318A1 (fr) 1999-11-04
US6323079B1 (en) 2001-11-27

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8128 New person/name/address of the agent

Representative=s name: KRAMER - BARSKE - SCHMIDTCHEN, 81245 MUENCHEN

8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee