DE19725445A1 - Bauteilträger für Multi-Chip-Module - Google Patents

Bauteilträger für Multi-Chip-Module

Info

Publication number
DE19725445A1
DE19725445A1 DE1997125445 DE19725445A DE19725445A1 DE 19725445 A1 DE19725445 A1 DE 19725445A1 DE 1997125445 DE1997125445 DE 1997125445 DE 19725445 A DE19725445 A DE 19725445A DE 19725445 A1 DE19725445 A1 DE 19725445A1
Authority
DE
Germany
Prior art keywords
component carrier
layer
edge
embedding
embedding layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE1997125445
Other languages
German (de)
English (en)
Inventor
Thomas Zeiler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to DE1997125445 priority Critical patent/DE19725445A1/de
Priority to PCT/DE1998/001020 priority patent/WO1998058407A1/fr
Publication of DE19725445A1 publication Critical patent/DE19725445A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09145—Edge details
    • H05K2201/0919—Exposing inner circuit layers or metal planes at the side edge of the PCB or at the walls of large holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2009—Reinforced areas, e.g. for a specific part of a flexible printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0228—Cutting, sawing, milling or shearing

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Packaging Frangible Articles (AREA)
  • Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)
DE1997125445 1997-06-16 1997-06-16 Bauteilträger für Multi-Chip-Module Withdrawn DE19725445A1 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE1997125445 DE19725445A1 (de) 1997-06-16 1997-06-16 Bauteilträger für Multi-Chip-Module
PCT/DE1998/001020 WO1998058407A1 (fr) 1997-06-16 1998-04-08 Porte-composant pour module multi-chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE1997125445 DE19725445A1 (de) 1997-06-16 1997-06-16 Bauteilträger für Multi-Chip-Module

Publications (1)

Publication Number Publication Date
DE19725445A1 true DE19725445A1 (de) 1998-12-17

Family

ID=7832645

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1997125445 Withdrawn DE19725445A1 (de) 1997-06-16 1997-06-16 Bauteilträger für Multi-Chip-Module

Country Status (2)

Country Link
DE (1) DE19725445A1 (fr)
WO (1) WO1998058407A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10084657B4 (de) * 2000-04-04 2007-08-09 Kingpak Technology Inc., Chupei Modulkarte und Herstellverfahren für diese
CN102300406A (zh) * 2011-08-19 2011-12-28 深南电路有限公司 埋入式电路板及其制作方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02260685A (ja) * 1989-03-31 1990-10-23 Toppan Printing Co Ltd プリント配線板
US5306546A (en) * 1992-12-22 1994-04-26 Hughes Aircraft Company Multi chip module substrate

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58137228A (ja) * 1982-02-09 1983-08-15 Toshiba Corp 半導体装置の製造方法
FR2572218B1 (fr) * 1984-10-23 1987-06-05 Labo Electronique Physique Procede de decoupe de composants electroniques sur un substrat semi-conducteur
US5157001A (en) * 1989-09-18 1992-10-20 Matsushita Electric Industrial Co., Ltd. Method of dicing semiconductor wafer along protective film formed on scribe lines
US5306370A (en) * 1992-11-02 1994-04-26 Xerox Corporation Method of reducing chipping and contamination of reservoirs and channels in thermal ink printheads during dicing by vacuum impregnation with protective filler material
US5521125A (en) * 1994-10-28 1996-05-28 Xerox Corporation Precision dicing of silicon chips from a wafer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02260685A (ja) * 1989-03-31 1990-10-23 Toppan Printing Co Ltd プリント配線板
US5306546A (en) * 1992-12-22 1994-04-26 Hughes Aircraft Company Multi chip module substrate

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
BAIER, Walter: Elektronik Lexikon, 2. Aufl. Frankh. 1982, S. 117 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10084657B4 (de) * 2000-04-04 2007-08-09 Kingpak Technology Inc., Chupei Modulkarte und Herstellverfahren für diese
CN102300406A (zh) * 2011-08-19 2011-12-28 深南电路有限公司 埋入式电路板及其制作方法
CN102300406B (zh) * 2011-08-19 2013-06-26 深南电路有限公司 埋入式电路板及其制作方法

Also Published As

Publication number Publication date
WO1998058407A1 (fr) 1998-12-23

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8127 New person/name/address of the applicant

Owner name: INFINEON TECHNOLOGIES AG, 81669 MUENCHEN, DE

8139 Disposal/non-payment of the annual fee