DE1190983B - Verfahren zur Ansteuerung (Auswahl) eines Speicherelements aus einer Mehrzahl bistabiler Speicherelemente eines Impulsspeichers - Google Patents

Verfahren zur Ansteuerung (Auswahl) eines Speicherelements aus einer Mehrzahl bistabiler Speicherelemente eines Impulsspeichers

Info

Publication number
DE1190983B
DE1190983B DEJ20722A DEJ0020722A DE1190983B DE 1190983 B DE1190983 B DE 1190983B DE J20722 A DEJ20722 A DE J20722A DE J0020722 A DEJ0020722 A DE J0020722A DE 1190983 B DE1190983 B DE 1190983B
Authority
DE
Germany
Prior art keywords
pulse
storage elements
line
memory
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DEJ20722A
Other languages
German (de)
English (en)
Inventor
Ivars George Akmenkalns
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE1190983B publication Critical patent/DE1190983B/de
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10Distribution of clock signals, e.g. skew
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/36Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using diodes, e.g. as threshold elements, i.e. diodes assuming a stable ON-stage when driven above their threshold (S- or N-characteristic)
    • G11C11/38Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using diodes, e.g. as threshold elements, i.e. diodes assuming a stable ON-stage when driven above their threshold (S- or N-characteristic) using tunnel diodes
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/005Arrangements for selecting an address in a digital store with travelling wave access
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/08Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/58Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being tunnel diodes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/313Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of semiconductor devices with two electrodes, one or two potential barriers, and exhibiting a negative resistance characteristic
    • H03K3/315Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of semiconductor devices with two electrodes, one or two potential barriers, and exhibiting a negative resistance characteristic the devices being tunnel diodes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • H03K5/15026Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with asynchronously driven series connected output stages
    • H03K5/15046Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with asynchronously driven series connected output stages using a tapped delay line

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Nonlinear Science (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
DEJ20722A 1960-11-02 1961-10-26 Verfahren zur Ansteuerung (Auswahl) eines Speicherelements aus einer Mehrzahl bistabiler Speicherelemente eines Impulsspeichers Pending DE1190983B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US66819A US3117304A (en) 1960-11-02 1960-11-02 Matrix with reflected wave energy crosspoints

Publications (1)

Publication Number Publication Date
DE1190983B true DE1190983B (de) 1965-04-15

Family

ID=26677746

Family Applications (1)

Application Number Title Priority Date Filing Date
DEJ20722A Pending DE1190983B (de) 1960-11-02 1961-10-26 Verfahren zur Ansteuerung (Auswahl) eines Speicherelements aus einer Mehrzahl bistabiler Speicherelemente eines Impulsspeichers

Country Status (6)

Country Link
US (1) US3117304A (enrdf_load_stackoverflow)
CH (1) CH398699A (enrdf_load_stackoverflow)
DE (1) DE1190983B (enrdf_load_stackoverflow)
FR (1) FR1304892A (enrdf_load_stackoverflow)
GB (1) GB969920A (enrdf_load_stackoverflow)
NL (1) NL270943A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3482227A (en) * 1966-11-25 1969-12-02 Sperry Rand Corp Common mode choke for plural groups of memory array drive-return line pairs
US4310816A (en) * 1979-05-14 1982-01-12 Sanders Associates, Inc. Dispersive delay lines

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1036319B (de) * 1956-04-03 1958-08-14 Tesla Np Schaltung einer elektronischen Reihen-Speicheranlage

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE543909A (enrdf_load_stackoverflow) * 1954-12-23
US2989732A (en) * 1955-05-24 1961-06-20 Ibm Time sequence addressing system
US2795775A (en) * 1955-07-01 1957-06-11 Itt Pulse repetition rate selector
US2907000A (en) * 1955-08-05 1959-09-29 Sperry Rand Corp Double base diode memory

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1036319B (de) * 1956-04-03 1958-08-14 Tesla Np Schaltung einer elektronischen Reihen-Speicheranlage

Also Published As

Publication number Publication date
US3117304A (en) 1964-01-07
FR1304892A (fr) 1962-09-28
NL270943A (enrdf_load_stackoverflow)
GB969920A (en) 1964-09-16
CH398699A (de) 1966-03-15

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