DE112024002420T5 - Schaltungsplatte, bildsensor und verfahren zur herstellung eines bildsensors - Google Patents

Schaltungsplatte, bildsensor und verfahren zur herstellung eines bildsensors

Info

Publication number
DE112024002420T5
DE112024002420T5 DE112024002420.3T DE112024002420T DE112024002420T5 DE 112024002420 T5 DE112024002420 T5 DE 112024002420T5 DE 112024002420 T DE112024002420 T DE 112024002420T DE 112024002420 T5 DE112024002420 T5 DE 112024002420T5
Authority
DE
Germany
Prior art keywords
logic circuit
output
signals
signal
pin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE112024002420.3T
Other languages
German (de)
English (en)
Inventor
Hiroaki Shigeta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE112024002420T5 publication Critical patent/DE112024002420T5/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/79—Arrangements of circuitry being divided between different or multiple substrates, chips or circuit boards, e.g. stacked image sensors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/024—Details of scanning heads ; Means for illuminating the original
    • H04N1/028—Details of scanning heads ; Means for illuminating the original for picture information pick-up
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50—Constructional details
    • H04N23/54—Mounting of pick-up tubes, electronic image sensors, deviation or focusing coils
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/701—Line sensors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Facsimile Heads (AREA)
DE112024002420.3T 2023-06-02 2024-03-27 Schaltungsplatte, bildsensor und verfahren zur herstellung eines bildsensors Pending DE112024002420T5 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2023-091875 2023-06-02
JP2023091875 2023-06-02
PCT/JP2024/012173 WO2024247464A1 (ja) 2023-06-02 2024-03-27 回路基板、イメージセンサ及びイメージセンサの製造方法

Publications (1)

Publication Number Publication Date
DE112024002420T5 true DE112024002420T5 (de) 2026-04-23

Family

ID=93657107

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112024002420.3T Pending DE112024002420T5 (de) 2023-06-02 2024-03-27 Schaltungsplatte, bildsensor und verfahren zur herstellung eines bildsensors

Country Status (5)

Country Link
US (1) US20260113553A1 (https=)
JP (1) JP7651078B1 (https=)
CN (1) CN121264033A (https=)
DE (1) DE112024002420T5 (https=)
WO (1) WO2024247464A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2024112603A (ja) * 2023-02-08 2024-08-21 三菱電機株式会社 半導体装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001244808A (ja) 2000-02-29 2001-09-07 Toshiba Corp 論理演算機能を備えた半導体集積回路
JP2023091875A (ja) 2021-12-21 2023-07-03 ボッシュ株式会社 異常検出装置、異常検出方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55167595U (https=) * 1979-05-18 1980-12-02
JP3008267B2 (ja) * 1997-01-30 2000-02-14 ローム株式会社 イメージセンサチップおよびイメージセンサ
KR20110118874A (ko) * 2010-04-26 2011-11-02 삼성전자주식회사 반도체 장치, 이를 포함하는 반도체 시스템, 및 상기 반도체 장치의 동작 방법
KR102424352B1 (ko) * 2017-06-19 2022-07-25 삼성전자주식회사 루프 대역폭을 균일하게 유지시키기 위해 디지털 이득을 조절하는 디지털 위상 고정 루프 회로
CN113841103A (zh) * 2019-05-24 2021-12-24 索尼半导体解决方案公司 电路系统
KR20220165734A (ko) * 2020-04-09 2022-12-15 소니 세미컨덕터 솔루션즈 가부시키가이샤 신호 처리 장치, 센싱 모듈
JP7753044B2 (ja) * 2021-10-20 2025-10-14 キヤノン株式会社 光電変換装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001244808A (ja) 2000-02-29 2001-09-07 Toshiba Corp 論理演算機能を備えた半導体集積回路
JP2023091875A (ja) 2021-12-21 2023-07-03 ボッシュ株式会社 異常検出装置、異常検出方法

Also Published As

Publication number Publication date
JP7651078B1 (ja) 2025-03-25
CN121264033A (zh) 2026-01-02
US20260113553A1 (en) 2026-04-23
WO2024247464A1 (ja) 2024-12-05
JPWO2024247464A1 (https=) 2024-12-05

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Legal Events

Date Code Title Description
R012 Request for examination validly filed