DE112022004385T5 - Siliziumkarbid-Halbleitervorrichtung - Google Patents

Siliziumkarbid-Halbleitervorrichtung Download PDF

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Publication number
DE112022004385T5
DE112022004385T5 DE112022004385.7T DE112022004385T DE112022004385T5 DE 112022004385 T5 DE112022004385 T5 DE 112022004385T5 DE 112022004385 T DE112022004385 T DE 112022004385T DE 112022004385 T5 DE112022004385 T5 DE 112022004385T5
Authority
DE
Germany
Prior art keywords
region
gate
contact hole
silicon carbide
main surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE112022004385.7T
Other languages
German (de)
English (en)
Inventor
Kosuke Uchida
Yu Saitoh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsumi Electric Co Ltd Tama-Shi Jp
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Publication of DE112022004385T5 publication Critical patent/DE112022004385T5/de
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/81Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/427Power or ground buses
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H10D62/107Buried supplementary regions, e.g. buried guard rings 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/118Electrodes comprising insulating layers having particular dielectric or electrostatic properties, e.g. having static charges
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • H10D30/668Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325Silicon carbide
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/512Disposition of the gate electrodes, e.g. buried gates
    • H10D64/513Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates

Landscapes

  • Electrodes Of Semiconductors (AREA)
DE112022004385.7T 2021-09-15 2022-06-21 Siliziumkarbid-Halbleitervorrichtung Pending DE112022004385T5 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021150122 2021-09-15
JP2021-150122 2021-09-15
PCT/JP2022/024785 WO2023042508A1 (ja) 2021-09-15 2022-06-21 炭化珪素半導体装置

Publications (1)

Publication Number Publication Date
DE112022004385T5 true DE112022004385T5 (de) 2024-06-20

Family

ID=85602709

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112022004385.7T Pending DE112022004385T5 (de) 2021-09-15 2022-06-21 Siliziumkarbid-Halbleitervorrichtung

Country Status (5)

Country Link
US (1) US20240371766A1 (https=)
JP (1) JPWO2023042508A1 (https=)
CN (1) CN117693824A (https=)
DE (1) DE112022004385T5 (https=)
WO (1) WO2023042508A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP4712139A1 (en) * 2024-09-12 2026-03-18 Samsung Electronics Co., Ltd. Semiconductor device with gate contact region formed in partial region of gate runner

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018055719A1 (ja) 2016-09-23 2018-03-29 三菱電機株式会社 炭化珪素半導体装置
JP2021150122A (ja) 2020-03-18 2021-09-27 株式会社リコー 蓄電素子、電極、及び電極材料

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2950569B2 (ja) * 1990-03-01 1999-09-20 株式会社東芝 Mos型電界効果トランジスタ
JP5321377B2 (ja) * 2009-09-11 2013-10-23 三菱電機株式会社 電力用半導体装置
WO2011161721A1 (ja) * 2010-06-24 2011-12-29 三菱電機株式会社 電力用半導体装置
JP6164636B2 (ja) * 2013-03-05 2017-07-19 ローム株式会社 半導体装置
JP6135436B2 (ja) * 2013-10-04 2017-05-31 住友電気工業株式会社 炭化珪素半導体装置
JP6282088B2 (ja) * 2013-11-13 2018-02-21 三菱電機株式会社 半導体装置及びその製造方法
JP6617292B2 (ja) * 2014-05-23 2019-12-11 パナソニックIpマネジメント株式会社 炭化珪素半導体装置
DE102017108047A1 (de) * 2017-04-13 2018-10-18 Infineon Technologies Ag Halbleitervorrichtung mit struktur zum schutz gegen elektrostatische entladung
DE112020007341T5 (de) * 2020-06-24 2023-04-06 Mitsubishi Electric Corporation Siliciumcarbid-halbleitereinheit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018055719A1 (ja) 2016-09-23 2018-03-29 三菱電機株式会社 炭化珪素半導体装置
JP2021150122A (ja) 2020-03-18 2021-09-27 株式会社リコー 蓄電素子、電極、及び電極材料

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP4712139A1 (en) * 2024-09-12 2026-03-18 Samsung Electronics Co., Ltd. Semiconductor device with gate contact region formed in partial region of gate runner

Also Published As

Publication number Publication date
WO2023042508A1 (ja) 2023-03-23
JPWO2023042508A1 (https=) 2023-03-23
CN117693824A (zh) 2024-03-12
US20240371766A1 (en) 2024-11-07

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Legal Events

Date Code Title Description
R079 Amendment of ipc main class

Free format text: PREVIOUS MAIN CLASS: H01L0029780000

Ipc: H10D0030600000

R081 Change of applicant/patentee

Owner name: MITSUMI ELECTRIC CO., LTD., TAMA-SHI, JP

Free format text: FORMER OWNER: SUMITOMO ELECTRIC INDUSTRIES, LTD., OSAKA, JP