DE1100178B - Verfahren zur Herstellung von anlegierten Elektroden an Halbleiter-koerpern aus Silizium oder Germanium - Google Patents

Verfahren zur Herstellung von anlegierten Elektroden an Halbleiter-koerpern aus Silizium oder Germanium

Info

Publication number
DE1100178B
DE1100178B DEW22106A DEW0022106A DE1100178B DE 1100178 B DE1100178 B DE 1100178B DE W22106 A DEW22106 A DE W22106A DE W0022106 A DEW0022106 A DE W0022106A DE 1100178 B DE1100178 B DE 1100178B
Authority
DE
Germany
Prior art keywords
antimony
solution
gold
semiconductor
plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DEW22106A
Other languages
German (de)
English (en)
Inventor
John Francis Pudvin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of DE1100178B publication Critical patent/DE1100178B/de
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/54Contact plating, i.e. electroless electrochemical plating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Chemically Coating (AREA)
  • ing And Chemical Polishing (AREA)
DEW22106A 1957-01-02 1957-10-26 Verfahren zur Herstellung von anlegierten Elektroden an Halbleiter-koerpern aus Silizium oder Germanium Pending DE1100178B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US632228A US2916806A (en) 1957-01-02 1957-01-02 Plating method

Publications (1)

Publication Number Publication Date
DE1100178B true DE1100178B (de) 1961-02-23

Family

ID=24534632

Family Applications (1)

Application Number Title Priority Date Filing Date
DEW22106A Pending DE1100178B (de) 1957-01-02 1957-10-26 Verfahren zur Herstellung von anlegierten Elektroden an Halbleiter-koerpern aus Silizium oder Germanium

Country Status (6)

Country Link
US (1) US2916806A (US07922777-20110412-C00004.png)
BE (1) BE562375A (US07922777-20110412-C00004.png)
CH (1) CH359483A (US07922777-20110412-C00004.png)
DE (1) DE1100178B (US07922777-20110412-C00004.png)
FR (1) FR1190078A (US07922777-20110412-C00004.png)
GB (1) GB833828A (US07922777-20110412-C00004.png)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1194504B (de) * 1962-09-14 1965-06-10 Siemens Ag Verfahren zur Herstellung von Halbleiter-anordnungen

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3031747A (en) * 1957-12-31 1962-05-01 Tung Sol Electric Inc Method of forming ohmic contact to silicon
US3124868A (en) * 1960-04-18 1964-03-17 Method of making semiconductor devices
US3172829A (en) * 1961-01-24 1965-03-09 Of an alloy to a support
US3349476A (en) * 1963-11-26 1967-10-31 Ibm Formation of large area contacts to semiconductor devices
US3325702A (en) * 1964-04-21 1967-06-13 Texas Instruments Inc High temperature electrical contacts for silicon devices
US3421206A (en) * 1965-10-19 1969-01-14 Sylvania Electric Prod Method of forming leads on semiconductor devices
US3438121A (en) * 1966-07-21 1969-04-15 Gen Instrument Corp Method of making a phosphorous-protected semiconductor device
US3465428A (en) * 1966-10-27 1969-09-09 Trw Inc Method of fabricating semiconductor devices and the like
JPS5946415B2 (ja) * 1978-04-28 1984-11-12 株式会社日立製作所 半導体装置の製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE500302A (US07922777-20110412-C00004.png) * 1949-11-30
BE506280A (US07922777-20110412-C00004.png) * 1950-10-10

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1194504B (de) * 1962-09-14 1965-06-10 Siemens Ag Verfahren zur Herstellung von Halbleiter-anordnungen
DE1194504C2 (de) * 1962-09-14 1966-03-03 Siemens Ag Verfahren zur Herstellung von Halbleiter-anordnungen

Also Published As

Publication number Publication date
FR1190078A (fr) 1959-10-09
US2916806A (en) 1959-12-15
CH359483A (de) 1962-01-15
GB833828A (en) 1960-04-27
BE562375A (US07922777-20110412-C00004.png)

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