DE102008061962A8 - Halbleitervorrichtung mit Super Junction - Google Patents

Halbleitervorrichtung mit Super Junction Download PDF

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Publication number
DE102008061962A8
DE102008061962A8 DE102008061962A DE102008061962A DE102008061962A8 DE 102008061962 A8 DE102008061962 A8 DE 102008061962A8 DE 102008061962 A DE102008061962 A DE 102008061962A DE 102008061962 A DE102008061962 A DE 102008061962A DE 102008061962 A8 DE102008061962 A8 DE 102008061962A8
Authority
DE
Germany
Prior art keywords
semiconductor device
super junction
super
junction
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE102008061962A
Other languages
English (en)
Other versions
DE102008061962A1 (de
DE102008061962B4 (de
Inventor
Yuma Kariya-shi Kagata
Jun Kariya-shi Sakakibara
Hitoshi Kariya-shi Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Publication of DE102008061962A1 publication Critical patent/DE102008061962A1/de
Publication of DE102008061962A8 publication Critical patent/DE102008061962A8/de
Application granted granted Critical
Publication of DE102008061962B4 publication Critical patent/DE102008061962B4/de
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
    • H01L29/1033Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/1041Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface
    • H01L29/1045Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface the doping structure being parallel to the channel length, e.g. DMOS like
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/66712Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/66734Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the gate electrode, e.g. to form a trench gate electrode

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Composite Materials (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE102008061962.0A 2007-12-17 2008-12-12 Halbleitervorrichtung mit Super Junction Expired - Fee Related DE102008061962B4 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007325175A JP4530036B2 (ja) 2007-12-17 2007-12-17 半導体装置
JP2007-325175 2007-12-17

Publications (3)

Publication Number Publication Date
DE102008061962A1 DE102008061962A1 (de) 2009-06-25
DE102008061962A8 true DE102008061962A8 (de) 2009-11-19
DE102008061962B4 DE102008061962B4 (de) 2017-02-09

Family

ID=40690248

Family Applications (1)

Application Number Title Priority Date Filing Date
DE102008061962.0A Expired - Fee Related DE102008061962B4 (de) 2007-12-17 2008-12-12 Halbleitervorrichtung mit Super Junction

Country Status (5)

Country Link
US (1) US7859048B2 (de)
JP (1) JP4530036B2 (de)
KR (1) KR101066988B1 (de)
CN (1) CN101465370B (de)
DE (1) DE102008061962B4 (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8438269B1 (en) * 2008-09-12 2013-05-07 At&T Intellectual Property I, Lp Method and apparatus for measuring the end-to-end performance and capacity of complex network service
JP5543758B2 (ja) * 2009-11-19 2014-07-09 ルネサスエレクトロニクス株式会社 半導体装置
CN102456715B (zh) * 2010-10-25 2015-06-03 上海华虹宏力半导体制造有限公司 一种半导体器件结构及其制作方法
CN102738207B (zh) * 2011-04-07 2014-12-10 上海华虹宏力半导体制造有限公司 超级结器件的终端保护结构及制造方法
TW201310641A (zh) * 2011-08-19 2013-03-01 Anpec Electronics Corp 功率電晶體元件及其製作方法
CN103035677B (zh) * 2011-09-30 2015-08-19 上海华虹宏力半导体制造有限公司 超级结结构、超级结mos晶体管及其制造方法
TWI469351B (zh) * 2011-11-29 2015-01-11 Anpec Electronics Corp 具有超級介面之功率電晶體元件及其製作方法
JP2013175655A (ja) * 2012-02-27 2013-09-05 Toshiba Corp 電力用半導体装置及びその製造方法
CN103681321B (zh) * 2012-09-17 2016-05-18 中国科学院微电子研究所 一种高压超结igbt的制作方法
JP2014060299A (ja) * 2012-09-18 2014-04-03 Toshiba Corp 半導体装置
US9496331B2 (en) * 2012-12-07 2016-11-15 Denso Corporation Semiconductor device having vertical MOSFET with super junction structure, and method for manufacturing the same
JP6253885B2 (ja) * 2013-01-07 2017-12-27 ルネサスエレクトロニクス株式会社 縦型パワーmosfet
KR101795828B1 (ko) * 2013-09-17 2017-11-10 매그나칩 반도체 유한회사 초접합 반도체 소자 및 제조 방법
CN103730372B (zh) * 2013-12-27 2016-06-08 西安龙腾新能源科技发展有限公司 一种可提高器件耐压的超结制造方法
CN103904120B (zh) * 2014-03-28 2017-01-11 北京中科新微特科技开发股份有限公司 一种具有网状外延结构的超结mosfet
JP6782529B2 (ja) * 2015-01-29 2020-11-11 富士電機株式会社 半導体装置
JP6510280B2 (ja) 2015-03-11 2019-05-08 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
DE102016115559B4 (de) * 2016-08-22 2020-06-04 Infineon Technologies Austria Ag Transistorbauelement mit verbesserter leckstromcharakteristik
DE102016115805B4 (de) 2016-08-25 2020-07-09 Infineon Technologies Austria Ag Transistorbauelement mit hoher lawinen-festigkeit
JP6850659B2 (ja) * 2017-03-31 2021-03-31 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
CN111133586B (zh) * 2017-10-05 2023-04-07 三菱电机株式会社 半导体装置
JP7081876B2 (ja) 2017-12-19 2022-06-07 ラピスセミコンダクタ株式会社 半導体装置及び半導体装置の製造方法
CN111200007B (zh) * 2018-11-20 2023-01-06 深圳尚阳通科技有限公司 超结器件及其制造方法
CN111341829B (zh) * 2018-12-18 2022-08-30 深圳尚阳通科技有限公司 超结结构及其制造方法
CN111341830B (zh) * 2018-12-18 2022-08-30 深圳尚阳通科技有限公司 超结结构及其制造方法
CN110212018B (zh) * 2019-05-20 2022-08-16 上海华虹宏力半导体制造有限公司 超结结构及超结器件
CN113488388A (zh) * 2021-06-07 2021-10-08 西安电子科技大学 一种沟槽栅超结vdmosfet半导体器件及其制备方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4304433B2 (ja) * 2002-06-14 2009-07-29 富士電機デバイステクノロジー株式会社 半導体素子
US20080017897A1 (en) * 2006-01-30 2008-01-24 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing same
JP2007300034A (ja) * 2006-05-02 2007-11-15 Toshiba Corp 半導体装置及び半導体装置の製造方法
DE102007004616B4 (de) * 2006-01-31 2014-01-23 Denso Corporation Halbleitervorrichtung mit Super-Junction-Struktur und Verfahren zur Herstellung derselben

Also Published As

Publication number Publication date
KR101066988B1 (ko) 2011-09-23
DE102008061962A1 (de) 2009-06-25
US7859048B2 (en) 2010-12-28
KR20090065459A (ko) 2009-06-22
JP2009147234A (ja) 2009-07-02
JP4530036B2 (ja) 2010-08-25
CN101465370A (zh) 2009-06-24
CN101465370B (zh) 2010-08-18
US20090321819A1 (en) 2009-12-31
DE102008061962B4 (de) 2017-02-09

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