CN2530351Y - 影像感测器 - Google Patents
影像感测器 Download PDFInfo
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- CN2530351Y CN2530351Y CN02201675U CN02201675U CN2530351Y CN 2530351 Y CN2530351 Y CN 2530351Y CN 02201675 U CN02201675 U CN 02201675U CN 02201675 U CN02201675 U CN 02201675U CN 2530351 Y CN2530351 Y CN 2530351Y
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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Abstract
一种影像感测器。为提供一种简化生产制程、制造方便、降低生产成本、保护导线、使讯号传递效果更佳、提高生产良率的感测器,提出本实用新型,它包括基板、设置于基板上表面的影像感测晶片、连接基板及影像感测晶片的复数条导线、黏设于基板上表面并位于影像感测晶片周边高度略大于影像感测晶片的厚度的胶体及覆盖于影像感测晶片上方的透光层。
Description
技术领域
本实用新型属于感测器,特别是一种影像感测器。
背景技术
一般感测器可用来感测为光讯号、声音讯号或影像讯号的讯号,影像感测器系用来接收光讯号或影像讯号。当接收该光讯号后,可透过影像感测器将光讯号转变成电讯号,藉由基板传递至电路板上。
如图1所示,习知的影像感测器包括上、下表面分别形成有第一、二连接点24的基板10、形成设于基板10上并与基板10形成凹槽11的间隔器(spacer)12、放置于基板10与间隔器12所形成的凹槽11内的影像感测晶片14,其上形成有复数个焊垫20、电连接影像感测晶片14的焊垫20与基板10的第一连接点18的复数条导线16及以黏胶23黏着置放于间隔器12上的透光层22。
影像感测器的封装方法包括提供上、下表面分别形成有第一连接点18及第二连接点24的基板10;形成设于基板10上并与基板10形成凹槽11的间隔器(spacer)12;放置于基板10与间隔器12所形成的凹槽11内的影像感测晶片14,其上形成有复数个焊垫20;以复数条导线16电连接影像感测晶片14的焊垫20与基板10的第一连接点18;系先行涂布一层黏胶23,再将透光层22黏着置放于间隔器12上,将影像感测晶片14包覆住;即完成光感测器的封装。
如上的影像感测器具有如下缺点:
1、其封装时必须将间隔器12先行设置于基板10上,再于透光层22涂布一层黏胶23,而后黏着于间隔器12上,在制造上较为繁琐。
2、在覆盖透光层22时,由于复数条导线16未被保护住,因此,外界的杂质易损及复数条导线16,从而影响到影像感测晶片14讯号传递效果,使整体的生产良率降低。
发明内容
本实用新型的目的是提供一种简化生产制程、制造方便、降低生产成本、保护导线、使讯号传递效果更佳、提高生产良率的影像感测器。
本实用新型包括基板、设置于基板上表面的影像感测晶片、复数条导线、黏设于基板上表面并位于影像感测晶片周边的胶体及覆盖于影像感测晶片上方的透光层;基板设有形成复数个第一接点的上表面及形成复数个用以电连接至印刷电路板第二接点的下表面;影像感测晶片上设有复数个焊垫;复数条导线设有电连接至影像感测晶片的焊垫的第一端点及电连接至基板的第一接点的第二端点;胶体环绕住影像感测晶片,其高度略大于影像感测晶片的厚度。
其中:
胶体包覆住复数条导线。
透光层系藉由胶体本身的黏着力直接黏附于胶体上。
由于本实用新型包括上、下表面分别设有接点的基板、设置于基板上表面设有焊垫的影像感测晶片、连接基板接点及影像感测晶片焊垫的复数条导线、黏设于基板上表面并位于影像感测晶片周边的胶体及覆盖于影像感测晶片上方的透光层;胶体环绕住影像感测晶片,其高度略大于影像感测晶片的厚度;以胶体作为间隔器,将透光层黏着于胶体上,用以覆盖住影像感测晶片,在制程上较为简便,从而可降低生产成本;用胶体包覆住复数条导线,可使复数条导线免于受外界杂质的污染,可提高讯号传递效果,而提升产品的良率;透光层系藉由胶体本身的黏着力而黏着于胶体上,可简化习知涂胶的作业,可降低生产成本;不仅简化生产制程、制造方便、降低生产成本,而且保护导线、使讯号传递效果更佳、提高生产良率,从而达到本实用新型的目的。
附图说明
图1、为习知的影像感测器结构示意剖视图。
图2、为本实用新结构示意剖视图。
图3、为本实用新型封装过程示意图。
图4、为本实用新型封装过程示意图。
图5、为本实用新型封装过程示意图。
具体实施方式
如图2所示,本实用新型包括基板30、影像感测晶片32、复数条导线34、胶体36及透光层38。
基板30设有上表面40及下表面42。上表面40形成有复数个第一接点44。下表面42形成有复数个用以电连接至印刷电路板的第二接点46。
影像感测晶片32系藉由黏着层50黏着于基板30的上表面40,其上设有复数个焊垫48。
复数条导线34设有电连接至影像感测晶片32的焊垫48的第一端点52及电连接至基板30的第一接点44的第二端点54,以使影像感测晶片32的讯号传递至基板30上。
胶体36系黏设于基板10的上表面40并位于影像感测晶片32周边,环绕住影像感测晶片32且包覆住复数条导线34,以保护复数条导线34。胶体36的高度略大于影像感测晶片32的厚度。
透光层38系藉由胶体36的黏着性黏设于胶体36上,从而将影像感测晶片32覆盖住。
如此,藉由胶体36环绕住影像感测晶片32,使透光层38直接覆盖于胶体36上,可简化生产程序及降低生产成本,且藉由胶体保护住复数条导线34,可提高讯号的传递效果,而达到本实用新型的功效及目的。
如图3、图4、图5所示,本实用新型封装时:
首先提供设有上、下表面40、42的基板30,上表面40形成有复数个第一接点44,下表面42形成有复数个用以电连接至一印刷电路板的第二接点46;将一个或复数个设有复数焊垫的影像感测晶片32设置于基板30上,以复数条导线34的第一端点52电连接影像感测晶片32的焊垫48及第二端点54电连接至基板30的第一接点44;将胶体36涂布基板30的上表面40上,并位于每一影像感测晶片32周边,而将每一影像感测晶片32环绕住且包覆住复数条导线34;胶体36的高度略大于影像感测晶片32的高度;复数个透光层38覆盖于胶体36上,使各透光层38对应于每一影像感测晶片32;透光层38系藉由胶体36本身的黏着力直接黏附于胶体36上,以覆盖住影像感测晶片32;最后再将封装完成的影像感测器予以裁切成如图2所示为单颗封装成品的影像感测器。
如上所述,本实用新型具有如下优点:
1、以胶体36作为间隔器,将透光层38直接黏着于胶体36上,用以覆盖住影像感测晶片32,在制程上较为简便,而可降低生产成本。
2、用胶体36包覆住复数条导线34,可使复数条导线34免于受外界杂质的污染,可提高讯号传递效果,而提升产品的良率。
3、透光层38系藉由胶体36本身的黏着力而黏着于胶体36上,可简化习知涂胶的作业,可降低生产成本。
Claims (3)
1、一种影像感测器,它包括基板、设置于基板上表面的影像感测晶片、复数条导线及覆盖于影像感测晶片上方的透光层;基板设有形成复数个第一接点的上表面及形成复数个用以电连接至印刷电路板第二接点的下表面;影像感测晶片上设有复数个焊垫;复数条导线设有电连接至影像感测晶片的焊垫的第一端点及电连接至基板的第一接点的第二端点;其特征在于所述的基板上表面黏设有位于影像感测晶片周边的胶体,胶体环绕住影像感测晶片,其高度略大于影像感测晶片的厚度。
2、根据权利要求1所述的影像感测器,其特征在于所述的胶体包覆住复数条导线。
3、根据权利要求1所述的影像感测器,其特征在于所述的透光层系藉由胶体本身的黏着力直接黏附于胶体上。
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Cited By (1)
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CN112995480A (zh) * | 2021-01-22 | 2021-06-18 | 南昌欧菲光电技术有限公司 | 感光组件及其制造方法、摄像模组和电子设备 |
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CN112995480A (zh) * | 2021-01-22 | 2021-06-18 | 南昌欧菲光电技术有限公司 | 感光组件及其制造方法、摄像模组和电子设备 |
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