CN212907713U - 封装的功率电子设备 - Google Patents
封装的功率电子设备 Download PDFInfo
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- CN212907713U CN212907713U CN202021557997.8U CN202021557997U CN212907713U CN 212907713 U CN212907713 U CN 212907713U CN 202021557997 U CN202021557997 U CN 202021557997U CN 212907713 U CN212907713 U CN 212907713U
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Abstract
本公开的实施例涉及封装的功率电子设备,该设备具有:第一支撑元件,形成第一热耗散表面并且承载第一功率部件;第二支撑元件,形成第二热耗散表面并且承载第二功率部件;第一接触元件,叠置到第一功率部件;第二接触元件,叠置到第二功率部件;多个引线,通过第一支撑元件和/或第二支撑元件与功率部件电耦合;以及热传导性的主体,布置在第一接触元件与第二接触元件之间。第一支撑元件和第二支撑元件以及第一接触元件和第二接触元件由电绝缘并且热传导性的多层形成。
Description
技术领域
本公开涉及一种封装的功率电子设备,特别地涉及一种包括功率晶体管的电路。
背景技术
例如,电路可以包括在高电压(甚至高达600V-700V)处进行操作的功率设备,其中该高电压具有可以快速切换的电流,功率设备诸如是碳化硅或硅设备,诸如超结金属氧化物半导体场效应晶体管(MOSFET),绝缘栅双极型晶体管(IGBT)等。
对于这种电路和功率电子设备,期望特定的封装,其允许高的热耗散。这种封装通常由通常是平行六面体形状的(例如树脂的)绝缘刚性主体形成,嵌入有(多个)电子部件以及耗散结构,耗散结构被布置在(多个)电子部件之间、面向封装表面并且通常占据平行六面体形状的长底座的大部分。耗散结构有时由相同的金属支撑件(被称为“引线框架”,leadframe)形成,该金属支撑件承载了一个或多个裸片,裸片集成了一个或多个电子部件以及用于外部连接的多个引线。通常,在该情况下,引线框架具有一表面,该表面被布置为直接面对封装的外侧。
例如,在封装的设备包括MOSFET晶体管的情况下,集成了MOSFET晶体管的裸片通常具有在第一较大表面上的漏极焊盘(pad)、以及在与第一较大表面相对的第二较大表面上的至少两个接触焊盘(分别是源极焊盘和栅极焊盘)。晶体管接触焊盘(通常,漏极焊盘)附接到引线框架支撑部分,该引线框架支撑部分与一个或多个引线直接接触。其他接触焊盘(通常,栅极焊盘和源极焊盘)通过接合布线或夹件耦合到其他引线。这种标准封装通常具有被布置在耗散结构的相同侧的引线,并且因此通常允许向下耗散。
由于引线和引线框架支撑部分的适当配置,本申请人进一步开发了允许向上冷却的封装。例如,图1示出了集成设备1,集成设备1包括两个电子部件,该两个电子部件集成在相应的裸片2A、2B中,并且嵌入在以虚线示出的大致平行六面体形状的封装绝缘物质3中。集成设备1包括由DBC(直接接合的铜)多层形成的引线框架4,其包括第一金属传导性层、陶瓷的绝缘层和第二金属传导性层。金属传导性层中的一个金属传导性层(在图1中可见)被成形并且形成两个传导性部分5A、5B,该两个传导性部分5A、5B电分离,形成针对裸片2A、2B的相应支撑部分,并且直接耦合到裸片2A、2B的两个相应的栅极焊盘(不可见),并且耦合到自己的引线6。其他引线7通过形成引线框架4的一部分的传导性区域9、并且可能地通过布线8连接到裸片2A、2B的源极焊盘和栅极焊盘以及任何其他接触焊盘。
传导性部分5A、5B和9热耦合到热耗散区域10(图2A)并且与热耗散区域10电分离,热耗散区域10面向外并且与封装绝缘物质3的上表面齐平。
利用该类型的封装,可以形成不同的电路和部件拓扑,如图3A-图3I中所示。
但是,这种解决方案在电子设备由较大部件(诸如高功率和高切换电流MOSFET晶体管)形成和/或具有不同拓扑的情况下不是最佳的。
例如,可以参考图4的全桥电路图,该全桥电路图由15指示并且由四个MOSFET晶体管16-19(例如,N沟道)形成。MOSFET晶体管16-19可以是垂直类型的功率晶体管,其均被集成在自己的裸片(类似于图1的裸片2A和2B)中,在相应裸片的第一面上具有漏极电极,并且在相应裸片的相对面上具有源极电极和栅极电极。
以本身公知的方式,MOSFET晶体管16-19中的两个(以下称为第一和第二MOSFET晶体管16、17)在第一和第二供应节点21、22之间相互串联连接,并且两个其他MOSFET晶体管(以下称为第三和第四MOSFET晶体管18、19)在相同的供应端子21、22之间相互串联连接。第一与第二MOSFET晶体管16、17之间的第一中间节点23形成第一输出端子,并且第三和第四MOSFET晶体管18、19之间的第二中间节点24形成第二输出端子。
在图示的示例中,第一和第三MOSFET晶体管16、18具有彼此耦合并且耦合到第一供应节点21的漏极端子D、分别耦合到第一和第二中间节点23、24的源极端子S,以及分别耦合到第一和第三控制端子25、26的栅极端子G。第二和第四MOSFET晶体管17、19具有彼此耦合并且耦合到第二供应节点22的源极端子S、分别耦合到第一和第二中间节点23、24的漏极端子D,以及分别耦合到第二和第四控制端子27、28的栅极端子G。
附加地,在图示的示例中,为了对MOSFET晶体管16-19进行更好的接通和关断循环控制,使得被施加到相应栅极端子的控制电压不以地为基准,MOSFET晶体管16-19均具有另外的源极端子SD,其被称为驱动器源极端子30-33,其例如在意大利专利申请102017000113926和美国专利申请16/154,411(US 2019/0109225)中详细描述。
在集成了桥电路15的封装设备的设计中,供应节点21、22,中间节点23、24,控制端子25-28和驱动器源极端子30-33通过相应的接触焊盘和相应的引线耦合到外侧。然后在下文中,将使用相同的附图标记以不同方式参考端子/节点或接触焊盘21-28和30-33。
实用新型内容
发明人发现,传统的电子设备将占据较大的空间。
本公开的一个目的是提供一种克服了现有技术的至少一些缺点的封装解决方案。
在一方面中,提供了一种封装的电子设备,包括:具有第一面和第二面的第一支撑元件,第一支撑元件的第一面形成设备的第一热耗散表面;具有第一面和第二面的第二支撑元件,第二支撑元件的第一面形成设备的第二热耗散表面,第一支撑元件和第二支撑元件彼此叠置,其中相应的第二面彼此面对;第一功率部件,被附接到第二支撑元件的第二面;第二功率部件,被附接到第一支撑元件的第二面;第一接触元件,在第二功率部件上;第二接触元件,在第一功率部件上;第一引线,通过第一支撑元件与第一功率部件电耦合;第二引线,通过第二支撑元件与第二功率部件电耦合;以及热传导性的主体,被布置在第一接触元件与第二接触元件之间;其中第一支撑元件和第二支撑元件、以及第一接触元件和第二接触元件分别由电绝缘并且热传导性的多层形成。
在一些实施例中,第一支撑元件和第二支撑元件、以及第一接触元件和第二接触元件是直接接合的铜(DBC)多层。
在一些实施例中,热传导性的主体包括传导性材料的块。
在一些实施例中,热传导性的主体包括粘合物质。
在一些实施例中,第一支撑元件和第二支撑元件均包括第一传导性层、中间层和第二传导性层,第一支撑元件和第二支撑元件的第一传导性层分别形成设备的第一热耗散表面和第二热耗散表面,并且第一支撑元件和第二支撑元件的第二传导性层分别形成针对第一功率部件和第二功率部件的电接触区域。
在一些实施例中,第一功率部件和第二功率部件是第一功率晶体管和第二功率晶体管,该设备包括第三接触元件以及第三功率晶体管和第四功率晶体管,第三功率晶体管被附接到第一支撑元件的第二面,并且第四功率晶体管被附接到第二支撑元件的第二面,其中:第一接触元件与第二功率晶体管以及第四功率晶体管叠置并且电接触;第二接触元件与第一功率晶体管叠置并且电接触;第三接触元件与第三功率晶体管叠置并且电接触,第三接触元件由电绝缘并且热传导性的多层形成;并且第二接触元件和第三接触元件被并排布置并且彼此电绝缘。
在一些实施例中,第一功率晶体管、第二功率晶体管、第三功率晶体管和第四功率晶体管被电连接以形成全桥,并且均具有第一传导端子、第二传导端子和控制端子;第一接触元件包括与第二功率晶体管和第四功率晶体管的第一传导端子直接电接触的第一传导性层;第二接触元件包括与第一功率晶体管的第一传导端子电耦合的第一传导性层;并且第三接触元件包括与第三功率晶体管的第一传导端子电耦合的第一传导性层。
在一些实施例中,该设备还包括:第一布线和第二布线;以及第一耦合区域和第二耦合区域,在第一支撑元件与第一接触元件之间延伸,其中:第一支撑元件和第二支撑元件均包括第一传导性层、中间层和第二传导性层;第一支撑元件和第二支撑元件的第一传导性层分别形成设备的第一热耗散表面和第二热耗散表面;第一支撑元件和第二支撑元件的第二传导性层形成针对功率部件的电接触区域;并且第一支撑元件的第二传导性层包括:第一传导性区域和第二传导性区域,分别与第二功率晶体管和第四功率晶体管的第二传导端子电接触,第三传导性区域和第四传导性区域,分别通过第一布线和第二布线而相应地与第二功率晶体管和第四功率晶体管的控制端子耦合,以及第五传导性区域和第六传导性区域,分别通过第一耦合区域和第二耦合区域,与第一接触元件的第一传导性层耦合。
在一些实施例中,该设备还包括:第三布线和第四布线;以及传导性材料的第一连接柱元件和第二连接柱元件,其中:第二支撑元件的第二传导性层包括第七传导性区域、第八传导性区域和第九传导性区域,第七传导性区域与第一功率晶体管以及第三功率晶体管的第二传导端子电接触,并且第八传导性区域和第九传导性区域分别通过第三布线和第四布线与第一功率晶体管以及第三功率晶体管的控制端子耦合;并且第二接触元件和第三接触元件的第一传导性层,分别通过第一连接柱元件和第二连接柱元件被耦合到第一支撑元件的第五传导性区域和第六传导性区域。
在一些实施例中,该设备还包括电传导性材料的第一夹件元件和第二夹件元件,第一夹件元件在第二接触元件的第一传导性层与第一功率晶体管之间延伸,第二夹件元件在第三接触元件的第一传导性层与第三功率晶体管之间延伸,第一夹件元件具有第一突出部分,第一突出部分延伸超过第一功率晶体管、并且被电耦合到第一连接柱元件,并且第二夹件元件具有第二突出部分,第二突出部分延伸超过第三功率晶体管、并且被电耦合到第二连接柱元件。
在一些实施例中,第二接触元件和第三接触元件比第一功率晶体管和第三功率晶体管长,第二接触元件包括被耦合到第一连接柱元件的第一突出部分,并且第三接触元件包括被耦合到第二连接柱元件的第二突出部分。
在一些实施例中,该设备还包括:第一支撑柱部分,在第一突出部分与第二支撑元件之间延伸,并且与第一连接柱元件对准;第二支撑柱部分,在第二突出部分与第二支撑元件之间延伸,并且与第二连接柱元件对准,第一支撑柱部分和第二支撑柱部分均包括电绝缘并且热传导性的多层,并且第一支撑柱部分和第一连接柱元件形成第一对准和间隔结构,并且第二支撑柱部分和第二连接柱元件形成第二对准和间隔结构。
在一些实施例中,第一支撑元件和第二支撑元件均具有细长形状,细长形状具有第一纵向端和第二纵向端,其中第一对准和间隔结构、以及第二对准和间隔结构被布置为分别靠近第一支撑元件和第二支撑元件的第一纵向端,该设备包括:第三第四对准和间隔结构,靠近第一支撑元件的第二纵向端延伸,并且包括彼此对准的第三支撑柱部分和第一支撑柱元件;以及第四对准和间隔结构,靠近第二支撑元件的第二纵向端延伸,并且包括彼此对准的第四支撑柱部分和第二支撑柱元件,第三支撑柱部分和第四支撑柱部分均包括电绝缘的多层,第一支撑元件和第二支撑柱元件是传导性材料的。
在一些实施例中,该设备包括:第一多个引线,被附接到第一支撑元件的第一传导性区域、第二传导性区域、第三传导性区域、第四传导性区域、第五传导性区域和第六传导性区域;以及第二多个引线,被附接到第二支撑元件的第七传导性区域、第八传导性区域和第九传导性区域。
在另一方面中,提供了一种封装的功率电子设备,包括:具有第一面和第二面的第一支撑元件,第一支撑元件的第一面形成设备的第一热耗散表面;具有第一面和第二面的第二支撑元件,第二支撑元件的第一面形成设备的第二热耗散表面,第一支撑元件和第二支撑元件彼此叠置,其中相应的第二面彼此面对;第一功率部件,被附接到第一支撑元件的第二面;第二功率部件,被附接到第二支撑元件的第二面;第一接触元件,在第二功率部件上;第二接触元件,在第一功率部件上;以及热传导性的主体,被布置在第一接触元件和第二接触元件之间;其中第一支撑元件和第二支撑元件、以及第一接触元件和第二接触元件分别由电绝缘并且热传导性的多层形成。
在一些实施例中,第一支撑元件和第二支撑元件均包括第一传导性层、中间层和第二传导性层,第一支撑元件和第二支撑元件的第一传导性层分别形成设备的第一热耗散表面和第二热耗散表面,并且第一支撑元件和第二支撑元件的第二传导性层分别形成针对第一功率部件和第二功率部件的电接触区域。
在一些实施例中,第一功率部件和第二功率部件是第一功率晶体管和第二功率晶体管,设备包括第三接触元件以及第三功率晶体管和第四功率晶体管,第三功率晶体管被附接到第一支撑元件的第二面,并且第四功率晶体管被附接到第二支撑元件的第二面,其中:第一接触元件与第二功率晶体管以及第四功率晶体管叠置并且电接触;第二接触元件与第一功率晶体管叠置并且电接触;第三接触元件与第三功率晶体管叠置并且电接触,第三接触元件由电绝缘并且热传导性的多层形成;并且第二接触元件和第三接触元件被并排布置并且彼此电绝缘。
本公开的实施例能够实现紧凑的功率电子设备结构。
附图说明
为了更好地理解本公开,现在参考附图,仅通过非限制性示例的方式来描述其实施例,其中:
图1是已知封装的电子设备的具有虚拟部分的俯视透视图;
图2A和图2B分别是图1的封装的电子设备的俯视透视图和仰视透视图;
图3A-图3I示出了可实现为图1的封装的电子设备的电路拓扑;
图4示出了已知类型的全桥电路;
图5是图4的全桥电路的可能实施方式的俯视图,其与图1的封装的电子设备类似地形成;
图6示出了图5的可能实施方式的横截面;
图7示出了利用本设备可获得的类型的全桥电路;
图8示出了裸片的一部分的简化横截面,该裸片集成了在图7的桥电路中可使用的已知功率MOSFET器件;
图9是沿图10A的线IX-IX截取的本封装的电子设备的可能实施方式的横截面;
图10A和图10B是图9的设备的两个部分在中间制造步骤中的平面图;
图11和图12分别是图9的封装的设备的一些部分的相互布置的不同实施例的平面图和透视图;
图13是图9的封装的设备的分解图;
图14A和图14B分别是图9的封装的设备的仰视透视图和俯视透视图;
图15A-图15D是图9的设备的一部分的简化透视表示;
图16-图19是图9的设备的细节的不同实施例的横截面;以及
图20A-图20D是类似于图15A-图15D的不同的封装的电子设备的一部分的简化透视表示。
具体实施方式
为了使用类似于图1、图2A和图2B的向上冷却封装,按照图5中示出的方式来布置MOSFET晶体管16-19是可想到的,其中,MOSFET晶体管16-19由引线框架35承载,引线框架35提供有引线。图5还示出了桥电路15的端子/节点21-28和30-33与引线之间的可能的电连接。在图5中,为了清楚起见,引线利用与桥电路15的相应端子/节点相同的附图标记标识,并且除了供应节点21、22之外,其利用上标(引线23’-28’和30’-33’)标识,供应节点21、22中的每一者分别耦合到两个不同的引线21’、21”;22’、22”。
在图5中,形成为DBC多层的引线框架35包括第一、第二和第三传导性区域36、37和38,其并排布置但彼此电绝缘,以承载MOSFET晶体管16-19。特别地,第一传导性区域36承载并排布置的第一和第三MOSFET晶体管16、18,使得相应的漏极端子D与第一传导性区域36接触;第二传导性区域37承载第二MOSFET晶体管17,使得其漏极端子D与第二传导性区域37接触;并且第三传导性区域38承载第四MOSFET晶体管19,使得其漏极端子D与第三传导性区域38接触。
驱动器源极焊盘30-33和栅极焊盘25-28布置在MOSFET晶体管16-19的上表面上,通过相应的钝化层(未编号)中的对应开口(也未编号)暴露。接合布线40将驱动器源极焊盘30-33和栅极焊盘25-28连接到相应的引线30’-33’和25’-28’。
在俯视图中呈L形的第一和第二夹件41、42将第一和第三MOSFET晶体管16、18的源极端子S分别耦合到第二和第三传导性区域37、38,第二和第三传导性区域37、38进而分别耦合到引线23’和24’,并且因此形成第一和第二中间节点23、24。在所示的配置的情况下,由于MOSFET晶体管16-19具有被布置在相对于传导性区域36-38的不同层级上的源极端子S,第一和第二夹件41、42具有非平面形状,其如图6的截面中关于第一夹件41所示的。然而,相同的考虑也适用于第二夹件42。
具体地,第一夹件41具有与第一MOSFET晶体管16的源极焊盘接触的第一水平部分41A。附加地,第一夹件41具有垂直部分41B,垂直部分41B侧向(laterally)于第一MOSFET晶体管16延伸,通过未示出的绝缘层、或通过集成了MOSFET晶体管16的裸片的钝化与第一MOSFET晶体管16绝缘;并且第一夹件41具有第二水平部分41C,第二水平部分在引线框架35上延伸,接合到第三传导性区域37和引线23’。
类似地,第三夹件43将第二和第四MOSFET晶体管17、19的源极端子S(彼此电连接,图4)耦合到引线22’、22”,引线22’、22”与图5的第二供应节点22连接。为此,还参见图6,第三夹件43具有第一水平部分43A、垂直部分43B和水平部分43C,第一水平部分43A在第二和第四MOSFET晶体管17、19的上表面之上延伸,与第二和第四MOSFET晶体管17、19的源极接触;垂直部分43B和水平部分43C分别接合到传导性材料的耦合区域47’和47”,耦合区域47’和47”在水平部分43C与相应的引线22’、22”之间延伸。
但是,这种解决方案虽然允许从顶部进行冷却,但并不是最佳的。
实际上,随着MOSFET晶体管16-19的尺寸增加,封装的设备(具有图2A和图2B中所示的外部形状)将占据很多空间,并且在一些应用中将达到不可接受的整体尺寸。附加地,在高电压和快速可切换电流的情况下,热耗散可能是不充足的。
图7-图15D示出了实现全桥电路100的设备50,全桥电路100类似于图4的全桥电路15,并且为了描述简单起见在图7中再次展示。
具体地,设备50包括四个集成部件,这里是四个MOSFET晶体管51-54,并且在下面被指示为第一、第二、第三和第四MOSFET晶体管51-54。每个MOSFET晶体管51-54被集成在自己的裸片中,并且可以制作为如图8中所示。
特别地,图8示出了电荷平衡(也被称为超结)MOSFET器件的结构,为了更好地理解,在下文中对其进行简要描述。
参考图8(其中为了清楚起见,各个区域未按比例),MOSFET晶体管,这里,第一MOSFET晶体管51(以及其他MOSFET器件52-54)被集成裸片220中,裸片220包括半导体材料(通常为硅)的主体202,主体202具有上表面202A、后表面202B并且具有第一传导性类型(例如N)。主体202定义了有源区203和边缘区204,并且主体安置有第二传导性类型(这里,P型)的多个柱206,N型外延层区在多个柱206之中延伸。主体区域207(这里,P型)从主体202的上表面202A延伸到布置在有源区203中的柱206的上端,并且容纳N型的源极区域208。
在成对的相邻柱206之间,栅极区域211以相对于源极区域208侧向偏移(laterally offset)的方式,在主体202的上表面202A上方延伸,栅极区域211与主体202电绝缘并且被绝缘区域212包围。源极金属化213在主体202的有源区203上方,在栅极区域211之上延伸(但与其电绝缘),并且具有一接触部分,该接触部分在成对的相邻栅极区域211之间朝向主体202的上表面延伸,与源极区域208直接电接触。源极金属化213的一部分(一个在图8中可见)通过窗口214从外侧可访问,并且形成针对外部电连接的源极焊盘213A。
电连接到栅极区域211的栅极金属化216在电介质层215上延伸,并且形成针对外部电连接的栅极焊盘216A。上钝化层217覆盖电介质层215,暴露源极焊盘213A和栅极焊盘216A。漏极金属化218在主体202的后表面202B上延伸,与主体202直接电接触,覆盖整个后表面202B,并且形成MOSFET晶体管51的漏极端子D。
再次参考图7,第一和第二MOSFET晶体管51、52在桥电路100的第一和第二供应端子101、102之间相互串联连接;第三和第四MOSFET晶体管53、54在相同的供应端子101、102之间相互串联连接。第一和第二MOSFET晶体管51、52之间的第一中间节点103形成第一输出端子,并且第三和第四MOSFET晶体管53、54之间的第二中间节点104形成桥电路100的第二输出端子104。
在图7中,利用105-108进一步指示MOSFET晶体管51-54的栅极端子,并且利用110-113进一步指示MOSFET晶体管51-54的驱动器源极端子。
图9、图10A和图10B、图15A-图15D示出了设备50的可能实施方式。应当注意,图10A和图10B示出了设备50的两个部分,并且完整的设备50通过将一个部分翻转到另一个部分之上来获得(例如,图10B的结构绕着图纸的在两个图10A、图10B之间延伸的垂直轴线翻转)。在下文中,附加地,将参考图9中所示的空间位置来描述设备50,即设备50的第一较大表面50A(通常是平行六面体形状)面对向下布置(并且因此在下面也被定义为下表面50A)并且第二较大表面50B面向上布置(并且因此在下面也被定义为上表面50B)。因此,指示“上”、“下”、“高”、“低”等仅指代图9的空间位置。特别地,图9-图15D的实施例指代一种解决方案,在该解决方案中,外部连接引线在设备的下部区中突出到设备50的壳体之外,与下表面50A基本对准。
参考图9、图10A和图10B,MOSFET晶体管51-54在两个重叠的层级上被两两(two bytwo)地布置。在所考虑的示例中,第一MOSFET晶体管51和第三MOSFET晶体管53(形成桥电路100的上部晶体管)在上层级(upper level)上相互并排布置,其中相应的漏极金属化218面对朝向上。第二和第四MOSFET晶体管52、54布置在下层级(lower level)上,相应的漏极金属化218被布置为面对朝向下。第二和第四MOSFET晶体管52、54由第一支撑元件56承载;第一MOSFET晶体管51和第三MOSFET晶体管53由第二支撑元件57承载。在图9的横截面中,仅第一和第二MOSFET晶体管51、52是可见的。
第一以及第二对准和间隔结构(alignment and spacing structure)89,第三以及第四对准和间隔结构90在第一与第二支撑元件56、57之间,靠近其相对的纵向(longitudinal)端延伸。
如图13中所示,第一支撑元件56具有第一面56’和第二面56”,第一面56’与设备50的第一较大表面50A共面;第二支撑元件57具有第一面57’和有第二面57”,第一面57’与设备50的第二较大表面50B共面。
如图9中可见的,第一支撑元件56由DBC(Direct Bonded Copper,直接接合的铜)多层形成,该DBC多层包括由第一传导性层56A(通常是铜)、陶瓷绝缘层56B(通常是氧化铝)和第二传导性层56C(通常是铜)形成的堆叠。类似地,第二支撑元件57由DBC多层形成,该DBC多层包括由第一传导性层57A(通常是铜)、陶瓷绝缘层57B(通常是氧化铝)和第二传导性层57C(通常是铜)形成的堆叠。
在图9中,第一支撑元件56的第一传导性层56A布置在底部,第一支撑元件56的第二传导性层56C布置在顶部,而第二支撑元件57的第一传导性层57A布置在顶部,第二支撑元件57的第二传导性层57C布置在底部。
MOSFET晶体管51、53通过电传导性粘合区域61C、61D接合到支撑元件57的第二传导性层57C,并且MOSFET晶体管52、54通过电传导性粘合区域61A、61B接合到支撑元件56的第二传导性层56C(也参见图13)。
如图10A中可见的,第一支撑元件56的第二传导性层56C被成形并且形成十个分离的传导性区域58A-58J,如下面详细讨论的,形成两个第一漏极传导性区域58A、58B,两个第一栅极传导性区域58C、58D,两个驱动器源极传导性区域58E、58F,两个第一源极区域58G、58H以及两个绝缘的传导性区域58I、58J。如下面详细说明的,相应的输出引线59A-59H被接合到传导性区域58A-58H。
特别地,第二和第四MOSFET晶体管52、54的漏极金属化218分别接合到两个第一漏极传导性区域58A、58B。类似地,分别形成桥电路100的第一和第二输出端子103、104的漏极引线59A、59B也分别接合到两个第一漏极传导性区域58A、58B。此外,传导性材料的(例如,铜的)第一和第二连接柱67、68从第一漏极传导性区域58A、58B朝向第二支撑元件57延伸。
第一接触元件60在第二和第四MOSFET晶体管52、54上方延伸,并且将其源极焊盘213A(图8)彼此电连接。第一接触元件60,跨越第二和第四MOSFET晶体管52、54布置,并且具有使得仅覆盖其面积的一部分(例如,这里大约三分之二)的尺寸,图10A在此也是DBC多层(在图12中也可见)并且包括由第一传导性层60A(通常是铜)、例如陶瓷的中间绝缘层60B(通常是氧化铝)和第二传导性层60C(通常是铜)形成的堆叠。
第一接触元件60的第一传导性层60A布置在底部,并且第一接触元件60的第二传导性层60C布置在顶部。如在图16-图19中所示并且在下文中所描述的,第一接触元件60的第一传导性层60A与第二和第四MOSFET晶体管52、54的源极焊盘213A(图8)直接电接触。
第一接触元件60具有一长度(在平行于第一笛卡尔轴线X的方向上),该长度大于第二和第四MOSFET晶体管52、54,并且第一接触元件60在到第二和第四MOSFET晶体管52、54的一侧(图9和图10A中的左侧)上突出。第一传导性层60A的突出超过第一和第三晶体管51、53的部分与耦合区域64G、64H直接电接触,耦合区域64G、64H如图10A中虚线所示的,其均从相应的第一源极传导性区域58G、58H延伸,并且因此电耦合到第一源极引线59G、59H。以该方式,通过第一接触元件60的第一传导性层60A,第二和第四MOSFET晶体管52、54的源极区域207(图8)彼此电耦合并且电耦合到第一源极引线59G、59H,并且这些形成桥电路100的第二供应端子102(图7)。
另外的源极焊盘213E’未被第一接触元件60覆盖并且在图10A中可见,另外的源极焊盘213E’通过第一驱动器源极布线62E连接到第一驱动器源极传导性区域58E。同样,另一个另外的源极焊盘213F’也未被第一接触元件60覆盖并且在图10A中可见,另一个另外的源极焊盘213F’通过另一个第一驱动器源极布线62F连接到其他第一驱动器源极传导性区域58F。第一驱动器源极引线59E、59F接合到第一驱动器源极传导性区域58E、58F,并且形成桥电路100(图7)的驱动器源极端子111、113。
第二和第四MOSFET晶体管52、54的栅极焊盘216A也面对晶体管52、54的上表面,侧向于第一接触元件60,并且栅极焊盘216A通过第一栅极布线65C、65D连接到第一栅极传导性区域58C、58D。第一栅极引线59C、59D接合到第一栅极传导性区域58C、58D,并且形成桥电路100的栅极端子106、108(图7)。
如上所述,第二支撑元件57承载第一和第三MOSFET晶体管51、53(图9和图10B)。
特别参考图10B,第二支撑元件57的第一传导性层57A在这里形成五个传导性区域76A、76C-76F(也参见图13),包括单个第二漏极传导性区域76A,两个第二栅极传导性区域76C、76D以及两个第二驱动器源极传导性区域76E、76F。输出引线77A-77F接合到传导性区域76A、76C-76F,如下面详细说明的。
这里,第一和第三MOSFET晶体管51、53的漏极金属化218(图8)直接接合到第二漏极传导性区域76A,并且然后被电耦合。此外,第二漏极引线77A、77B接合到第二漏极传导性区域76A,并且因此彼此电耦合并且形成桥电路100的第一供应端子101(图7)。
第二和第三接触元件80、81分别耦合到第一和第三MOSFET晶体管51、53,并且在图9中在第一和第三MOSFET晶体管51、53下方延伸。第二和第三接触元件80、81并排布置在相同的层级处,但如下所解释的是电绝缘的。在图9、图10A、图10B的实施例中,第二和第三接触元件80、81也是大致平行六面体形状,在第一笛卡尔轴线X的方向上伸长,第二和第三接触元件80、81在宽度方向上(与第二笛卡尔轴线Y平行)相对于第一接触元件60偏移,但如图9中可见的,第二和第三接触元件80、81在长度方向上(平行于第一笛卡尔轴线X)相对于第一接触元件60恰好叠置(exactly superimposed)。
根据在图11和图12中示出的不同的实施例,第二和第三接触元件80、81也在长度方向上,对第一接触元件60对称地相对于第一接触元件60偏移。
这里,第二和第三接触元件80、81也由DBC多层形成。特别地,第二和第三接触元件80、81均包括一堆叠,该堆叠由第一传导性层80A、(相应的)81A(通常是铜),例如陶瓷的相应的中间绝缘层80B、(相应的)81B(通常是氧化铝)和第二传导性层80C、(相应的)81C(通常是铜)形成。在图9中,第一和第二传导性层80A、81A、80C、81C具有小于第一接触元件60的对应的传导性层60A、60C的厚度,因为它们不具有电传导功能,但具有热传导功能。
第二和第三接触元件80、81的第一传导性层80A、81A布置在顶部,第二和第三接触元件80、81的第二传导性层80C、81C布置在底部。第二接触元件80的第一传导性层80A通过第一夹件元件(clip element)82与第一MOSFET晶体管51的源极焊盘213A(图8)直接电接触。同样,第三接触元件81的第一传导性层81A通过第二夹件元件83与第三MOSFET晶体管53的源极焊盘213A(图8)直接电接触。
具体地,图10B,夹件元件82、83由诸如铜的传导性材料的细长区域(在平行于第一笛卡尔轴线X的方向上)形成。第一夹件元件82布置在第二接触元件80与第一MOSFET晶体管51之间。第一夹件元件82比第一MOSFET晶体管51长,使得其一部分82’(在图10B中的左侧以及在图9的右侧)相对于MOSFET晶体管51侧向突出。同样,第二夹件元件83布置在第三接触元件81与第三MOSFET晶体管53之间。第二夹件元件83比第二MOSFET晶体管51长,使得其一部分83’(在图10B中的左侧)相对于MOSFET晶体管53侧向突出。
夹件元件82、83的突出部分82’、83’延伸远至相应的第一和第二连接柱67、68,并且分别与其接合和电连接。
以该方式,第一MOSFET晶体管51的源极端子213A通过第一夹件元件82和第一连接柱67耦合到第一漏极传导性区域58A、漏极引线59A并且因此耦合到桥电路100的第一输出端子103(图7),并且第三MOSFET晶体管53的源极端子213A通过第二夹件元件83和第二连接柱68耦合到第二漏极传导性区域58B和漏极引线59B,并且因此耦合到桥电路100的第二输出端子104。
在图9的实施例中,由DBC衬底形成的第一支撑区域85被布置在每个夹件元件82、83与相应的第一和第二支撑元件57之间。
连接柱67(为清楚起见,在图10B中以虚线示出)、突出部分82’和第一支撑区域85中的一个第一支撑区域形成第三对准和间隔结构89;并且连接柱68(在图10B中以虚线示出)、突出部分83’和第一支撑区域85中的另一个支撑区域形成第四对准和间隔结构89。
再次参考图10B,第一MOSFET晶体管51的未被第二接触元件80覆盖的另外的源极焊盘213E”,通过第二驱动器源极布线87E连接到第二驱动器源极传导性区域中的一个第二驱动器源极传导性区域76E。类似地,第一MOSFET晶体管53的未被第三接触元件81覆盖的另一个另外的源极焊盘213F”,通过另一个第二驱动器源极布线87F连接到第二驱动器源极传导性区域中的另一个第二驱动器源极传导性区域76F。第二驱动器源极引线77E、77F接合到第二驱动器源极传导性区域76E、76F,并且形成桥电路100的驱动器源极端子110、112。
第一和第三MOSFET晶体管51、53的栅极焊盘216A也面对这些晶体管51、53的上表面,分别侧向于第二和第三接触元件80、81,并且通过第二栅极布线87C、87D分别连接到第二栅极传导性区域76C、76D。第二栅极引线77C、77D接合到第二栅极传导性区域76C、76D并且形成桥电路100的栅极端子105、107。
在与连接柱67、68关于MOSFET晶体管51-54相对的侧上,第三和第四对准和间隔结构90在第一和第二支撑元件56、57之间延伸。例如,如图9、图10A和图10B中所示,第三和第四对准和间隔结构90均包括承载柱91,承载柱91从第二支撑元件57上的第二漏极传导性区域76A(图10B),朝向第一支撑元件56(在图9中,朝向下)和第二支撑区域92延伸,第二支撑区域92形成在相应的绝缘传导性区域58I、58J上。在图示的示例中,每个第二支撑区域92由DBC多层形成。
热传导性的材料(例如铜)的块94在第一接触元件60的第二传导性层60C与第二和第三接触元件80、81的第二传导性层80C、81C之间延伸(也参见图13)。因此,第二传导性层60C、80C、81C彼此电连接且热连接,但是由于绝缘中间层60B、80B、81B,第二传导性层60C、80C、81C与结构的其余部分电绝缘。以该方式,由接触元件60、80、81和块94形成的组件形成在设备50内侧的热分布结构95,热分布结构95能够提供平滑的热分布而没有不连续,并且避免了局部发热区域。
封装物质96(图9)围绕并且包含由第一支撑元件56、第二支撑元件57以及对准和间隔结构89和90形成的结构,封装物质96与支撑元件56和57的第一传导性层56A和57A齐平,从而形成设备50。
在设备50中,由于支撑元件56和57的第一传导性层56A和57A(通过DBC多层与MOSFET晶体管51-54的漏极金属化218热接触,传导热量良好)二者均被暴露,因此设备50在两侧上都具有热耗散表面,并且因此具有高热耗散能力。
对准和间隔结构89和90进而提供了最佳的热传导路径,促进了从设备50内侧的MOSFET晶体管51-54向外侧的热量传递。
如在图14A、图14B的视图中特别指出的,由于集成电子部件(这里,MOSFET晶体管51-54)的两个层级的布置,该结构特别紧凑。
设备50如下所述地进行组装。初始地,形成第一和第二支撑元件56、57,并且设备50的部件被接合在第一和第二支撑元件56、57上。
特别地,并且不一定按所指示的顺序,第一支撑元件56被成形,以在第二传导性层56C中形成图10A的传导性区域58A-58J;第二和第三MOSFET晶体管52、54通过粘合区域61A、61B而被接合;引线59A-59H被焊接;布线65C~65F被焊接;第二支撑区域92被附接并且生长承载柱91。
此外,并且不一定按所指示的顺序,第二支撑元件57被成形,以在第二传导性层57C中形成图10B的传导性区域76A-76F;第一和第二MOSFET晶体管51、53通过粘合区域61C、61D而被接合;引线77A-77F被焊接;布线87C-87F被焊接;第一支撑区域85被接合;夹件元件82、83被接合;并且生长连接柱67、68。
同时或更早或更晚地,通过将块94接合到接触元件60、80、81来分别形成热分布结构95(图9)。作为所指示的备选,夹件元件82、83和连接柱67、68可以被形成为热分布结构95的一部分,来代替被预先接合到第一和第二MOSFET晶体管51、53并且接合到第一支撑区域85。
然后,在所考虑的组装示例中,通过将承载柱91接合到第二支撑区域92,并且将连接柱67、68接合到夹件元件82、83,第一支撑元件56(以及被附接到其的相关结构)、第二支撑元件57(以及被附接到其的相关结构)和热分布结构95被相互附接。
最后,以本身已知的方式,形成(例如模制)封装物质96,使得引线59A-59H和77A-77F突出超过封装物质96。
在第一和第三MOSFET晶体管51、53的一侧,“热沉”(heat sink,未示出)可以被附接到如此完成的设备50,并且设备50可以被安装在承载板(未示出)上,其中第二和第四晶体管52、54被布置靠近该承载板。
图16-图19示出了接触焊盘213A之间的电连接的细节。
在图16中,源极钝化层213上的暴露源极焊盘213A(图8)的源极窗口214利用虚线来表示。窗口214容纳传导性材料的填充区域70,其填充源极窗口214,并且在附接夹件元件82、83(在图16中仅夹件元件82、83中的第一夹件元件82可见)之前,填充区域70可以略微突出到源极窗口214之外。特别地,夹件元件82、83的附接通过焊接过程来获得,例如,通过在填充区域70的上部分(以凹形方式形成以避免焊膏泄漏的部分)上分配焊膏,或者在夹件元件82、83被预先接合到接触元件80、81以形成热分布结构95的情况下,通过在夹件元件82和83的面对第一和第二MOSFET晶体管51、53的面上分配焊膏。在该情况下,夹件元件82、83的金属材料和第一源极区域58G、58H与填充区域70直接接触,形成源极区域213的电连接。
图17示出了使用也针对第一和第三MOSFET晶体管51、53的接触元件的MOSFET晶体管51-54的源极焊盘213A的连接细节。因此,在该实施例中,没有夹件元件82、83,第一支撑区域85形成得更宽,从而延伸到第二和第三接触元件80、81之外,并且连接柱67、68(在图17中仅柱67可见)在第一支撑元件56与第一支撑区域85之间延伸,在制造期间,它们被预先接合到第一支撑区域85。
附加地,在该实施例中,接触元件60、80、81的第一传导性层60A、80A、81A被成形,从而形成多个电连接的突起71,突起71进入MOSFET晶体管51-54的源极窗口214(针对第一和第二MOSFET晶体管51、52,如在图17中可见)并且以直接电接触的方式与源极焊盘213A(图8)接合。
在该解决方案中,接触元件60、80、81的第一传导性层60A、80A、81A在第一传导性层60A、80A、81A的突出部分处具有凸起72,其中第一接触元件60与耦合区域64G、64H电接触,并且第二和第三接触元件80、81接合到第一支撑区域85。
附加地,这里,第二和第三接触元件80、81的第一和第二传导性层80A、81A、80C、81C具有与第一接触元件60的第一和第二传导性层60A、61A相同的厚度。
以该方式,在图17中,连接柱67、68形成在中间绝缘层80B、81B上方的电接触,以通过源极窗口214、凸起72、连接柱67、68、第一支撑元件56的第一漏极传导性区域58A、58B,创建在第一和第三MOSFET晶体管51、53的源极金属化213(图8)与漏极引线59A,59B之间电连续性。
图18示出了类似于图17的MOSFET晶体管51-54的源极焊盘213A的连接结构,其中所有接触元件60、80、81的第一传导性层60A、80A、81A被成形以形成突起71,但是块94被(例如,焊料的)粘合物质93替代。
图19示出了在没有夹件元件的情况下,MOSFET晶体管51-54的源极焊盘213A的连接结构,与源极金属化213的连接直接由接触元件60、80、81形成(如图18中那样),但是没有接触元件60、80、81的第一传导性层60A、80A、81A被成形、并且与形成在源极窗口214中的填充区域70接触(如图16中那样)。
图20A-图20D示出了利用150来指示的不同的封装的电子设备。除了关于引线59A-59H和引线77A-77F之外,设备150具有与图9、图10A、图10B的设备50类似的结构和部件,并且因此由相同的附图标记标识,引线59A-59H和引线77A-77F突出超过设备150的壳体到其上部区,与上表面150B基本上对准(图20D)。因此,在该情况下,当设备150被安装在承载板(未示出)上时,第一和第三MOSFET晶体管51、53(桥电路100的上部晶体管)将靠近承载板布置,而第二和第四晶体管52、54(桥电路100的下部晶体管)将被布置在相对于承载板平面较高的层级,并且可以与可能布置在设备150上的任何热沉更直接地热接触。
最后,明显的是,在不脱离本公开的范围的情况下,可以对本文描述和图示的封装的电子设备及其组装方法进行修改和变化。例如,所描述的不同实施例可以被组合以便提供另外的解决方案。
例如,上述内容也适针对所谓的“无引线”实施方式,其中引线不突出到外部,并且引线的仅一小部分没有被封装物质96覆盖并且与壳体齐平,以允许设备50利用“表面安装”技术被安装。
附加地,夹件元件可以附加地或备选地被提供在第二和第三晶体管52、54的源极端子与第一接触元件之间。
可以将上述各种实施例组合以提供另外的实施例。可以根据上述具体实施方式对实施例进行这些和其他改变。通常,在以下权利要求中,所使用的术语不应当被解释为将权利要求限制为说明书和权利要求中公开的特定实施例,而是应当被解释为包括所有可能的实施例以及赋予这种权利要求的等同物的全部范围。因此,权利要求不受本公开的限制。
Claims (17)
1.一种封装的功率电子设备,其特征在于,包括:
具有第一面和第二面的第一支撑元件,所述第一支撑元件的所述第一面形成所述设备的第一热耗散表面;
具有第一面和第二面的第二支撑元件,所述第二支撑元件的所述第一面形成所述设备的第二热耗散表面,所述第一支撑元件和所述第二支撑元件彼此叠置,其中相应的所述第二面彼此面对;
第一功率部件,被附接到所述第二支撑元件的所述第二面;
第二功率部件,被附接到所述第一支撑元件的所述第二面;
第一接触元件,在所述第二功率部件上;
第二接触元件,在所述第一功率部件上;
第一引线,通过所述第一支撑元件与所述第一功率部件电耦合;
第二引线,通过所述第二支撑元件与所述第二功率部件电耦合;以及
热传导性的主体,被布置在所述第一接触元件与所述第二接触元件之间;
其中所述第一支撑元件和所述第二支撑元件、以及所述第一接触元件和所述第二接触元件分别由电绝缘并且热传导性的多层形成。
2.根据权利要求1所述的设备,其特征在于,所述第一支撑元件和所述第二支撑元件、以及所述第一接触元件和所述第二接触元件是直接接合的铜(DBC)多层。
3.根据权利要求1所述的设备,其特征在于,所述热传导性的主体包括传导性材料的块。
4.根据权利要求1所述的设备,其特征在于,所述热传导性的主体包括粘合物质。
5.根据权利要求1所述的设备,其特征在于,所述第一支撑元件和所述第二支撑元件均包括第一传导性层、中间层和第二传导性层,所述第一支撑元件和所述第二支撑元件的所述第一传导性层分别形成所述设备的所述第一热耗散表面和所述第二热耗散表面,并且所述第一支撑元件和所述第二支撑元件的所述第二传导性层分别形成针对所述第一功率部件和所述第二功率部件的电接触区域。
6.根据权利要求1所述的设备,其特征在于,所述第一功率部件和所述第二功率部件是第一功率晶体管和第二功率晶体管,所述设备包括第三接触元件以及第三功率晶体管和第四功率晶体管,所述第三功率晶体管被附接到所述第一支撑元件的所述第二面,并且所述第四功率晶体管被附接到所述第二支撑元件的所述第二面,其中:
所述第一接触元件与所述第二功率晶体管以及所述第四功率晶体管叠置并且电接触;
所述第二接触元件与所述第一功率晶体管叠置并且电接触;
所述第三接触元件与所述第三功率晶体管叠置并且电接触,所述第三接触元件由电绝缘并且热传导性的多层形成;并且
所述第二接触元件和所述第三接触元件被并排布置并且彼此电绝缘。
7.根据权利要求6所述的设备,其特征在于:
所述第一功率晶体管、所述第二功率晶体管、所述第三功率晶体管和所述第四功率晶体管被电连接以形成全桥,并且均具有第一传导端子、第二传导端子和控制端子;
所述第一接触元件包括与所述第二功率晶体管和所述第四功率晶体管的所述第一传导端子直接电接触的第一传导性层;
所述第二接触元件包括与所述第一功率晶体管的所述第一传导端子电耦合的第一传导性层;并且
所述第三接触元件包括与所述第三功率晶体管的所述第一传导端子电耦合的第一传导性层。
8.根据权利要求7所述的设备,其特征在于,还包括:
第一布线和第二布线;以及
第一耦合区域和第二耦合区域,在所述第一支撑元件与所述第一接触元件之间延伸,其中:
所述第一支撑元件和所述第二支撑元件均包括第一传导性层、中间层和第二传导性层;
所述第一支撑元件和所述第二支撑元件的所述第一传导性层分别形成所述设备的第一热耗散表面和第二热耗散表面;
所述第一支撑元件和所述第二支撑元件的所述第二传导性层形成针对所述功率部件的电接触区域;并且
所述第一支撑元件的所述第二传导性层包括:
第一传导性区域和第二传导性区域,分别与所述第二功率晶体管和所述第四功率晶体管的所述第二传导端子电接触,
第三传导性区域和第四传导性区域,分别通过所述第一布线和所述第二布线而相应地与所述第二功率晶体管和所述第四功率晶体管的所述控制端子耦合,以及
第五传导性区域和第六传导性区域,分别通过所述第一耦合区域和所述第二耦合区域,与所述第一接触元件的所述第一传导性层耦合。
9.根据权利要求8所述的设备,其特征在于,还包括:
第三布线和第四布线;以及
传导性材料的第一连接柱元件和第二连接柱元件,其中:
所述第二支撑元件的所述第二传导性层包括第七传导性区域、第八传导性区域和第九传导性区域,所述第七传导性区域与所述第一功率晶体管以及所述第三功率晶体管的所述第二传导端子电接触,并且所述第八传导性区域和所述第九传导性区域分别通过所述第三布线和所述第四布线与所述第一功率晶体管以及所述第三功率晶体管的所述控制端子耦合;并且
所述第二接触元件和所述第三接触元件的所述第一传导性层,分别通过所述第一连接柱元件和所述第二连接柱元件被耦合到所述第一支撑元件的所述第五传导性区域和所述第六传导性区域。
10.根据权利要求9所述的设备,其特征在于,所述设备还包括电传导性材料的第一夹件元件和第二夹件元件,所述第一夹件元件在所述第二接触元件的所述第一传导性层与所述第一功率晶体管之间延伸,所述第二夹件元件在所述第三接触元件的所述第一传导性层与所述第三功率晶体管之间延伸,所述第一夹件元件具有第一突出部分,所述第一突出部分延伸超过所述第一功率晶体管、并且被电耦合到所述第一连接柱元件,并且所述第二夹件元件具有第二突出部分,所述第二突出部分延伸超过所述第三功率晶体管、并且被电耦合到所述第二连接柱元件。
11.根据权利要求10所述的设备,其特征在于,所述第二接触元件和所述第三接触元件比所述第一功率晶体管和所述第三功率晶体管长,所述第二接触元件包括被耦合到所述第一连接柱元件的第一突出部分,并且所述第三接触元件包括被耦合到所述第二连接柱元件的第二突出部分。
12.根据权利要求11所述的设备,其特征在于,还包括:
第一支撑柱部分,在所述第一突出部分与所述第二支撑元件之间延伸,并且与所述第一连接柱元件对准;
第二支撑柱部分,在所述第二突出部分与所述第二支撑元件之间延伸,并且与所述第二连接柱元件对准,所述第一支撑柱部分和所述第二支撑柱部分均包括电绝缘并且热传导性的多层,并且所述第一支撑柱部分和所述第一连接柱元件形成第一对准和间隔结构,并且所述第二支撑柱部分和所述第二连接柱元件形成第二对准和间隔结构。
13.根据权利要求12所述的设备,其特征在于,所述第一支撑元件和所述第二支撑元件均具有细长形状,所述细长形状具有第一纵向端和第二纵向端,其中所述第一对准和间隔结构、以及所述第二对准和间隔结构被布置为分别靠近所述第一支撑元件和所述第二支撑元件的所述第一纵向端,所述设备包括:
第三第四对准和间隔结构,靠近所述第一支撑元件的所述第二纵向端延伸,并且包括彼此对准的第三支撑柱部分和第一支撑柱元件;以及
第四对准和间隔结构,靠近所述第二支撑元件的所述第二纵向端延伸,并且包括彼此对准的第四支撑柱部分和第二支撑柱元件,所述第三支撑柱部分和所述第四支撑柱部分均包括电绝缘的多层,所述第一支撑元件和所述第二支撑柱元件是传导性材料的。
14.根据权利要求9所述的设备,其特征在于,包括:第一多个引线,被附接到所述第一支撑元件的所述第一传导性区域、所述第二传导性区域、所述第三传导性区域、所述第四传导性区域、所述第五传导性区域和所述第六传导性区域;以及第二多个引线,被附接到所述第二支撑元件的所述第七传导性区域、所述第八传导性区域和所述第九传导性区域。
15.一种封装的功率电子设备,其特征在于,包括:
具有第一面和第二面的第一支撑元件,所述第一支撑元件的所述第一面形成所述设备的第一热耗散表面;
具有第一面和第二面的第二支撑元件,所述第二支撑元件的所述第一面形成所述设备的第二热耗散表面,所述第一支撑元件和所述第二支撑元件彼此叠置,其中相应的所述第二面彼此面对;
第一功率部件,被附接到所述第一支撑元件的所述第二面;
第二功率部件,被附接到所述第二支撑元件的所述第二面;
第一接触元件,在所述第二功率部件上;
第二接触元件,在所述第一功率部件上;以及
热传导性的主体,被布置在所述第一接触元件和第二接触元件之间;
其中所述第一支撑元件和所述第二支撑元件、以及所述第一接触元件和所述第二接触元件分别由电绝缘并且热传导性的多层形成。
16.根据权利要求15所述的设备,其特征在于,所述第一支撑元件和所述第二支撑元件均包括第一传导性层、中间层和第二传导性层,所述第一支撑元件和所述第二支撑元件的所述第一传导性层分别形成所述设备的所述第一热耗散表面和所述第二热耗散表面,并且所述第一支撑元件和所述第二支撑元件的所述第二传导性层分别形成针对所述第一功率部件和所述第二功率部件的电接触区域。
17.根据权利要求15所述的设备,其特征在于,所述第一功率部件和所述第二功率部件是第一功率晶体管和第二功率晶体管,所述设备包括第三接触元件以及第三功率晶体管和第四功率晶体管,所述第三功率晶体管被附接到所述第一支撑元件的所述第二面,并且所述第四功率晶体管被附接到所述第二支撑元件的所述第二面,其中:
所述第一接触元件与所述第二功率晶体管以及所述第四功率晶体管叠置并且电接触;
所述第二接触元件与所述第一功率晶体管叠置并且电接触;
所述第三接触元件与所述第三功率晶体管叠置并且电接触,所述第三接触元件由电绝缘并且热传导性的多层形成;并且
所述第二接触元件和所述第三接触元件被并排布置并且彼此电绝缘。
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2019
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2020
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- 2020-07-30 EP EP20188729.6A patent/EP3780100B1/en active Active
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US20240206133A1 (en) | 2024-06-20 |
EP3780100A1 (en) | 2021-02-17 |
US20210037674A1 (en) | 2021-02-04 |
CN112310015A (zh) | 2021-02-02 |
IT201900013743A1 (it) | 2021-02-01 |
US11864361B2 (en) | 2024-01-02 |
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