CN201355611Y - Die bonding base plate with surface polishing layer - Google Patents
Die bonding base plate with surface polishing layer Download PDFInfo
- Publication number
- CN201355611Y CN201355611Y CNU200920067430XU CN200920067430U CN201355611Y CN 201355611 Y CN201355611 Y CN 201355611Y CN U200920067430X U CNU200920067430X U CN U200920067430XU CN 200920067430 U CN200920067430 U CN 200920067430U CN 201355611 Y CN201355611 Y CN 201355611Y
- Authority
- CN
- China
- Prior art keywords
- base plate
- circuit layer
- layer
- polishing
- die bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Abstract
A die bonding base plate with surface polishing layer comprises a ceramic base plate, wherein a plurality of metallic circuit layers which are arranged in interval are printed on the surface of the ceramic base plate, and is characterized in that a polishing layer is further formed on the surface of the circuit layer. After the printed circuit layer is fixed on the surface of the ceramic base plate, the die bonding base plate adopts the grinding polishing mode, which forms the polishing layer on the surface of the printed circuit layer through grinding and polishing, thereby greatly reducing the roughness of the surface of the circuit layer, realizing better flatness, and increasing the brightness of the surface of the circuit layer. The circuit layer of the formed die bonding base plate has better surface flatness, the formed die bonding base plate has better light reflecting efficiency, simultaneously the yield is increased, and the manufacturing cost is greatly reduced.
Description
[technical field]
The utility model is a kind of solid brilliant substrate with surface finish layer, is meant that especially a kind of circuit layer surface roughness in printing significantly lowers, and increases the substrate of circuit layer surface brightness.
[background technology]
Ceramic material has good heat conduction and electrical insulation property, can change chemical composition again and adjust its character, application in electronic packaging is very extensive, it is not only common bearing substrate and cover closing material, also can cooperate the thick-film metalliz technology to make the usefulness of the online substrate of multilayer for high density structure dress.Because the compactness height of ceramic material, infiltration has the good ability that blocks to hydrone, and therefore becoming the air-tightness structure adorns main material, and the miniaturization of electronic installation, the height output of semiconductor subassembly and the high speed of signal processing make microelectronics Packaging new technologies and methods, new construction occur.New encapsulation mode is had higher requirement to encapsulating material, i.e. good heat-conducting, low dielectric constant and dielectric loss, the thermal coefficient of expansion that is complementary with chip, good mechanical strength and processability.At present, a large amount of air-tight packaging ceramic substrate materials that use mainly are aluminium oxide (Al
2O
3) or aluminium nitride (AlN).
The general mode of using ceramic substrate material packaged chip (for example light-emitting diode chip for backlight unit), as shown in Figure 1, it is at a ceramic substrate 10, be printed with the metallic circuit layer 11 that several are equidistantly arranged on the surface, these metallic circuit layers 11 are power supply property connection chip, then utilize the mode of sintering again, metallic circuit layer 11 is anchored on ceramic substrate 10 surfaces, and can carry out the processing procedure of follow-up solid crystalline substance, routing, encapsulation, test and packing.Yet when type metal circuit layer 11, adopt screen painting.The silvering solution that screen painting attached (metallic circuit layer 11 raw material) usually can't be even fully, metallic circuit layer 11 surface after causing printing are coarse and uneven (as shown in Figure 2) easily, can find when utilizing the talysurf test, partly the roughness on metallic circuit layer 11 surface of ceramic substrate 10 reaches the error (as shown in table 2) of (Ra) 3.03 μ m, has become the defective products that can't carry out successive process.
[utility model content]
The purpose of this utility model is to overcome the deficiencies in the prior art, proposes a kind of solid brilliant substrate with surface finish layer.
Of the present utility model being characterised in that, a kind of solid brilliant substrate with surface finish layer, comprise a ceramic substrate, ceramic base plate surface is printed with several metallic circuit layers of equidistantly arranging, and it is characterized in that: the surface of described circuit layer also is formed with a polishing layer.
According to above-mentioned feature, the utility model is realized by following technical proposals: a ceramic substrate, ceramic base plate surface are printed with several metallic circuit layers of equidistantly arranging, and these metallic circuit layers are power supply property connection chip.After circuit layer that will printing is bonded on the surface of ceramic substrate, be the mode that adopts grinding and polishing, make the surface of the circuit layer of printing form a polishing layer because of grinding and polishing.Thereby significantly reduce its surface roughness, and can reach preferable flatness, increase the brightness on circuit layer surface.Not only the circuit layer surface flatness is good but also better to the reflection efficiency of light for formed solid brilliant substrate, and yields also increases simultaneously, significantly reduces production costs.
[description of drawings]
Fig. 1 is the schematic appearance of existing solid brilliant substrate
Fig. 2 is the local section enlarged diagram of existing solid brilliant substrate
Fig. 3 is the schematic appearance of the solid brilliant substrate of the utility model surface finish
Fig. 4 is the local section enlarged diagram of the solid product substrate of the utility model surface finish
Among the figure 1: ceramic substrate 2: metallic circuit layer 30: ceramic substrate 31: metallic circuit layer 32: polishing layer
Below in conjunction with the embodiment conjunction with figs., the utility model is described in detail as follows:
[embodiment]
See also Fig. 3,4, solid brilliant substrate described in the utility model is provided with a ceramic substrate 30, and in the utility model most preferred embodiment, the material of this ceramic substrate 30 is aluminium oxide (Al
2O
3) or aluminium nitride (AlN).Ceramic substrate 30 surface printings have several metallic circuit layers of equidistantly arranging 31, these metallic circuit layers 31 be power supply property connection chip (for example: brilliant month of light-emitting diode, compound integrated circuit wafer ... Deng).After circuit layer 31 that will printing is bonded on the surface of ceramic substrate 30, adopt the mode of grinding and polishing, make the surface of the circuit layer of printing form a polishing layer 32, make the circuit layer 31 of printing significantly reduce its surface roughness, and can reach preferable flatness, and increase the brightness on circuit layer 31 surfaces because of grinding and polishing.So, not only circuit layer 31 surface flatnesses are good but also better to the reflection efficiency of light for formed solid brilliant substrate, and yields also increases simultaneously, significantly reduces production costs.
See also shown in the table 1, when utilizing talysurf to test the roughness of the metallic circuit layer 31 of consolidating brilliant substrate 30, the roughness error that can obtain solid brilliant substrate 30 is for below (Ra) 0.8 μ m, all in admissible scope, the metallic circuit layer 31 of provable solid brilliant substrate 30 will be because of polishing layer increases flatness, and therefore yield of products is increased.
When the bearing substrate that this solid brilliant substrate 30 used as LED wafer, use the modern light-emitting diode chip for backlight unit of ultrasonic waves because of on the metallic circuit layer 31 that is connected to solid product substrate 30, then carry out the processing procedure of routing, encapsulation, test and packing again, and the formation finished product of LED, because circuit layer 31 surfaces are good to the reflection efficiency of light because of grinding and polishing, therefore the light reflection efficiency of 31 pairs of LED wafer of metallic circuit layer is better, and can increase the brightness of finished product of LED.The material of these metallic circuit layers 31 can be good gold, silver of conductivity or copper.This metallic circuit layer 31 is bonded to the method on the surface of ceramic substrate 30, utilizes the mode of sintering, and metallic circuit layer 31 is bonded on ceramic substrate 30 surfaces.
The above, only be the best specific embodiment of the utility model, but structural feature of the present utility model is not limited thereto, anyly is familiar with this skill person in the utility model field, can think easily and variation or modification, all can be encompassed in the claim of following this case.
Claims (3)
1. the solid brilliant substrate with surface finish layer comprises a ceramic substrate, and ceramic base plate surface is printed with several metallic circuit layers of equidistantly arranging, and it is characterized in that: the surface of described circuit layer also is formed with a polishing layer.
2. the solid brilliant substrate of surface finish layer as claimed in claim 1 is characterized in that: the material of described ceramic substrate is aluminium oxide or aluminium nitride.
3. the solid brilliant substrate of surface finish layer as claimed in claim 1 is characterized in that: the material of described metallic circuit layer is gold, silver or copper.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNU200920067430XU CN201355611Y (en) | 2009-01-23 | 2009-01-23 | Die bonding base plate with surface polishing layer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNU200920067430XU CN201355611Y (en) | 2009-01-23 | 2009-01-23 | Die bonding base plate with surface polishing layer |
Publications (1)
Publication Number | Publication Date |
---|---|
CN201355611Y true CN201355611Y (en) | 2009-12-02 |
Family
ID=41411954
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNU200920067430XU Expired - Lifetime CN201355611Y (en) | 2009-01-23 | 2009-01-23 | Die bonding base plate with surface polishing layer |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN201355611Y (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101794739A (en) * | 2010-03-22 | 2010-08-04 | 苏州华菲特陶科技有限公司 | Diode ceramic packaging template |
CN111556655A (en) * | 2020-04-28 | 2020-08-18 | 重庆市澳欧硕铭科技有限公司 | Method for manufacturing PCB based on aluminum nitride plate |
CN111834324A (en) * | 2019-04-15 | 2020-10-27 | 谭祖荣 | Polished thick film substrate suitable for packaging flip chip and eutectic crystal element and manufacturing method thereof |
-
2009
- 2009-01-23 CN CNU200920067430XU patent/CN201355611Y/en not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101794739A (en) * | 2010-03-22 | 2010-08-04 | 苏州华菲特陶科技有限公司 | Diode ceramic packaging template |
CN111834324A (en) * | 2019-04-15 | 2020-10-27 | 谭祖荣 | Polished thick film substrate suitable for packaging flip chip and eutectic crystal element and manufacturing method thereof |
CN111556655A (en) * | 2020-04-28 | 2020-08-18 | 重庆市澳欧硕铭科技有限公司 | Method for manufacturing PCB based on aluminum nitride plate |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CX01 | Expiry of patent term |
Granted publication date: 20091202 |
|
CX01 | Expiry of patent term |