CN1977572A - 立体电路基板 - Google Patents

立体电路基板 Download PDF

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CN1977572A
CN1977572A CNA2005800052236A CN200580005223A CN1977572A CN 1977572 A CN1977572 A CN 1977572A CN A2005800052236 A CNA2005800052236 A CN A2005800052236A CN 200580005223 A CN200580005223 A CN 200580005223A CN 1977572 A CN1977572 A CN 1977572A
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circuit
hole
circuit substrate
circuit pattern
solid configuration
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汤本哲男
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Sankyo Kasei Co Ltd
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    • H05K1/00—Printed circuits
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
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    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09854—Hole or via having special cross-section, e.g. elliptical
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/00—Metal working
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    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49158—Manufacturing circuit on or in base with molding of insulated base
    • Y10T29/4916—Simultaneous circuit manufacturing
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    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract

可以防止金属铸模的成型用插针破损，使电镀的析出变得可靠，由此将电路间距缩小到临界值。在电路基板2的正面上形成由导电材料构成的规定电路图案3、3…，并且还在反面形成规定的电路图案。在该电路基板2内，形成使两面的电路图案电导通的通孔5，通孔的内面形状按邻接的电路图案3、3间方向窄，按电路延伸方向长。

Description

立体电路基板
技术领域
本发明涉及一种立体电路基板。
背景技术
近年来，由于电路基板按照所谓轻薄短小的市场需求不同要将电路图案相互的间隔也就是间距甚至缩小到极限，因而人们正在寻求达到电子设备的小型化且节省资源化、节省能量化所需的技术研发。为此，要在电路基板的正反两面形成电路图案，并且形成使该两个电路图案电导通的通孔的导体层。而且，为了穿透设置该通孔，以往依靠使用钻孔器的机械作业，但是近年来则要通过注入成型，和电路基板成型的同时也使通孔成型(专利文献1、2、3)。
专利文献1：特开昭61-239694号公报
专利文献2：特开昭63-128181号公报
专利文献3：美国专利第4424095说明书
参照图5～图7来说明这种以往以来的立体电路基板11的基本结构得知，在电路基板21的正反两面上形成有电路图案31、31…、41、41…，并形成有将该两面的电路图案间电气连接的通孔51，该通孔的直径为数10微米级，并且为了将这种电路基板注入成型，要在金属铸模中使用通孔成型用的圆柱状插针，并且安插设置该插针的直径也是数10微米级的如30～50微米的插针。而且，圆形通孔51的内径是相同的直通形状，还有对于通孔51内径的电路基板21厚度的比例，也就是平面形状比其临界值至多约5倍，如果在该5倍以内则能实现非电解镀层的析出，但是若超过了该5倍则非电解镀层的析出较为困难，或者说不可能。
可是，伴随电子设备的小型化，在将电路基板的电路图案31…的间距缩小的相关方面，通孔51的内径也不得不如上所述制成数10微米级的小口径。其结果为，若增高了平面形状比，则当用成型金属铸模将电路基板成型时，金属模具特别是通孔成型用的插针不能经受液体的注入流动阻力，而导致破损的事故频繁发生，并且平面形状比增高还产生超过非电解镀层的析出临界值而不析出的问题。
发明内容
因此，本发明想要解决的问题之处在于提供一种立体电路基板，该立体电路基板可以防止金属模具的成型用插针破损，使镀层的析出变得可靠，由此将电路间距缩小到极限。
本发明所涉及的立体电路基板第1特征在于，在绝缘材料的电路基板正反两面上形成由导电材料构成的规定电路图案，并且在该电路基板内形成用来使该上述两面的电路图案电导通的通孔的导体层，上述通孔的形状按邻接的电路图案间方向较狭窄，按电路延伸方向较长。这样，通孔从电路图案暴露出来的形状按邻接的电路图案间方向较狭窄，按电路延伸方向较长，并且其形状例如有长方形、椭圆形等。
第2特征在于，将上述通孔按电路基板的垂直方向剖开后的形状是锥形状。该所谓的锥形状指的是，通孔向邻接的电路图案的电路间方向变尖并且还向电路图案的电路延伸方向扩开的形状，或者向上述电路图案间方向或电路延伸方向的某一个变尖并开口的形状。
再者，第3特征在于，在电路图案间的电路基板上形成隔壁。这是因为如上所述电路间距成型得非常狭窄，所以在该电路图案上例如焊接导线端子进行安装时，要使用糊状焊料，因此存在因该焊料的飞沫产生飞散而使电路图案间短路的危险性，该隔壁就是防止该飞散所用的。
再者，第4特征在于，上述通孔是在该通孔内通过电镀所覆盖的盲通孔。
发明效果
本发明的效果为，可以防止金属模具特别是成型插针的破损，能实现镀层的可靠析出，由此将电路间距缩小到临界值。再者，防止安装时焊料的飞散，可以防止电路短路。特别是，若使通孔变成盲通孔，则可以省略焊接安装时焊剂的清洗工艺，并且可以阻止焊料的流出，因此立体电路的可靠性得到进一步增高。
附图说明
图1是电路基板的平面图。
图2是图1的a-a线放大剖面图。
图3是电路基板的底面图。
图4(A)～(F)是表示制造工艺的剖面图。
图5是以往例的平面图。
图6是图5的a-a线剖面图。
图7是以往例的底面图。
图8是表示其他实施方式的平面图。
图9是图8的b-b线剖面图。
图10是其他实施方式中的底面图。
符号说明
1    立体电路基板
2    电路基板
3    电路图案
4    电路图案
5    通孔
6    隔壁
30   电路图案
40   电路图案
具体实施方式
参照图1～图3来说明本发明所涉及的立体电路基板1的结构得知，在以绝缘材料为原材料的电路基板2正面上如图1所示，形成由导电材料构成的规定电路图案3、3…，并且还在反面如图3所示，形成规定电路图案4、4…。在电路基板2内如图2放大所示，形成使正反两面的电路图案3、3…及4、4…电导通的通孔5、5…的导体层5a。
通孔5、5…的内面形状按邻接的电路图案3、3间方向，也就是图1的左右方向较狭窄，按电路延伸方向，也就是图1的上下方向较长，即是长方形状。该长方形状不只是该通孔的上端开口部5b，下端开口部5c的形状也按邻接的电路图案4间方向，也就是图3的左右方向较狭窄，按电路延伸方向，也就是图3的上下方向较长。即是长方形状。还有，通孔5的形状并不限定为长方形状，也可以是按上下方向较长的椭圆形状。因此，这种形状通孔5的成型用插针也可以使用与以往相比大直径的插针，该插针破损的危险性有所下降。
将电路基板2沿厚度方向剖开后的形状如图2所示，是从通孔5、5…正面的开口端部5b朝向反面的开口端部5c扩开的锥形状。因此，在电路基板2反面的电路图案4上开出的开口端部5c如同对比图1和图3所判明的那样，成为正面开口端部5b的约2倍大小。同时，电路基板2反面的电路图案4的宽度与正面电路图案3的宽度相比较，成为约2倍。还有，所谓通孔5的锥形状如图2所示，指的是该通孔不只是和邻接的电路图案3、3…、4、4…之间的电路间方向，也就是图1、图3的左右方向，还向电路图案3、4的电路延伸方向，也就是图1、图3的上下方向双方扩开的锥形状。但是，并不限定为这种向两个方向扩开的形状，也可以是朝向邻接的电路图案3、3…、4、4…间方向或者电路图案的电路延伸方向某一个扩开的锥形状。
这样，由于使通孔5成为锥形状，因而即使平面形状比表面看例如达到10倍，但实质上却是5倍左右，因此在通孔内催化剂溶液或非电解溶液顺畅地进行循环并流动，使催化剂的析出、镀层析出变得可靠。另外，通孔成型用的插针本身也可以形成为剖面梯形形状，破损的危险性也显著下降。
另外，到了近些年，因为电路图案3、4的间距成型得非常狭窄甚至接近临界值，所以当在该电路图案上例如焊接导线端子进行安装时，存在该焊料特别是糊状焊料的飞沫产生飞散而使邻接的电路图案间短路的危险性，因此为了防止该飞散，在电路图案间形成有隔壁6。
下面，参照图4的(A)～(F)，对于本发明所涉及的立体电路基板制造工艺进行说明。图4(A)表示在将金属模具合起来的状态下向空腔内注入电镀级的液晶聚合物得以成型的一次成型品20，并且该一次成型品的外形形状与作为最终产品的电路基板2相一致。该液晶聚合物要使用芳香族类聚酯。一次成型品20如图4(B)所示，其表面为通过化学腐蚀被粗糙化后的面20a。腐蚀处理例如是把下述碱性水溶液加热到规定温度并将一次成型品20浸泡规定时间来进行的，上述碱性水溶液是将氢氧化钠或氢氧化钾溶解成规定浓度后的溶液。随后，一次成型品20被再次插入金属模具中。此时，在金属模具内形成于一次成型品20周边具有规定空隙之形状的空腔，并且在该金属模具合起来的状态下，作为掩膜剂将轴向生成螯合物基含有聚乙烯醇类树脂(例如，“ECONMTEAX”日本合成化学工业公司的商品名)注入成型，成为如图4(C)所示在规定的表面上形成了掩模7的二次成型品200。因此，如图4(D)所示在二次成型品200的粗糙面20a上添加利用钯、金等的催化剂8。该催化剂添加是众所周知的方法，例如在银、钯类的混合催化液中浸泡二次成型品200之后，用盐酸、硫酸等的酸进行活化，使表面析出钯。或者，使氯化亚锡等较强的还原剂吸附于表面，将其浸泡于包含金等贵金属离子的催化剂溶液中，此时因为通孔5如上所述是锥形状，所以催化剂溶液顺畅地进行循环，使表面确实析出金。
接着，如图4(E)所示，将二次成型品200在热水中加热，使通过二次成型所成型的掩模7的部分在热水中洗脱。它若将二次成型品200在80℃的热水中预先放入10分钟，则“ECONMTEAX”完全在热水内洗脱。因此，如图4(F)所示，虽然要对催化剂添加部分进行电镀来形成电路图案3、4，但是此时因为通孔5如上所述是锥形状，并且因为在该通孔内非电解溶液顺畅地进行循环并流动，所以可以确实形成镀层。该镀层使用化学镀铜或者化学镀镍等。最后进行热处理将内部的水分除去，并结束形成导电性电路的工艺，立体电路基板1得以完成。
对于上面实施方式中的立体电路基板1来说，在一面的电路图案如上面的电路图案3上焊接安装电子器件并使用另一面电路图案4来作为接点的方法中，该焊接安装时的焊剂和焊料在通孔5内通过向电路图案4的接点面流出，因此有时妨碍作为接点的功能。
因此，参照图8～10来说明其他实施方式得知，通孔5由镀层30填埋覆盖，该所覆盖的镀层内部成为圆锥状的中空状，并且该镀层的下端为下面的电路图案40。其他结构因和上述实施方式相同，而附上相同的符号。因此，根据本实施方式，可以省略焊接安装时焊剂的清洗工艺，并且由于能够阻止焊料的流出，因而立体电路的可靠性得到进一步增高。
产生上的可利用性
作为发明的实际应用例，可以作为连接器加以利用，该连接器通过同轴电缆来连接折叠式移动电话的电路部和液晶显示面之间的折叠部。

Claims (4)

1.一种立体电路基板，在绝缘材料的电路基板两面上形成由导电材料构成的规定电路图案，并且在该电路基板内形成使上述两面的电路图案电导通的通孔的导体层，其特征为：
上述通孔的形状沿邻接的电路图案间方向窄，沿电路延伸方向长。
2.一种立体电路基板，其特征为：
权利要求1所述通孔的剖面形状沿邻接的电路图案间方向、电路延伸方向的至少一个方向呈锥形状。
3.根据权利要求1或2所述的立体电路基板，其特征为：
在邻接的电路图案间形成隔壁。
4.根据权利要求1～3中任一项所述的立体电路基板，其特征为：
上述通孔是在该通孔内通过电镀所覆盖的盲通孔。
CNA2005800052236A 2004-03-04 2005-02-17 立体电路基板 Pending CN1977572A (zh)

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