CN1702846A - 新型集成电路或分立元件超薄无脚封装工艺及其封装结构 - Google Patents

新型集成电路或分立元件超薄无脚封装工艺及其封装结构 Download PDF

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CN1702846A
CN1702846A CNA2005100388183A CN200510038818A CN1702846A CN 1702846 A CN1702846 A CN 1702846A CN A2005100388183 A CNA2005100388183 A CN A2005100388183A CN 200510038818 A CN200510038818 A CN 200510038818A CN 1702846 A CN1702846 A CN 1702846A
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pin
chip
integrated circuit
plastic
metal layer
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CN100370589C (zh
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梁志忠
谢洁人
陶玉娟
葛海波
王达
周正伟
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Changdian Technology Management Co ltd
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Jiangsu Changjiang Electronics Technology Co Ltd
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Priority to CNB2005100388183A priority Critical patent/CN100370589C/zh
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Priority to US11/910,885 priority patent/US20080315412A1/en
Priority to PCT/CN2006/000607 priority patent/WO2006105733A1/zh
Priority to PCT/CN2006/000610 priority patent/WO2006122467A1/zh
Priority to PCT/CN2006/000609 priority patent/WO2006105735A1/zh
Priority to US11/910,878 priority patent/US20080258273A1/en
Priority to PCT/CN2006/000608 priority patent/WO2006105734A1/zh
Priority to US11/910,893 priority patent/US20080285251A1/en
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Abstract

本发明涉及一种新型集成电路或分立元件超薄无脚封装工艺,依次包括以下工艺:取一片金属基板材(1)进行半蚀刻;在没有被刻蚀的基岛及引脚正面镀上金属(2);芯片(4)植入;打线(5);包封塑封体(6)和正面打印(7);在金属基板背面涂干墨(8);切除半蚀刻区背面部分干墨;将半蚀刻区剩下部分的金属基板(1.3)再次进行蚀刻,使引脚和基岛凸出于塑封体表面;去除余下干墨;在基岛及引脚背面镀金属层(9);塑封体正面贴胶膜;切割。封装结构包括芯片承载底座(11)、打线内脚承载底座(12)、芯片(4)、金属线(5)以及塑封体(6)。本发明焊性能力强、品质优良、成本较低、生产顺畅、适用性较强、多芯片排列灵活、不会发生塑封料渗透的种种困扰。

Description

新型集成电路或分立元件超薄无脚封装工艺及其封装结构
技术领域:
本发明涉及一种新型集成电路或分立元件超薄无脚封装工艺及其封装结构。属集成电路或分立元件封装技术领域。
背景技术:
传统的集成电路或分立元件超薄无脚封装工艺及其封装结构,其封装型式为列陈式集合体经切割成为单一的单元。其基板型式为引线框式。其主要存在以下不足:
1、专用胶带  使用专用胶带来防止塑料高压包封时,塑封料会渗透到引线框上,从而增加外部引脚绝缘的危险;但是如果仍有塑封料渗透,后处理时则很容易将外部引脚镀钯层破坏,影响焊性能力。如此,材料成本、后处理成本及品质都有一定程度的影响。
2、基板双面镀钯  为了使打线工艺及输出外部引脚在此工艺中能顺利生产,在引线框的两面镀上昂贵的钯材。如此,除了电镀成本较高之外,打线参数也要针对此材质设定特殊的参数,造成因为参数不统一直接影响生产线的顺畅。
3、污染  因为引线框使用专用化学胶带,在各种高温工艺中胶带的溶剂容易因为高温而气化出来,间接污染或覆盖芯片的压区及打线的内脚,常常造成打线能力的不稳定。
4、芯片、外部引脚的活用性  受传统引线框的限制,多芯片及不同输出的外部引脚也仅能死板的排列,活用性较低。
5、外部引脚焊性能力  受传统引线框的限制,输出的外部引脚也与胶体(塑料包封体)底部是一样平,甚至有凹陷的危险;而在表面贴装时助焊剂等化学药剂等都无法顺利排出,所以焊性能力会大受影响。
6、金属丝球焊  传统的引线框背面要贴上昂贵的高温高压化学胶带,在打线过程中力也容易因胶带的软性而被部分吸收,所以常常造成打线接点的松脱,从而影响生产及产品打线时的可靠性。
发明内容:
本发明的目的在于克服上述不足,提供一种焊性能力强、品质优良、成本较低、生产顺畅、适用性较强、多芯片排列灵活、不会发生塑封料渗透的种种困扰的新型集成电路或分立元件超薄无脚封装工艺及其封装结构。
本发明的目的是这样实现的:一种新型集成电路或分立元件超薄无脚封装工艺,依次包括以下工艺步骤:
——取一片金属基板材,
——在金属基板正面进行半蚀刻,金属基板上没有被蚀刻的区域形成基岛及引脚,被半蚀刻的区域形成凹陷的半蚀刻区,
——在没有被刻蚀的基岛及引脚正面镀上金属层,
——在基岛正面金属层上进行芯片的植入,制成集成电路或分立元件的列陈式集合体半成品,
——将已完成芯片植入作业的半成品进行打金属线作业,
——将已打线完成的半成品正面进行包封塑封体作业,并进行塑料包封后固化作业,
——将已完成塑料包封及后固化作业的半成品,进行正面打印作业,
——在金属基板背面涂上干墨,
——切除半蚀刻区背面的干墨,
——将半蚀刻区剩下部分的金属再次进行蚀刻,从而使基岛和引脚凸出于塑封体表面,
——去除金属基板背面余下的干墨,
——在没有被刻蚀的基岛及引脚背面镀上金属层,
——将塑封体正面贴上胶膜,
——已贴上胶膜的半成品进行切割作业,使原本以列阵式集合体方式连在一起的芯片一颗颗独立开来,
——将完成切割的产品利用取放转换设备将单颗集成电路或分立元件的塑封体吸出胶膜。
本发明的目的还可以是这样实现的:一种新型集成电路或分立元件超薄无脚封装结构,包括芯片承载底座、打线内脚承载底座、芯片、金属线以及塑封体,其特点是:
所述的芯片承载底座包括中间基岛以及正面金属层和背面金属层,
所述的打线内脚承载底座包括中间引脚以及正面金属层和背面金属层,
芯片承载底座的正面金属层上植入芯片,
芯片正面和基岛正面金属层分别与金属线两端连接制成封装结构半成品,
将封装结构半成品正面用塑封体包封,并使基岛和引脚凸出于塑封体表面。
本发明集成电路或分立元件超薄无脚封装工艺及其封装结构,其封装型式亦采用列陈式集合体经切割成为单一的单元。其基板型式为在基板上半蚀刻出所需要的基岛和引脚。与传统的集成电路或分立元件封装工艺及结构相比,本发明具有如下优点:
1、因采用基板方式而不用引线框,所以不需使用专用耐高温高压的胶带材料,所以材料成本相应较低,而且完全不会发生塑封料渗透、品质不良、成本提高的诸多困扰。
2、芯片区的基板正面在打线的内脚部分采用传统镀银方式,大众化且成本低,打线参数使用一般即可。基板背面讯号输出外部引脚采用镀锡的方式,成本低,易生产。
3、完全无需使用任何化学胶带,所以完全不用考虑污染的问题,所以生产简单顺畅,成本低廉。
4、因采用新式的封装工艺及结构,在芯片区或是打线输出的外部引脚都可以有充分的发挥能力及空间。
5、新式的封装结构中输出的外部引脚是凸出于塑封体表面的,此外两次蚀刻保证了外部引脚间的绝对共面性。如此单点独立的焊接方式可以维持目前一般芯片的焊性能力,也不用担心表面贴装是否会不稳定,品质比传统封装型式更加稳定。
6、采用基板式封装,其在打线过程中采用一般芯片的参数生产即可,可靠性也有保障,从而利用生产的顺畅,质量稳定,成本低廉。
附图说明:
图1~17分别为本发明的新型集成电路或分立元件超薄无脚封装工艺各工序示意图。
图18为本发明的新型集成电路或分立元件超薄无脚封装结构示意图。
具体实施方式:
本发明的新型集成电路或分立元件超薄无脚封装工艺依次由以下工序组成:
1)基板——参见图1,取一片厚度合适的金属基板材1。金属基板1的材质可以依据芯片的功能与特性进行变换,例如:镍铁合金、铜合金等。
2)基板半蚀刻——参见图2,在金属基板1正面进行半蚀刻,金属基板1上没有被蚀刻的区域形成基岛1.1及引脚1.2,被半蚀刻的区域形成半蚀刻区1.3,其用意主要避免在后续的包封作业中出现溢胶及打线工艺的信赖性。
3)镀金属层——参见图3,在没有被刻蚀的基岛1.1及引脚1.2正面镀上金属层2,例如金、银、铜、镍,以利于后续金属线与芯片区和打线内脚区间紧密牢固地接合。
4)银胶涂布——参见图4,在基岛正面金属层2.1上涂布上银胶3以利后续贴片程序的完成。如果采用共晶的方式,则无需涂布银胶。
5)贴片作业——参见图5,在刚刚完成银胶涂布的银胶3上进行芯片4的植入,完成后再依据银胶的特性进行银胶后固化的作业,制成集成电路或分立元件的列陈式集合体半成品。
6)金属线球焊——参见图6,将已完成芯片植入作业的半成品进行打金属线5作业,例如金线、银线、铜线、铝线。
7)包封作业——参见图7,将已打线完成的半成品正面进行包封塑封体6作业,并依据塑料的特性进行塑料包封后固化作业以保护金属线、芯片及内脚的安全,
8)打印作业——参见图8,将已完成塑料包封及后固化作业的半成品,进行正面打印7作业,用以识别芯片的功能及特性。
9)干墨涂布——参见图9,在金属基板1背面涂上干墨8,用意是防止后续各项必要区域不被腐蚀。
10)切除不要的干墨位置——参见图10,切除半蚀刻区1.3背面的干墨,用意是露出所需的区域进行后续作业。
11)背面蚀刻——参见图11,将半蚀刻区1.3剩下部分的金属再次进行蚀刻,从而使基岛和引脚凸出于塑封体6表面。
12)去除所有干墨——参见图12,去除金属基板1背面余下的用于保护金属基板的干墨8.1、8.2。
13)功能脚表面镀金属层——参见图13,在没有被刻蚀的基岛1.1及引脚1.2背面镀上金属层9,例如金、银、铜、锡、镍钯等金属,以利于功能脚与电路板在焊接时能更加紧密、牢固地接合,
14)塑封体粘贴作业——参见图14,在完成功能脚表面镀金属层的作业后,再将半成品的塑封体正面贴上胶膜10,准备进行后续塑封体切割作业。
15)塑封体切割——参见图15,利用切割机对已贴上胶膜的半成品进行切割作业,使原本以列阵式集合体方式连在一起的芯片一颗颗独立开来。
16)塑封体与粘胶膜分离——参见图16,将完成切割的产品利用取放转换设备将单颗集成电路或分立元件的塑封体逐一的吸出胶膜,并置放于塑料承载盘、塑料承载胶管、编带内。
17)最后成品——参见图17,图中A为芯片放置区,B为功能脚。
参见图18,新型集成电路或分立元件超薄无脚封装结构,主要由芯片承载底座11、打线内脚承载底座12、芯片4、金属线5以及塑封体6组成。其特点是:
所述的芯片承载底座11包括中间基岛1.1以及正面金属层2和背面金属层9,
所述的打线内脚承载底座12包括中间引脚1.2以及正面金属层2和背面金属层9,
芯片承载底座11的正面金属层2.1上植入芯片4,
芯片4正面和基岛1.1正面金属层2.2分别与金属线5两端连接制成封装结构半成品,
将封装结构半成品正面用塑封体6包封,并使基岛1.1和引脚1.2凸出于塑封体6表面。

Claims (9)

1、一种新型集成电路或分立元件超薄无脚封装工艺,其特征在于它依次包括以下工艺步骤:
——取一片金属基板材(1),
——在金属基板(1)正面进行半蚀刻,金属基板(1)上没有被蚀刻的区域形成基岛(1.1)及引脚(1.2),被半蚀刻的区域形成凹陷的半蚀刻区(1.3),
——在没有被刻蚀的基岛(1.1)及引脚(1.2)正面镀上金属层(2),
——在基岛正面金属层(2)上进行芯片(4)的植入,制成集成电路或分立元件的列陈式集合体半成品,
——将已完成芯片植入作业的半成品进行打金属线(5)作业,
——将已打线完成的半成品正面进行包封塑封体(6)作业,并进行塑料包封后固化作业,
——将已完成塑料包封及后固化作业的半成品,进行正面打印(7)作业,
——在金属基板(1)背面涂上干墨(8),
——切除半蚀刻区(1.3)背面的干墨,
——将半蚀刻区(1.3)剩下部分的金属再次进行蚀刻,从而使基岛和引脚凸出于塑封体(6)表面,
——去除金属基板(1)背面余下的干墨(8.1、8.2),
——在没有被刻蚀的基岛(1.1)及引脚(1.2)背面镀上金属层(9),
——将塑封体(6)正面贴上胶膜(10),
——已贴上胶膜的半成品进行切割作业,使原本以列阵式集合体方式连在一起的芯片一颗颗独立开来,
——将完成切割的产品利用取放转换设备将单颗集成电路或分立元件的塑封体吸出胶膜。
2、根据权利要求1所述的一种新型集成电路或分立元件超薄无脚封装工艺,其特征在于在基岛(1.1)正面金属层(2.1)上直接进行芯片(4)的植入。
3、根据权利要求1所述的一种新型集成电路或分立元件超薄无脚封装工艺,其特征在于先在基岛(1.1)正面金属层(2.1)上涂布上银胶(3),再在刚刚完成银胶涂布的银胶(3)上进行芯片(4)的植入,完成后再进行银胶后固化的作业。
4、根据权利要求1或2、3所述的一种新型集成电路或分立元件超薄无脚封装工艺,其特征在于基岛(1.1)及引脚(1.2)正面金属层(2)为金或银、铜、镍。
5、根据权利要求1或2、3所述的一种新型集成电路或分立元件超薄无脚封装工艺,其特征在于金属线(5)为金线或银线、铜线、铝线。
6、根据权利要求1或2、3所述的一种新型集成电路或分立元件超薄无脚封装工艺,其特征在于基岛(1.1)及引脚(1.2)背面金属层(9)为金、银、铜、锡、镍钯层。
7、一种新型集成电路或分立元件超薄无脚封装结构,包括芯片承载底座(11)、打线内脚承载底座(12)、芯片(4)、金属线(5)以及塑封体(6),其特征在于:
所述的芯片承载底座(11)包括中间基岛(1.1)以及正面金属层(2)和背面金属层(9),
所述的打线内脚承载底座(12)包括中间引脚(1.2)以及正面金属层(2)和背面金属层(9),
芯片承载底座(11)的正面金属层(2.1)上植入芯片(4),
芯片(4)正面和基岛(1.1)正面金属层(2.2)分别与金属线(5)两端连接制成封装结构半成品,
将封装结构半成品正面用塑封体(6)包封,并使基岛(1.1)和引脚(1.2)凸出于塑封体(6)表面。
8、根据权利要求7所述的一种新型集成电路或分立元件超薄无脚封装结构,其特征在于芯片承载底座(11)正面金属层(2.1)上直接进行芯片(4)的植入。
9、根据权利要求7所述的一种新型集成电路或分立元件超薄无脚封装结构,其特征在于芯片承载底座(11)正面金属层(2.1)上先涂布一层银胶层(3),再在银胶层(3)上植入芯片(4)。
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