CN101047158A - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

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CN101047158A
CN101047158A CNA2006101075049A CN200610107504A CN101047158A CN 101047158 A CN101047158 A CN 101047158A CN A2006101075049 A CNA2006101075049 A CN A2006101075049A CN 200610107504 A CN200610107504 A CN 200610107504A CN 101047158 A CN101047158 A CN 101047158A
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semiconductor device
metal derby
semiconductor chip
substrate
external component
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CN100594603C (zh
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阿部知行
饭岛真也
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Fujitsu Ltd
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Abstract

本发明提供一种半导体器件及其制造方法，该半导体器件包括安装衬底；以及半导体芯片，经由金属块安装在该安装衬底上，其中该金属块包括与该半导体芯片接合的内部部件和覆盖该内部部件的外部部件，该外部部件具有比该内部部件高的硬度。

Description

半导体器件及其制造方法
相关申请的交叉参考
本申请基于申请日为2006年3月27日的日本在先申请No.2006-086536，在此援引其全部内容作为参考。
技术领域
本发明一般涉及半导体器件，尤其涉及一种将半导体芯片安装在封装衬底上的半导体器件。
背景技术
在称为高频模块(设计用于高频应用)的半导体器件中，通过倒装芯片法将化合物半导体芯片如GaAs芯片安装在安装衬底如模块衬底上，而形成MMIC(monolithic microwave integrated circuit，单片微波集成电路)。对于这种高频应用的半导体器件，在半导体芯片上形成低电阻的金凸块(stud bump)，在进行倒装时，该凸块与安装衬底上的相应金电极焊盘相接合。
金凸块与金电极焊盘的这种接合可通过热压焊、使用粘合剂的压焊、超声波接合等实现，其中在热压焊的情况下所需的温度为300℃-400℃。
在这种高频应用的半导体器件中，通常使用陶瓷衬底作为安装衬底，然而，最近需要在这种高频应用的半导体器件中也使用成本低的树脂衬底作为安装衬底。但是，当使用树脂衬底时，就不能使用热焊接工艺，因为如前面所提到的，热焊接所需要的温度是300℃-400℃。
另一方面，在通过粘合剂实现接合的情况下，不需要进行热处理，并且不会引起有关安装衬底的热阻的问题。然而，在通过粘合剂接合金凸块与金电极焊盘的情况下，这些部件仅仅相互接触，从而在进行振动或热循环时可能引起例如电阻增大或断线的问题。
在这些情况下，超声波接合技术的重要性日益提高，该技术能够在低温下实现金凸块与金电极焊盘之间的熔接。
为了使用这种超声波接合技术实现可靠且牢固的接合，将要接合的金属的表面态是不常重要的。
参考文献
专利文献1
日本特开专利申请2002-76832；
专利文献2
日本特开专利申请2001-127102
发明内容
图1示出根据本发明的相关技术通过倒装芯片法进行的MMIC的制造方法。
参照图1，在如GaAs的化合物半导体芯片11的前侧形成包括互连图案12a的树脂密封层12，并且在树脂密封层12中形成块(bump)电极12A和12B。另外，通过电解镀工艺在块电极12A和12B上分别形成金凸块13A和13B。
通过倒装芯片法将半导体芯片11安装在模块衬底14上，因此，相应于金凸块13A和13B，在模块衬底14上分别形成电极焊盘15A和15B。在图中所示的实例中，电极焊盘15A由形成在模块衬底14上的铜电极图案15a和通过化学镀工艺形成在铜电极图案15a上的镍膜15b形成。另外，通过化学镀工艺在镍膜15b上形成金膜15c。类似地，电极焊盘15B由形成在模块衬底14上的铜电极图案15d和通过化学镀工艺形成在铜电极图案15d上的镍膜15e形成。另外，通过化学镀工艺在镍膜15e上形成金膜15f。
目前，在使用超声波接合工艺进行倒装的情况下，众所周知，当使用较软的金属部件和不太硬的金属部件进行接合时会获得更牢固的接合。对于金部件而言，用作导线的块状金材料是最软的(维氏硬度为20-60)，并且按照通过电解镀工艺形成的金材料(维氏硬度为50或更高)和通过化学镀工艺形成的金材料(维氏硬度为100或更高)的顺序硬度增加。
对于图1所示的半导体器件，金凸块13A和13B是通过电解镀工艺形成的，因此超声波接合工艺提供的接合强度大约为50Mpa。值得注意的是，该接合强度没有达到公认为可获得可靠接合的标准值75Mpa或更高。
通过将块状金材料用于金凸块13A和13B，预期可获得更高的接合强度。
另一方面，在将块状金材料用于金凸块13A和13B时，会引起如下问题：由于通过倒装芯片法将半导体芯片安装在模块衬底上，因此在进行超声波接合工艺时，软凸块引起大范围的变形(extensive deformation)，这种变形会导致半导体器件的高频特性如反射特性或损耗退化。应注意，金凸块13A和13B在平面图中通常是正方形的，例如每条边长的尺寸是40μm，并且凸块以预定的间隔如200μm设置。
这样，在传统的半导体器件中，尤其是在高频半导体器件中，增加凸块的接合强度和提高电特性尤其是高频特性一直是相矛盾的关系，目前还没有能够同时满足这些需要的解决方案。
根据本发明的一个方案，提供一种半导体器件，其包括：
安装衬底；以及
半导体芯片，经由金属块安装在所述安装衬底上，
所述金属块包括与所述半导体芯片接合的内部部件和覆盖所述内部部件的外部部件，
所述外部部件具有比所述内部部件高的硬度。
根据本发明的另一方案，提供一种制造半导体器件的方法，其中包括通过倒装芯片法将半导体芯片安装在安装衬底上的步骤，该方法包括如下步骤：
在所述安装衬底上形成金属块；以及
在所述金属块上形成镀膜，
所述倒装步骤包括如下子步骤：
使所述半导体芯片顶压所述金属块，以使所述电极焊盘顶压所述金属块；以及
通过向所述半导体芯片施加超声波，将所述金属块超声波接合到所述电极焊盘。
根据本发明的又一方案，提供一种制造半导体器件的方法，其中包括将半导体芯片倒装在安装衬底上的步骤，该方法包括如下步骤：
由带有金属镀膜的金属线，在所述安装衬底上形成金属块；
使所述半导体芯片顶压所述安装衬底上的所述金属块，以使所述半导体芯片上的电极焊盘顶压所述金属块；以及
通过向所述半导体芯片施加超声波，将所述金属块超声波接合到所述电极焊盘。
根据本发明，因为在金属块的软内部部件与半导体芯片的电极焊盘之间实现了超声波接合，从而获得金属块的牢固接合。同时，通过硬度增加的外部部件强化软内部部件，从而可有效地防止在进行超声波接合工艺时金属块的过度变形。因此，有效地防止了高频特性偏离预定标准的问题。
应注意，通过形成晶粒直径小且硬度高的镀层作为外部部件，可容易地实现金属块的强化。因此，在已通过金属线焊接形成的金属块的表面上形成镀层或者焊接带有镀层的金属块，可以形成带有镀层的金属块。
从下面结合附图的详细说明，本发明的其它目的和特征将变得更明显。
附图说明
图1示出根据本发明相关技术的半导体器件的制造方法；
图2-7示出根据本发明第一实施例的半导体器件的制造方法；
图8示出本发明第一实施例的半导体器件中凸块的变形；以及
图9和图10示出根据本发明第二实施例的半导体器件的制造方法。
具体实施方式
[第一实施例]
图2-7示出根据本发明实施例的半导体器件的制造方法。
参照图2，在例如由环氧玻璃形成的树脂安装衬底41上形成铜互连图案41A和41B，并且通过化学镀在铜互连图案41A和41B的表面上分别形成例如3μm厚的镍层41a和41b。在镍层41a和41b上形成例如0.5μm厚的金膜41c和41d。
另外，如图3所示，通过焊接直径为30μm的金线42A，例如使用引线接合器，在覆盖铜互连图案41A的金膜41c上形成直径约为40μm的凸块43A，其中在金线42A上带有厚度为1-5μm(例如2μm)的金涂覆膜(coating film)42a，该金涂覆膜42a通过化学镀工艺或电解镀工艺形成。类似地，如图3所示，通过焊接直径为30μm的金线42B，例如使用引线接合器，在覆盖铜互连图案41B的金膜41d上形成直径约为40μm的凸块43B，其中在金线42B上带有厚度为1-5μm(例如2μm)的金涂覆膜42b，该金涂覆膜42b通过化学镀工艺或电解镀工艺形成。金线42A和42B由块状金线材料形成，该块状金线材料的特征是典型的晶粒尺寸为0.1-0.5μm，维氏硬度为20-60，典型为50或更低。
另一方面，在通过化学镀工艺形成金涂覆膜42a和42b的情况下，金涂覆膜42a和42b具有典型晶粒直径0.01-0.05μm，维氏硬度为100或更高。在通过电解镀工艺形成金涂覆膜42a和42b的情况下，金涂覆膜42a和42b具有中等晶粒直径0.05-0.1μm，维氏硬度为50或更高。
在下文中，将对通过化学镀工艺形成金涂覆膜42a和42b的情况作说明。
在图4所示的步骤中，使用切割机(cutter)或通过碾压(crushing)将凸块43A和43B的尖端部整平，以在尖端部暴露金线42A或金线42B。应注意，图4所示的整平处理可通过使整平部件顶压图3所示的结构来进行，或者如同将参照图6说明的，可通过使待安装的半导体芯片顶压图3所示的结构来进行。
下一步，在图5所示的步骤中，以反转状态或倒装状态将半导体芯片51设置在安装衬底41上。
应注意，半导体芯片51是如GaAs或InGaAs的化合物半导体的MMIC，并且在位于半导体芯片51前侧的树脂密封层52中形成金互连图案52A。互连图案52A与在覆盖树脂密封层52表面的保护膜53中形成的电极焊盘53A和53B相连接。
在图5所示的步骤中，通过接合工具(图中未示出)固定半导体芯片51，并且在图6所示的步骤中，如箭头所示，通过驱动接合工具，以50MPa的载荷使半导体芯片51顶压安装衬底41。应注意，上述50MPa的载荷是在金超声波接合中提供最大接合强度的载荷。
由此，半导体芯片51的块电极53A和53B分别与凸块43A和43B的尖端部接合，并且在尖端部暴露的块状金材料42A和42B分别顶压块电极53A和53B。从而，如上所述，在该步骤中也能在凸块43A和43B的尖端部进行整平。
在图6所示的步骤中，以这种状态进一步驱动接合工具并且向芯片51施加超声波。由此，将凸块43A超声波接合到对应的电极焊盘53A，并将凸块43B超声波接合到对应的电极焊盘53B。
图7示出在进行超声波接合工艺后包括衬底41、凸块43A和43B以及半导体芯片51的半导体器件40的状态。应注意，在图7所示的状态中，设置了树脂密封层52来填充半导体芯片51和衬底41之间的间隙。例如，在150℃温度下固化该密封树脂，进一步强化凸块43A和43B。
对于图7所示的半导体器件40，已确定：关于对应的电极53A和53B，块状金材料的凸块43A和43B的内部部件42A和42B可获得大约80Mpa的接合强度，其中应注意该接合强度超过所需的接合强度75Mpa。另外，应注意，与图1所示的相关技术所提供的、通过电解镀工艺形成凸块的情况相比，由此获得的接合强度高出60％或更多。
图8对接合前图5所示的凸块43A的形状与接合后图7所示的凸块43A的形状进行比较。
参照图8，在进行接合步骤前，凸块43A在平面图中是正方形的，每条边的尺寸为40μm，然而可以看出在图7所示的接合步骤后，在与边平行的方向上产生了宽度的增加。
因此，对于图7所示的半导体器件40，其中凸块43A和43B分别被作为外部部件的化学镀层42a和42b强化，化学镀层42a和42b具有高硬度和2μm的厚度，从而占整个宽度的5％，在与图7所示的、已进行接合的状态相对应的图8的状态下，凸块43A和43B的横向扩展和由此导致的宽度增加得到有效地抑制，并且在图7所示的状态下，凸块43A和43B的宽度保持在从相应于初始宽度的45μm到大约50μm的范围内。在图8所示的情况下，凸块宽度的增加率为25％。
因此，通过抑制凸块的变形以使宽度最大部分的第一宽度保持在宽度最小部分的第二宽度的1.3倍之内，能够将反射特性的退化抑制在-10dB或以下，将损耗抑制在5dB或以下。由此，确保半导体器件40具有预定的性能。
另外，在温度为-55℃和150℃之间对由此形成的半导体器件40进行热循环测试，已确定：即使在热循环次数超过3000次的情况下，凸块与导电图案之间接触电阻的增加仍可抑制在10％的范围内。因此，可确定通过本发明的这种结构能够获得令人满意的接触可靠性。
另外，对于形成厚度为5μm的化学镀层42a和42b的情况也进行了实验。在这种情况下，化学镀层42a和42b占凸块总宽度的14％。在此情况下，同样已确定获得的接合强度为80MPa，也确定凸块宽度的增加率为17.5％。在这种情况下，进一步抑制了凸块的变形，并且进一步抑制了半导体器件40的高频特性的退化。
虽然图2-7所示的实施例在将半导体芯片51安装在安装衬底41上之后在半导体芯片51和安装衬底41之间形成树脂密封层52，然而也可以在安装衬底41的表面上形成不导电胶(NCP，non-conductive paste)层，并且通过使半导体芯片顶压不导电胶层进行超声波接合。
在这种情况下，也已确定：即使在上述热循环处理重复进行1000次时，仍没有连接可靠性的问题发生。
[对比例]
在不设置化学镀层42a和42b的情况下形成相同的器件结构时，获得了大约85MPa的接合强度，而且该接合强度超过了所需的接合强度。然而，观察到凸块宽度的增长率高达32.5％，因此在半导体器件中引起高频性能特性的严重退化。
另外，在通过电解镀工艺形成凸块43A和43B的情况下，观察到凸块宽度的增长率是12.5％，因此半导体器件就高频特性而言获得了预期的性能。另一方面，观察到接合强度为50-70MPa，因此不能提供满意的连接可靠性。
[第二实施例]
图9和图10示出根据本发明第二实施例的半导体器件的部分制造方法，其中与上述部件相对应的哪些部件用相同的标号标记，并且将省略其描述。
参照图9，通过金线的引线接合，相应于铜互连图案41A和41B，在安装衬底41上形成块状金材料的凸点(stud)42A和42B，其中铜互连图案41A和41B分别被金膜41c和41d覆盖。
下一步，根据本实施例，用抗蚀剂膜(图中未示出)覆盖衬底41的表面，使其达到与金膜41c和41d的高度相应的水平，并且通过化学镀工艺或电解镀工艺在凸点42A和42B上分别形成厚度为2-5μm的金涂覆膜42a和42b。由此形成的金涂覆膜42a和42b用作凸块43A和43B的加强层。
在图10所示的步骤之后，进行图4-7所示的工艺，并且获得与上述实施例相似的半导体器件40，在上述实施例中将MMIC芯片51倒装在安装芯片41上。
虽然上文以通过超声波接合工艺接合金凸块的半导体器件为例说明了本发明，但本发明不局限于这种使用纯金凸块的半导体器件。因此，根据本发明通过凸块上的加强膜来抑制半导体器件特性退化，在通过含有金、银、锡和铅中的至少一种的块材料形成凸点的情况下也是有效的。
因此，强化凸块的材料不限于通过化学镀工艺形成的材料，任何材料都可用于这一目的，只要硬度高于凸块的硬度，并且在进行接合工艺后的状态下能够抑制凸块的宽度最大部分的宽度是宽度最小部分的宽度的1.3倍或以下。例如，可以使用金、银、钯、铜、锡和铅中的至少一种。
虽然上文针对优选实施例说明了本发明，但本发明不局限于上述具体实施例，在本发明的范围内可进行各种变化和修改。

Claims (13)

1.一种半导体器件，包括：
安装衬底；以及
半导体芯片，经由金属块安装在所述安装衬底上，
其中，所述金属块包括与所述半导体芯片接合的内部部件和覆盖所述内部部件的外部部件，
所述外部部件具有比所述内部部件高的硬度。
2.如权利要求1所述的半导体器件，其中，所述金属块的宽度最大部分的宽度是宽度最小部分的宽度的1.3倍或以下。
3.如权利要求1所述的半导体器件，其中，所述外部部件的厚度为1-5μm。
4.如权利要求1所述的半导体器件，其中，所述内部部件具有第一平均晶粒尺寸，而所述外部部件具有比所述第一平均晶粒尺寸小的第二平均晶粒尺寸。
5.如权利要求1所述的半导体器件，其中，所述外部部件是通过在所述内部部件上进行化学镀工艺而形成的。
6.如权利要求1所述的半导体器件，其中，所述外部部件是通过在所述内部部件上进行电解镀工艺而形成的。
7.如权利要求1所述的半导体器件，其中，所述内部部件是由金、银、锡和铅中的至少一种形成的。
8.如权利要求1所述的半导体器件，其中，所述外部部件是由金、银、锡、钯、铜、锡和铅中的至少一种形成的。
9.如权利要求1所述的半导体器件，其中，所述半导体芯片包括高频、微波或毫米波应用的任一种半导体器件。
10.如权利要求1所述的半导体器件，其中，所述安装衬底是由树脂衬底形成的。
11.一种制造半导体器件的方法，其中包括通过倒装芯片法将半导体芯片安装在安装衬底上的步骤，该方法包括如下步骤：
在所述安装衬底上形成金属块；以及
在所述金属块上形成镀膜，
所述倒装步骤包括如下子步骤：
使所述半导体芯片顶压所述金属块，以使所述电极焊盘顶压所述金属块；以及
通过向所述半导体芯片施加超声波，将所述金属块超声波接合到所述电极焊盘。
12.一种制造半导体器件的方法，其中包括将半导体芯片倒装在安装衬底上的步骤，该方法包括如下步骤：
由带有金属镀膜的金属线，在所述安装衬底上形成金属块；
使所述半导体芯片顶压所述安装衬底上的所述金属块，以使所述半导体芯片上的电极焊盘顶压所述金属块；以及
通过向所述半导体芯片施加超声波，将所述金属块超声波接合到所述电极焊盘。
13.如权利要求11所述的制造半导体器件的方法，在进行所述顶压步骤之前，还包括如下步骤：处理所述金属块的尖端部，以在所述尖端部暴露由所述金属线形成的部分。
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CN100594603C (zh) 2010-03-17
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US20070222085A1 (en) 2007-09-27
US7754536B2 (en) 2010-07-13
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US7429796B2 (en) 2008-09-30

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