JP5919625B2 - 半導体装置及びその製造方法、電源装置 - Google Patents
半導体装置及びその製造方法、電源装置 Download PDFInfo
- Publication number
- JP5919625B2 JP5919625B2 JP2011036253A JP2011036253A JP5919625B2 JP 5919625 B2 JP5919625 B2 JP 5919625B2 JP 2011036253 A JP2011036253 A JP 2011036253A JP 2011036253 A JP2011036253 A JP 2011036253A JP 5919625 B2 JP5919625 B2 JP 5919625B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- sheet
- metal
- fibrous
- molten metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
- H01L23/49513—Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05553—Shape in top view being rectangular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/2901—Shape
- H01L2224/29011—Shape comprising apertures or cavities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29075—Plural core members
- H01L2224/29076—Plural core members being mutually engaged together, e.g. through inserts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/29111—Tin [Sn] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/4901—Structure
- H01L2224/4903—Connectors having different sizes, e.g. different diameters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01024—Chromium [Cr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01049—Indium [In]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0133—Ternary Alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0134—Quaternary Alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/0665—Epoxy resin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1032—III-V
- H01L2924/10329—Gallium arsenide [GaAs]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13064—High Electron Mobility Transistor [HEMT, HFET [heterostructure FET], MODFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
- H01L2924/15747—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2924/15763—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550 C
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Die Bonding (AREA)
- Junction Field-Effect Transistors (AREA)
Description
近年、GaN系の化合物半導体であるAlGaN/GaNのヘテロ接合を利用し、GaNを電子走行層とし、AlGaNを電子供給層として用い、これらを積層したHEMT構造を備えるGaN−HEMTの開発が活発である。
なお、半導体チップを支持板上に実装する技術としては、例えばはんだや接着剤などのダイボンディング剤を用いて、半導体チップの裏面を支持板の半導体チップ実装領域に接合することで、半導体チップを支持板上に実装する技術がある。
つまり、まず、半導体チップ実装領域及び半導体チップの裏面の一方にダイボンディング剤を塗布する。次に、半導体チップを、支持板の半導体チップ実装領域に載せる。そして、これらを加熱して、半導体チップの裏面を、ダイボンディング剤によって、支持板の半導体チップ実装領域に接合する。
そこで、回路基板、リードフレームのステージなどの支持板上に半導体チップを実装する際に、半導体チップが移動や回転等の位置ずれを生じないようにしたい。
本半導体装置の製造方法は、支持板の半導体チップ実装領域に、少なくとも外表面に金属を有する繊維状材料からなるシートを載せ、半導体チップ実装領域に、シートを超音波によって仮接合し、半導体チップ実装領域に、溶融金属を含む接合層を形成し、半導体チップ実装領域に、半導体チップを載せ、加熱することによって、溶融金属を含む接合層によって半導体チップを半導体チップ実装領域に接合することを要件とする。
また、本半導体装置の製造方法は、支持板の半導体チップ実装領域に、少なくとも外表面に金属を有する繊維状材料からなるシートを載せ、半導体チップ実装領域に、シート状の溶融金属からなる接合層を形成し、半導体チップ実装領域に、シート及びシート状の溶融金属からなる接合層を超音波によって仮接合し、半導体チップ実装領域に、半導体チップを載せ、加熱することによって、シート状の溶融金属からなる接合層によって半導体チップを半導体チップ実装領域に接合することを要件とする。
[第1実施形態]
まず、第1実施形態にかかる半導体装置及びその製造方法について、図1〜図7を参照しながら説明する。
以下、ディスクリートパッケージを例に挙げて説明する。
ここでは、半導体チップ1の裏面(基板裏面)が固定されたステージ2は、ドレインリード23と一体になっており、これらは電気的に接続されている。このため、ドレインパッド26をワイヤ4によってステージ2に接続することで、ドレインパッド26をワイヤ4によってドレインリード23に接続することになる。なお、これに限られるものではなく、ステージ2がソースリード22と電気的に接続されるようにしても良い。
まず、図1(A)〜図1(C)に示すように、キャリア走行層及びキャリア供給層を含む窒化物半導体積層構造を備える半導体チップ1を、リードフレームのステージ2上に固定する。なお、詳細は後述する。
その後、図示していないが、ゲートリード21及びソースリード22をリードフレームから切り離して、半導体装置(ディスクリートパッケージ)が得られる。
そこで、本実施形態では、以下のようにして、半導体チップ1をリードフレームのステージ2上に固定するようにしている。
ここでは、繊維状金属シート5は、半導体チップ1の面積と同等の面積を有する。ここで、「同等の面積」とは、完全に同一の面積だけでなく、ほぼ同一の面積あるいは同程度の面積を含むものとする。なお、半導体チップ実装領域2Aの面積は、半導体チップ1の面積と同一又はほぼ同一(同等)になっている。本実施形態では、リードフレームのステージ2に搭載する半導体チップ1のサイズは、約4.5mm×約7mmである。このため、約4.5mm×約7mmのサイズの繊維状金属シート5を用いている。
さらに、ステージ2の半導体チップ実装領域2Aに載せた繊維状金属シート5の位置がずれないように、繊維状金属シート5を半導体チップ実装領域2Aに載せた後に、半導体チップ実装領域2Aに繊維状金属シート5を超音波によって仮接合するのが好ましい。
また、溶融金属を含む接合層3は、シート状の溶融金属からなる層、ペースト状の溶融金属からなる層、溶融金属と樹脂(樹脂材料;熱硬化性樹脂材料)とを含む熱伝導性接着剤からなる層のいずれかである。
ここで、シート状の溶融金属は、例えばSn−Ag−Cuはんだシートであり、これを繊維状金属シート5の上に載せることによって、繊維状金属シート5の上にシート状の溶融金属からなる層3が形成される。また、ペースト状の溶融金属は、例えばSn−Ag−Cuはんだペーストであり、これを繊維状金属シート5の上に載せることによって、繊維状金属シート5の上にペースト状の溶融金属からなる層3が形成される。なお、ペースト状の溶融金属としては、例えば、ナノサイズの金属粉末を用い、金属表面を活性化することによって、低温で焼結できるナノペーストを用いても良い。さらに、溶融金属と樹脂とを含む熱伝導性接着剤は、例えば平均粒径約22μmのSn−Ag−Cuはんだ粒子と樹脂とを含む熱伝導性接着剤であり、これを繊維状金属シート5の上に載せることによって、繊維状金属シート5の上に溶融金属と樹脂とを含む熱伝導性接着剤からなる層3が形成される。なお、ペースト状の溶融金属や熱伝導性接着剤は、例えばディスペンス法、スクリーン印刷法などの印刷法などによって、繊維状金属シート5の上に塗布又は印刷することで、繊維状金属シート5の上に載せることができ、これによって、繊維状金属シート5の上にペースト状の溶融金属や熱伝導性接着剤からなる層3を形成することができる。
なお、本実施形態では、ステージ2の半導体チップ実装領域2Aに、繊維状金属シート5を載せ、その後、溶融金属を含む接合層3を形成するようにしているが、これに限られるものではなく、溶融金属を含む接合層3を形成した後、繊維状金属シート5を載せるようにしても良い。
特に、シート状の溶融金属を用いる場合であって、超音波による仮接合を行なった場合は、不活性雰囲気又は還元雰囲気下で加熱してシート状の溶融金属からなる層3を溶融させれば良い。例えば、Sn−Ag−Cuはんだシートを用いる場合、例えばN2雰囲気で最大温度約250℃で加熱して、Sn−Ag−Cuはんだシートを溶融させれば良い。これにより、洗浄が必要なフラックスを用いなくても良くなる。
つまり、本実施形態にかかる半導体装置は、図7に示すように、ステージ2と、ステージ2上に設けられた半導体チップ1と、溶融金属及び繊維状金属材料(繊維状材料)を含み、ステージ2と半導体チップ1とを接合している接合層3とを備える。
また、接合層3を熱伝導性接着剤によって形成する場合、製造される半導体装置の接合層3は、さらに樹脂を含むものとなる。
つまり、半導体チップ1をリードフレームのステージ2上の半導体チップ実装領域2Aに接合するための加熱時に、繊維状金属シート5によって、溶融金属を含む接合層3の流れ性が制御される。つまり、加熱・接合時に、繊維状金属シート5によって、例えばはんだなどの溶融金属の濡れ広がる領域が制御され、溶融金属のセルフアライメント効果によって半導体チップ1の位置が制御される。このため、溶融金属を含む接合層3の高い表面張力の影響を受けても、図3に示すように、半導体チップ1を所望の位置に保持することができ、位置ずれを生じることなく、精度良く固定(搭載)することが可能となる。これに対し、単にダイボンディング剤を用いるだけでは、加熱・接合時に、半導体チップ1が移動や回転等の位置ずれを生じてしまう(図11参照)。
実際に、上述の実施形態のように、繊維状金属シート5を用いて半導体パッケージを作製するとともに、比較例として、繊維状金属シート5を用いないで半導体パッケージを作製し、評価を行なったところ、以下のような結果になった。
例えば、外表面が溶融金属と合金化しうる金属5Cで覆われている、溶融金属と反応しない繊維状金属材料5Bからなるシート5を用いても良い。つまり、中心部が溶融金属と合金形成しない金属材料5B(例えばCrなど)からなり、中心部の周囲を覆っている外周部が溶融金属と合金形成可能な金属材料5Cからなる複合材料を繊維状材料5Xとして用いたシート5を用いても良い。また、例えば、外表面が溶融金属と合金化しうる金属5Cで覆われている繊維状樹脂材料5Bからなるシート5を用いても良い。つまり、中心部が樹脂材料5Bからなり、中心部の周囲を覆っている外周部が溶融金属と合金形成可能な金属材料5Cからなる複合材料を繊維状材料5Xとして用いたシート5を用いても良い。また、例えば、外表面が溶融金属と合金化しうる金属5Cで覆われている繊維状ガラス材料5Bからなるシート5を用いても良い。つまり、中心部がガラス材料5Bからなり、中心部の周囲を覆っている外周部が溶融金属と合金形成可能な金属材料5Cからなる複合材料を繊維状材料5Xとして用いたシート5を用いても良い。要するに、中心部が溶融金属と合金形成しない材料5Bからなり、中心部の周囲を覆っている外周部が溶融金属と合金形成可能な金属材料5Cからなる複合材料を繊維状材料5Xとして用いたシート5を用いても良い。このような複合材料を用いた繊維状材料5Xからなるシート5は、例えば、シート5を構成する繊維状材料(溶融金属と反応しない繊維状金属材料、繊維状樹脂材料、繊維状ガラス材料)5Bの外周表面上に、無電解めっき法又は金属蒸着法によって、金属層5Cを形成することによって作製することができる。
また、例えば、外表面が溶融金属と合金化しうる金属5Cで覆われている、溶融金属と反応しない繊維状金属材料5Bからなるシート5を用いた場合、接合層3は、溶融金属と金属5C(即ち、繊維状材料を構成する金属)との合金と、溶融金属と反応しない繊維状金属材料5B(繊維状材料)とを含むものとなる。また、例えば、外表面が溶融金属と合金化しうる金属5Cで覆われている繊維状樹脂材料5Bからなるシート5を用いた場合、接合層3は、溶融金属と金属5C(即ち、繊維状材料を構成する金属)との合金と、繊維状樹脂材料5B(繊維状材料)とを含むものとなる。また、例えば、外表面が溶融金属と合金化しうる金属5Cで覆われている繊維状ガラス材料5Bからなるシート5を用いた場合、接合層3は、溶融金属と金属5C(即ち、繊維状材料を構成する金属)との合金と、繊維状ガラス材料5B(繊維状材料)とを含むものとなる。
このように、繊維状材料5Bとして、溶融金属と反応しない繊維状金属材料(例えばCrなど)、繊維状樹脂材料、繊維状ガラス材料を用いる場合、図9に示すように、接合層3の中に繊維状材料5Bが残存することになる。そして、接合層3の中に残存する繊維状材料5Bによって、半導体チップ1とリードフレームのステージ2との間の熱膨張差によって加わる応力を緩和することができ、半導体装置の信頼性を向上させることが可能となる。つまり、溶融金属と反応しない繊維状金属材料(例えばCrなど)や繊維状樹脂材料を用いる場合、弾性率が低いため、半導体チップ1とリードフレームのステージ2との間の熱膨張差によって加わる応力を緩和することができる。また、繊維状ガラス材料を用いる場合、半導体チップ1の材料とリードフレームのステージ2の材料との中間の熱膨張率を有するものとすることで、半導体チップ1とリードフレームのステージ2との間の熱膨張差によって加わる応力を緩和することができ、また、半導体チップ1とリードフレームのステージ2との界面に加わる応力を低減することができる。
なお、複合材料を用いた繊維状材料シート5は、約4.5mm×約7mmのサイズとし、中心部がエポキシ樹脂5Bからなり、中心部の周囲を覆っている外周部が銅(Cu)5Cからなる複合材料を繊維状材料5Xとして用いたシートとした。また、実施例及び比較例の両方で、Sn−Ag−Cuはんだペーストを用いて接合層3を形成し、最大温度約250℃でリフローを行なった。
[第2実施形態]
次に、第2実施形態にかかる電源装置について、図10を参照しながら説明する。
以下、サーバに用いられる電源装置に備えられるPFC(power factor correction)回路に、上述の半導体パッケージに含まれるGaN−HEMTを用いる場合を例に挙げて説明する。
ここでは、本PFC回路は、回路基板上に、ダイオードブリッジ30、チョークコイル31、第1コンデンサ32、上述の半導体パッケージに含まれるGaN−HEMT33、ダイオード34、及び、第2コンデンサ35が実装されて構成されている。
なお、ここでは、上述の半導体装置(GaN−HEMT又はGaN−HEMTを含む半導体パッケージ)を、サーバに用いられる電源装置に備えられるPFC回路に用いる場合を例に挙げて説明しているが、これに限られるものではない。例えば、上述の半導体装置(GaN−HEMT又はGaN−HEMTを含む半導体パッケージ)を、サーバ以外のコンピュータなどの電子機器(電子装置)に用いても良い。また、上述の半導体装置(半導体パッケージ)を、電源装置に備えられる他の回路(例えばDC−DCコンバータなど)に用いても良い。
[その他]
なお、本発明は、上述した各実施形態及び変形例に記載した構成に限定されるものではなく、本発明の趣旨を逸脱しない範囲で種々変形することが可能である。
以下、上述の各実施形態及び変形例に関し、更に、付記を開示する。
(付記1)
支持板の半導体チップ実装領域に、少なくとも外表面に金属を有する繊維状材料からなるシートを載せ、
前記半導体チップ実装領域に、溶融金属を含む接合層を形成し、
前記半導体チップ実装領域に、前記半導体チップを載せ、
加熱することによって、前記溶融金属を含む接合層によって前記半導体チップを前記半導体チップ実装領域に接合することを特徴とする半導体装置の製造方法。
前記シートは、前記半導体チップの面積と同等の面積を有することを特徴とする、付記1に記載の半導体装置の製造方法。
(付記3)
前記シートは、少なくとも外表面に前記溶融金属と合金化しうる金属を有する繊維状材料からなることを特徴とする、付記1又は2に記載の半導体装置の製造方法。
前記シートは、繊維状金属材料からなることを特徴とする、付記1又は2に記載の半導体装置の製造方法。
(付記5)
前記シートは、前記溶融金属と合金化しうる繊維状金属材料からなることを特徴とする、付記1又は2に記載の半導体装置の製造方法。
前記シートは、外表面が前記溶融金属と合金化しうる金属で覆われている、前記溶融金属と反応しない繊維状金属材料からなることを特徴とする、付記1又は2に記載の半導体装置の製造方法。
(付記7)
前記シートは、外表面が金属で覆われている繊維状樹脂材料からなることを特徴とする、付記1〜3のいずれか1項に記載の半導体装置の製造方法。
前記シートは、外表面が金属で覆われている繊維状ガラス材料からなることを特徴とする、付記1〜3のいずれか1項に記載の半導体装置の製造方法。
(付記9)
前記溶融金属を含む接合層は、シート状の溶融金属からなる層であることを特徴とする、付記1〜8のいずれか1項に記載の半導体装置の製造方法。
前記溶融金属を含む接合層は、ペースト状の溶融金属からなる層であることを特徴とする、付記1〜8のいずれか1項に記載の半導体装置の製造方法。
(付記11)
前記溶融金属を含む接合層は、溶融金属と樹脂とを含む熱伝導性接着剤からなる層であることを特徴とする、付記1〜8のいずれか1項に記載の半導体装置の製造方法。
前記半導体チップ実装領域に前記シートを載せた後、前記半導体チップ実装領域に前記シートを超音波によって仮接合することを特徴とする、付記1〜11のいずれか1項に記載の半導体装置の製造方法。
(付記13)
前記半導体チップ実装領域に前記シートを載せ、前記シート状の溶融金属からなる層を形成した後、前記半導体チップ実装領域に前記シート及び前記シート状の溶融金属からなる層を超音波によって仮接合することを特徴とする、付記9に記載の半導体装置の製造方法。
前記溶融金属を含む接合層がシート状の溶融金属からなる層である場合、前記シートにフラックスを含浸させることを特徴とする、付記1〜11のいずれか1項に記載の半導体装置の製造方法。
(付記15)
支持板と、
前記支持板上に設けられた半導体チップと、
溶融金属及び繊維状材料を含み、前記支持板と前記半導体チップとを接合している接合層とを備えることを特徴とする半導体装置。
前記接合層は、前記溶融金属と金属との合金と、繊維状材料とを含むことを特徴とする、付記15に記載の半導体装置。
(付記17)
前記接合層は、前記溶融金属と金属との合金と、繊維状金属材料とを含むことを特徴とする、付記15又は16に記載の半導体装置。
前記接合層は、前記溶融金属と金属との合金と、繊維状樹脂材料とを含むことを特徴とする、付記15又は16に記載の半導体装置。
(付記19)
前記接合層は、前記溶融金属と金属との合金と、繊維状ガラス材料とを含むことを特徴とする、付記15又は16に記載の半導体装置。
支持板と、
前記支持板上に設けられた半導体チップと、
溶融金属及び繊維状材料を含み、前記支持板と前記半導体チップとを接合している接合層とを備える半導体装置を備えることを特徴とする電源装置。
2 ステージ
2A 半導体チップ実装領域
3 溶融金属を含む接合層
4 ワイヤ
5 繊維状金属シート
5A 繊維状金属材料
5B 繊維状金属材料、繊維状樹脂材料、繊維状ガラス材料(金属材料、樹脂材料、ガラス材料、繊維状材料)
5C 金属(金属材料)
5X 繊維状材料
7 封止樹脂(モールド樹脂)
21 ゲートリード
22 ソースリード
23 ドレインリード
24 ゲートパッド
25 ソースパッド
26 ドレインパッド
30 ダイオードブリッジ
31 チョークコイル
32 第1コンデンサ
33 GaN−HEMT
34 ダイオード
35 第2コンデンサ
Claims (6)
- 支持板の半導体チップ実装領域に、少なくとも外表面に金属を有する繊維状材料からなるシートを載せ、
前記半導体チップ実装領域に、前記シートを超音波によって仮接合し、
前記半導体チップ実装領域に、溶融金属を含む接合層を形成し、
前記半導体チップ実装領域に、前記半導体チップを載せ、
加熱することによって、前記溶融金属を含む接合層によって前記半導体チップを前記半導体チップ実装領域に接合することを特徴とする半導体装置の製造方法。 - 支持板の半導体チップ実装領域に、少なくとも外表面に金属を有する繊維状材料からなるシートを載せ、
前記半導体チップ実装領域に、シート状の溶融金属からなる接合層を形成し、
前記半導体チップ実装領域に、前記シート及び前記シート状の溶融金属からなる接合層を超音波によって仮接合し、
前記半導体チップ実装領域に、前記半導体チップを載せ、
加熱することによって、前記シート状の溶融金属からなる接合層によって前記半導体チップを前記半導体チップ実装領域に接合することを特徴とする半導体装置の製造方法。 - 前記シートは、前記半導体チップの面積と同等の面積を有することを特徴とする、請求項1又は2に記載の半導体装置の製造方法。
- 前記シートは、少なくとも外表面に前記溶融金属と合金化しうる金属を有する繊維状材料からなることを特徴とする、請求項1〜3のいずれか1項に記載の半導体装置の製造方法。
- 支持板と、
前記支持板上に設けられた半導体チップと、
溶融金属と金属との合金と、繊維状樹脂材料とを含み、前記支持板と前記半導体チップとを接合している接合層とを備えることを特徴とする半導体装置。 - 支持板と、
前記支持板上に設けられた半導体チップと、
溶融金属と金属との合金と、繊維状樹脂材料とを含み、前記支持板と前記半導体チップとを接合している接合層とを備える半導体装置を備えることを特徴とする電源装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011036253A JP5919625B2 (ja) | 2011-02-22 | 2011-02-22 | 半導体装置及びその製造方法、電源装置 |
TW101102496A TWI518805B (zh) | 2011-02-22 | 2012-01-20 | 半導體裝置、其製造方法,以及電源供應單元 |
US13/355,805 US8674520B2 (en) | 2011-02-22 | 2012-01-23 | Semiconductor device, method for manufacturing the same, and power supply unit |
CN201210031949.9A CN102646610B (zh) | 2011-02-22 | 2012-02-13 | 半导体器件、用于制造半导体器件的方法以及电源装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011036253A JP5919625B2 (ja) | 2011-02-22 | 2011-02-22 | 半導体装置及びその製造方法、電源装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2012174925A JP2012174925A (ja) | 2012-09-10 |
JP5919625B2 true JP5919625B2 (ja) | 2016-05-18 |
Family
ID=46652088
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011036253A Active JP5919625B2 (ja) | 2011-02-22 | 2011-02-22 | 半導体装置及びその製造方法、電源装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US8674520B2 (ja) |
JP (1) | JP5919625B2 (ja) |
CN (1) | CN102646610B (ja) |
TW (1) | TWI518805B (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10840166B2 (en) | 2018-03-20 | 2020-11-17 | Kabushiki Kaisha Toshiba | Semiconductor device |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9230889B2 (en) | 2013-01-16 | 2016-01-05 | Infineon Technologies Ag | Chip arrangement with low temperature co-fired ceramic and a method for forming a chip arrangement with low temperature co-fired ceramic |
CN109742221A (zh) * | 2018-12-07 | 2019-05-10 | 湖北深紫科技有限公司 | 一种全无机led封装方法与封装结构 |
DE102019124953B4 (de) * | 2019-09-17 | 2023-09-07 | Danfoss Silicon Power Gmbh | Verfahren zum Herstellen einer kohäsiven Verbindung zwischen einem Halbleiter und einem Metallformkörper |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58207645A (ja) | 1982-05-28 | 1983-12-03 | Fujitsu Ltd | 半導体装置 |
CA1290676C (en) * | 1987-03-30 | 1991-10-15 | William Frank Graham | Method for bonding integrated circuit chips |
JPS6486589A (en) * | 1987-06-04 | 1989-03-31 | Shin Kobe Electric Machinery | Metal-foiled laminated plate |
US5068061A (en) * | 1989-12-08 | 1991-11-26 | The Dow Chemical Company | Electroconductive polymers containing carbonaceous fibers |
JPH05136286A (ja) * | 1991-11-08 | 1993-06-01 | Hitachi Ltd | 半導体装置 |
JPH06132442A (ja) | 1992-10-19 | 1994-05-13 | Hitachi Ltd | 半導体装置およびその製造方法 |
US5859475A (en) * | 1996-04-24 | 1999-01-12 | Amkor Technology, Inc. | Carrier strip and molded flex circuit ball grid array |
US6188582B1 (en) * | 1998-12-18 | 2001-02-13 | Geoffrey Peter | Flexible interconnection between integrated circuit chip and substrate or printed circuit board |
US6861750B2 (en) * | 2002-02-01 | 2005-03-01 | Broadcom Corporation | Ball grid array package with multiple interposers |
JP2006156437A (ja) | 2004-11-25 | 2006-06-15 | Seiko Epson Corp | リードフレーム及び半導体装置 |
-
2011
- 2011-02-22 JP JP2011036253A patent/JP5919625B2/ja active Active
-
2012
- 2012-01-20 TW TW101102496A patent/TWI518805B/zh active
- 2012-01-23 US US13/355,805 patent/US8674520B2/en active Active
- 2012-02-13 CN CN201210031949.9A patent/CN102646610B/zh active Active
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10840166B2 (en) | 2018-03-20 | 2020-11-17 | Kabushiki Kaisha Toshiba | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
US20120211899A1 (en) | 2012-08-23 |
CN102646610A (zh) | 2012-08-22 |
CN102646610B (zh) | 2014-11-12 |
US8674520B2 (en) | 2014-03-18 |
TWI518805B (zh) | 2016-01-21 |
JP2012174925A (ja) | 2012-09-10 |
TW201250869A (en) | 2012-12-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7256501B2 (en) | Semiconductor device and manufacturing method of the same | |
US8643185B2 (en) | Semiconductor apparatus, manufacturing method of semiconductor apparatus, and joint material | |
US9018744B2 (en) | Semiconductor device having a clip contact | |
US20120211764A1 (en) | Semiconductor device and method for manufacturing semiconductor device | |
JP4865829B2 (ja) | 半導体装置およびその製造方法 | |
CN109314063B (zh) | 电力用半导体装置 | |
CN112753101B (zh) | 半导体装置 | |
JP2007059860A (ja) | 半導体パッケージ及び半導体モジュール | |
JP2015095540A (ja) | 半導体装置およびその製造方法 | |
JP2014135411A (ja) | 半導体装置および半導体装置の製造方法 | |
WO2013145471A1 (ja) | パワーモジュールの製造方法、及びパワーモジュール | |
JP2012209402A (ja) | リード部品及びその製造方法、並びに半導体パッケージ | |
JP5919625B2 (ja) | 半導体装置及びその製造方法、電源装置 | |
JP2013219139A (ja) | 半導体装置 | |
JP2015115363A (ja) | 電子装置及び電子装置の製造方法 | |
US9082756B2 (en) | Semiconductor device and power source device | |
JP5418654B2 (ja) | 半導体装置 | |
CN112424919A (zh) | 半导体装置及半导体装置的制造方法 | |
JP2019110280A (ja) | 半導体装置の製造方法 | |
JP2014053406A (ja) | 半導体装置およびその製造方法 | |
JP7320446B2 (ja) | 半導体装置およびその製造方法 | |
JP5151837B2 (ja) | 半導体装置の製造方法 | |
JP2016127163A (ja) | 半導体装置の製造方法及び製造装置、並びに半導体装置 | |
CN115692357A (zh) | 具有金属间连接结构的电子系统及其制造方法 | |
JP2010141112A (ja) | 半導体装置および半導体装置の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20131106 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20141120 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20141125 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150126 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20150630 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150826 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20160315 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20160328 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5919625 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |