CN1361549A - 半导体器件的电容器制造方法 - Google Patents
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- 239000003990 capacitor Substances 0.000 title claims abstract description 79
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 34
- 239000004065 semiconductor Substances 0.000 title claims abstract description 30
- 229910003071 TaON Inorganic materials 0.000 claims abstract description 73
- 238000000034 method Methods 0.000 claims abstract description 33
- 239000010410 layer Substances 0.000 claims abstract description 11
- 239000011229 interlayer Substances 0.000 claims abstract description 8
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 238000000137 annealing Methods 0.000 claims description 22
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 20
- 230000008020 evaporation Effects 0.000 claims description 16
- 238000001704 evaporation Methods 0.000 claims description 16
- 229910052757 nitrogen Inorganic materials 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 claims description 11
- 239000002184 metal Substances 0.000 claims description 11
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 10
- 239000007789 gas Substances 0.000 claims description 9
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 5
- 239000011248 coating agent Substances 0.000 claims description 4
- 238000000576 coating method Methods 0.000 claims description 4
- 238000005516 engineering process Methods 0.000 claims description 4
- 238000011065 in-situ storage Methods 0.000 claims description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 2
- 150000001875 compounds Chemical class 0.000 claims 2
- 238000004140 cleaning Methods 0.000 claims 1
- 238000010276 construction Methods 0.000 claims 1
- 238000006557 surface reaction Methods 0.000 claims 1
- 239000010408 film Substances 0.000 abstract description 115
- 239000010409 thin film Substances 0.000 abstract description 6
- 238000009413 insulation Methods 0.000 abstract 2
- 229910052760 oxygen Inorganic materials 0.000 description 13
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 7
- 239000001301 oxygen Substances 0.000 description 7
- 239000012535 impurity Substances 0.000 description 6
- 150000004767 nitrides Chemical class 0.000 description 6
- 229910052715 tantalum Inorganic materials 0.000 description 5
- 229910052799 carbon Inorganic materials 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 4
- 230000006866 deterioration Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 239000002243 precursor Substances 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 238000007740 vapor deposition Methods 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- 125000004429 atom Chemical group 0.000 description 2
- 150000001721 carbon Chemical group 0.000 description 2
- 238000002425 crystallisation Methods 0.000 description 2
- 230000008025 crystallization Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 238000011084 recovery Methods 0.000 description 2
- 238000004904 shortening Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 238000007669 thermal treatment Methods 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 239000007833 carbon precursor Substances 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 125000001309 chloro group Chemical group Cl* 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 125000004433 nitrogen atom Chemical group N* 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
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Abstract
本发明提供能够改善用作电解质膜的TaON薄膜的漏电流和介电特性的半导体的电容器制造方法。该方法由如下步骤构成:形成规定的下部图形,提供用层间绝缘膜覆盖的半导体衬底;在所述层间绝缘膜上形成电容器下部电极;为了形成TaON薄膜作为电介质膜,而在所述下部电极上蒸镀非晶质状态的TaON薄膜,在真空状态下对非晶质TaON薄膜进行退火;在由所述TaON薄膜构成的电介质膜上形成电容器上部电极。
Description
本发明涉及半导体器件的电容器制造方法,特别涉及能够改善作为电介质使用TaON薄膜的漏电流和介电特性的半导体器件的电容器制造方法。
现在,为了实现半导体器件的高度集成化,对单元面积的减少和低电压驱动正在活跃地进行研究/开发。可是,伴随电容器形成面积的减少,所述单元面积的减少会减少电容器的容量,因此,很难制造高容量存储元件。
因此,使电容器容量增大就成为制造高集成半导体器件例如高容量存储元件所必要的课题。特别是尽管电容器形成面积的减少,但为了防止软差错的发生和恢复时间的缩短,而要求存储元件的稳定工作所必要的电容器容量应为大约25fF/cell。
这里,所述电容器具有将电介质膜介于下部电极和上部电极之间的结构,其容量与电极的表面积和电介质膜介电常数成正比,与电极间的间隔即电介质膜的厚度成反比。
因此,为了增大电容器的容量,而把电容器的下部电极形成为圆柱结构的三维结构,同时在使用高介电常数的薄膜作为电介质膜的材料方面进行努力。把电容器下部电极形成为三维结构的方法的工艺很难,所以,最近的主攻方向是开发高介电常数的电介质膜。
例如:原来,使用氧化膜/氮化膜/氧化膜(ONO)结构或氮化膜/氧化膜(NO)结构的氮化膜作为电容器的电介质膜,可是所述NO结构的氮化膜的介电常数(ε)低到4~5,所以用所述NO电介质膜不能得到适宜于防止软差错的发生和恢复时间的缩短的充分大的容量。因此,正在研究使用具有介电常数25~27的Ta2O5薄膜来代替具有介电常数4~5的NO结构的氮化膜作为电介质膜。特别是由于NO结构的氮化膜难以确保256M以上的下一代存储元件所必要的充分大的容量,所以对所述Ta2O5薄膜的研究进行得更加活跃。
但是,由于所述Ta2O5薄膜使电容器的漏电流和介电特性劣化,所以,难以使用。
具体地说,因为所述Ta2O5薄膜具有不稳定的化学计量,所以Ta和O的组成比差就使膜内局部存在氧空位状态的置换型Ta原子。可是,因为所述氧空位是电容器漏电流的原因,所以,所述Ta2O5薄膜难以用作电介质膜。而且,Ta2O5的前体即钽的乙醇化物(Ta(OC2H5)5)有机物与O2或N2O气体反应会使所述Ta2O5薄膜的膜内存在作为杂质的碳原子和CH4、C2H4之类的碳化物和水(H2O)。可是,所述杂质是使电容器的介质特性劣化的主要原因,所以,很难把所述Ta2O5薄膜用作电介质膜。另外,所述Ta2O5薄膜为了除掉膜内存在的氧空位和杂质,因为在其蒸镀后应经过二次或三次低温退火,所以,在把所述Ta2O5薄膜用作电介质膜的情况下,作为整体的电容器制造工序就复杂。而且,在进行所述低温退火期间,在电容器的下部电极与Ta2O5薄膜的界面上引起氧化反应会使电容器的电特性更加劣化。
因此,为了在得到高的容量同时确保所希望的漏电流和介电特性,提出了使用TaON薄膜作为电介质膜的材料,而且正在进行与此相关的研究。与Ta2O5薄膜一样,所述TaON薄膜是由Ta(OC2H5)5有机物与氧气反应而形成,所以,膜内也会存在碳原子、碳化物和水之类的杂质。因此,为了除掉内部存在的杂质,蒸镀之后,而必须对所述TaON薄膜进行N2O或O2气氛内的退火处理。
另一方面,根据图4A和图4B对按照现有技术的电容器的电介质膜内存在的元素的浓度说明如下。
如图4A和图4B所示,就已有的电容器,如把形成非晶质TaON薄膜时和蒸镀非晶质TaON薄膜之后与实施N2O炉退火时的所述TaON薄膜内存在的Ta、O、N、C、Si等元素间的浓度进行比较,则可看出,由于N2O炉退火通过使TaON薄膜内的氮(N)的损失比非晶质TaON薄膜蒸镀时的大。
也就是说,非晶质TaON薄膜的膜内存在因Ta和O组成比之差引起的置换型Ta原丝。因此,电介质膜蒸镀时,TaON的前体即有机物Ta(OC2H5)5与N2O气体的反应会生成作为杂质的碳原丝、碳化物(C、CH4、C2H4等)和水等,所以,大大减少TaON薄膜内的氮成分,从而增大电容器的漏电流,并使其介电特性大大劣化。
因此,在对TaON薄膜进行N2O或O2气氛内的退火处理时,把包含在膜内的氮成分置换为活性氧成分并除去,所以,导致所述TaON薄膜的介电常数的损失。因此,用这样的TaON薄膜变成了对得到高容量的电容器的限制。
因此,本发明的目的是提供能够改善用作电介质膜的TaON薄膜的漏电流和介电特性的半导体器件的电容器制造方法。
为实现上述目的,按照本发明的半导体器件的电容器制造方法包含如下步骤:形成规定的下部图形,提供用层间绝缘膜覆盖的半导体衬底;在所述层间绝缘膜上形成电容器下部电极;为了形成TaON薄膜作为电介质膜,而在所述下部电极上蒸镀非晶质状态的TaON薄膜,在真空状态下对非晶质TaON薄膜进行退火;在由所述TaON薄膜构成的电介质膜上形成电容器上部电极。
图1A至图1D是用来说明使用TaON薄膜作为按照本发明的实施例的电介质膜的电容器的制造方法的断面图。
图2是表示按照本发明的其他实施例制造的MIS结构的电容器的断面图。
图3是表示按照本发明的其他实施例制造的电容器的断面图。
图4A和图4B是现有技术的电容器中形成非晶质TaON薄膜时和蒸镀非晶质TaON薄膜之后实施N2O炉退火时,存在所述TaON薄膜内的元素的浓度的曲线图。
图5是按照本发明的电容器制造时TaON薄膜蒸镀之后实施N2气氛下的真空退火时,存在于所述TaON薄膜内的元素的浓度的曲线图。
以下根据图1A至图1D来说明按照本发明的实施例的高容量TaON电容器制造方法。
首先,如图1A所示,提供形成象晶体管那样的下部图形(未示出)的半导体衬底1。为了覆盖所述下部图形,在所述衬底1上蒸镀例如USG(非掺杂硅酸盐玻璃)膜、BPSG(磷硼硅酸盐玻璃)膜、SiON膜等膜之后,将其表面进行平坦化,由此能够形成所述层间绝缘膜2。为了露出所述衬底1的规定区域,最好是露出源极区域,而可以把连接孔形成在层间绝缘膜2上。在LP(低压)-CVD室内,在所述层间绝缘膜2上蒸镀掺杂的多晶硅层,其厚度能够完全埋住所述连接孔,然后,形成图形,由此能够形成堆积结构的电容器下部电极3。
如图所示,所述下部电极3形成为堆积结构,也可以形成圆柱、销钉结构之类的三维结构。所述下部电极3可以形成具有半球(半球纹理:HSG)形状的表面。
如图1B所示,在下部电极3上蒸镀非晶质TaON薄膜4。定量供给到维持于300~600℃最好是300~400℃温度以及约100乇以下最好50~100乇压力的LPCVD室内的Ta蒸汽与反应气体即NH3气体(5~500sccm,最好是100~200sccm)在所述下部电极3的表面上进行化学反应来蒸镀所述非晶质TaON薄膜4。对非晶质TaON薄膜的厚度没有特别限制,但是,50~150,最好为40~80。所述Ta蒸汽按照如下方法来得到,即:用MFC(质量流量控制器)等流量调节器把约99.999%以上的Ta(OC2H5)5溶液以约300mg/min以下最好是200~300mg/min的流速定量供给到维持在约150℃以上最好是150~200℃的蒸发器内进行蒸发。这时,为了防止所述Ta蒸汽凝结,无论是注入孔或喷嘴等蒸发器还是构成Ta蒸汽通路的供给管最好维持在150~200℃的温度下。
在蒸镀所述非晶质TaON薄膜4之前,可以对所述电容器下部电极3进行清洗处理。所述清洗处理是为了除掉电容器下部电极3的表面上生成的自然氧化膜和粒子而进行的,可以通过采用HF蒸气的干式清洗、采用HF溶液的湿式清洗等来进行。
在蒸镀所述非晶质TaON薄膜4之前,可以对所述电容器下部电极3进行氮化处理,所述氮化处理是为了防止在进行后续的热工序期间因在所述下部电极3与TaON薄膜的界面上形成Si2O界面氧化膜而引起的降低TaON薄膜的性能且增大漏电流而进行的处理,由在NH3气氛中1~5分钟的现场等离子体处理等来进行。
如图1C所示,采用在N2或NH3气氛中的真空状态下炉热工序或快速热工序(RTP)对所述非晶质TaON薄膜进行退火,由此能够作为电介质膜得到结晶的TaON薄膜4a。这里,使用炉的退火是在100乇以下的压力最好是在1~10乇的压力下、600~800℃最好是700~800℃的温度下进行,使用快速热处理的退火是在700~800乇最好是700~750乇的压力下、750~950℃最好是750~800℃的温度下进行。这时,通过对非晶质TaON薄膜在不存在活性氧的真空状态下进行退火,就使所述非晶质TaON薄膜4a在存在氯原子的状态下边维持Ta-O-N构造的结合,边进行结晶。因此,经按照本发明的真空状态的退火的TaON薄膜4a能表现出氮原子含量维持在15%~30%的高介电常数的膜特性。而且,按照本发明的TaON薄膜4a作为真空状态的退火的结果,除去了存在非晶质TaON薄膜内的氧空位状态的置换型Ta原子,由此改善了漏电流特性。
其次,对在所述真空状态下进行退火后的TaON薄膜4a的表面进一步进行退火,能够在所述TaON薄膜4a的表面形成氧化膜5。对氧化膜5的厚度没有特别限定,但是其厚度为20~50,最好是20~30。对于TaON薄膜4a的后续退火是为改善电容器的漏电流特性和击穿电压而进行的,可以用等离子体、快速热处理工序等在O2或N2O气氛中或者在UV-O3或O3气氛中来进行。使用所述等离子体的退火是在700~800乇最好是700~750乇的压力下、400~600℃最好是400~500℃的温度下进行,使用快速热处理的退火是在700~800乇最好是700~750乇的压力下、750~950℃最好是750~800℃的温度下进行。所述UV-O3是在UV灯开启(ON)的状态下注入O3。
如图1D所示,在氧化层上蒸镀500~2000厚的掺杂多晶硅层之后,通过制成图形来形成电容器上部电极6,结果,能够得到具有TaON薄膜作为电介质膜的SIS(硅-绝缘层-硅)结构的TaON电容器。
所述电容器上部电极6也可以由掺杂的多晶硅层构成,或者由从TiN、TaN、W、WSi、Ru、RuO2、Ir、IrO2和Pt中选择的一种金属层来形成。这种情况下,如图2所示,TaON电容器作为一个整体具有MIS(金属-绝缘层-硅)结构,也可以在由所述金属层构成的上部电极7上形成掺杂的多晶硅层作为缓冲层8。在所述上部电极7由所述金属层构成情况下,其厚度为200~800。作为所述缓冲层8的掺杂的多晶硅层的厚度为500~2000。
另一方面,虽然所述下部电极3最好由掺杂的多晶硅层形成,但是与上部电极一样,也可以从TiN、TaN、W、WSi、Ru、RuO2、Ir、IrO2和Pt中选择的一种金属层形成。这种情况下,所述TaON电容器作为一个整体具有MIM(金属-绝缘层-金属)结构,特别是使用金属层作为下部电极的材料的情况下,也可以省去对于下部电极的退火和氮化处理。
图3是具有按照本发明另外的实施例制造的高电介质TaON薄膜的半导体装置的电容器结构的断面图。在该实施例中,下部电极30形成为表面生长多晶硅为半球形凹凸结构的HSG(半球形纹理)形状,然后,在这样的下部电极30上按照与上述的实施例相同的工序形成TaON电介质薄膜32,由此来制造出高容量的电容器。
图5是表示按照本发明的电容器制造时TaON薄膜蒸镀之后实施N2气氛下的真空退火时,存在所述TaON薄膜内的元素的浓度的曲线图。如图所示,按照本发明的电容器制造方法,在蒸镀非晶质TaON薄膜之后,在NH3或N2气氛的真空状态下对所述TaON薄膜进行退火的情况下,在存在TaON薄膜内的Ta、O、N、C、Si等元素中,氮(N)的含量仍然原封不动地保持(约15%~30%)。
因此,按照本发明的电容器制造方法与在N2O或O2气氛下用炉热处理工序或快速热处理工序对非晶质TaON薄膜进行退火的已有方法相比较,能够得到具有高介电常数(ε>40)的TaON薄膜。
此外,在不脱离本发明之宗旨的范围内,能够以多种变更实施本发明。
如上述之说明,因为本发明的电容器制造方法使用具有25~27的高介电常数的TaON薄膜作为电介质膜,所以能够实现高容量。特别是即使使用单纯的堆积结构也容易确保所希望的容量,所以能够使制造工序简单。而且,由于所述TaON薄膜经真空退火而防止了膜内的氮元素的损失,因此,能够制造出具有良好漏电流和介电特性的TaON电容器。
因此,按照本发明的TaON电容器能够确保高容量和稳定的漏电流和介电特性,从而能够十分有效地适用于256M以上的下一代器件的制造。
Claims (16)
1.一种半导体器件的电容器制造方法,其特征在于,包含如下步骤:
形成规定的下部图形,提供用层间绝缘膜覆盖的半导体衬底;
在所述层间绝缘膜上形成电容器下部电极;
为了形成TaON薄膜作为电介质膜,而在所述下部电极上蒸镀非晶质状态的TaON薄膜,在真空状态下对非晶质TaON薄膜进行退火;
在由所述TaON薄膜构成的电介质膜上形成电容器上部电极。
2.根据权利要求1的半导体器件的电容器制造方法,其特征在于:所述电容器下部电极由掺杂的多晶硅层形成。
3.根据权利要求1的半导体器件的电容器制造方法,其特征在于:所述电容器下部电极由从TiN、TaN、W、WSi、Ru、RuO2、Ir、IrO2和Pt中选择的一种金属层形成。
4.根据权利要求2的半导体器件的电容器制造方法,其特征在于,在形成所述电容器下部电极的步骤后,还包含对所述电容器下部电极进行清洗的步骤。
5.根据权利要求4的半导体器件的电容器制造方法,其特征在于:所述清洗是以使用HF蒸气的干式方式或使用HF溶液的湿式方式进行。
6.根据权利要求1的半导体器件的电容器制造方法,其特征在于:形成所述电容器下部电极的步骤后,还包含对所述电容器下部电极的表面进行氮化处理的步骤。
7.根据权利要求6的半导体器件的电容器制造方法,其特征在于:所述氮化处理是在NH3气氛中进行1~5分钟现场等离子体处理。
8.根据权利要求1的半导体器件的电容器制造方法,其特征在于:所述非晶质TaON薄膜的蒸镀是定量供给到维持于300~600℃的温度以及100乇以下压力的LPCVD室内的Ta化合物蒸气气体与反应气体即NH3气体或O2气体在所述下部电极的表面反应来进行。
9.根据权利要求8的半导体器件的电容器制造方法,其特征在于:所述Ta化合物蒸气气体是把Ta(OC2H5)5溶液定量供给到维持在150~200℃的蒸发器内后进行蒸发而得到,并通过维持在150℃以上的温度的供给管注入的。
10.根据权利要求1的半导体器件的电容器制造方法,其特征在于:对所述非晶质TaON薄膜的退火是在N2或NH3气氛的真空状态用炉热工序或快速热工序(RTP)在600~950℃的温度下进行。
11.根据权利要求1的半导体器件的电容器制造方法,其特征在于:对所述非晶质TaON薄膜的真空状态的退火步骤后,还包含附加的退火。
12.根据权利要求11的半导体器件的电容器制造方法,其特征在于:所述附加的退火是用等离子体或快速热工序在600~950℃的温度下O2或N2O气氛或UV-O3或O3气氛中进行。
13.根据权利要求1的半导体器件的电容器制造方法,其特征在于:所述电容器上部电极由掺杂的多晶硅层形成。
14.根据权利要求1的半导体器件的电容器制造方法,其特征在于:所述电容器上部电极由从TiN、TaN、W、WSi、Ru、RuO2、Ir、IrO2和Pt中选择的一种金属层形成。
15.根据权利要求1的半导体器件的电容器制造方法,其特征在于:所述电容器上部电极形成为金属层和缓冲层的层叠结构。
16.根据权利要求15的半导体器件的电容器制造方法,其特征在于:所述金属层是从TiN、TaN、W、WSi、Ru、RuO2、Ir、IrO2和Pt中选择的一种金属层,所述缓冲层是掺杂的多晶硅层。
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KR100587047B1 (ko) * | 2000-06-01 | 2006-06-07 | 주식회사 하이닉스반도체 | 반도체 메모리 소자의 캐패시터 제조방법 |
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US6803306B2 (en) * | 2001-01-04 | 2004-10-12 | Broadcom Corporation | High density metal capacitor using via etch stopping layer as field dielectric in dual-damascence interconnect process |
US6818500B2 (en) * | 2002-05-03 | 2004-11-16 | Micron Technology, Inc. | Method of making a memory cell capacitor with Ta2O5 dielectric |
KR20040008527A (ko) * | 2002-07-18 | 2004-01-31 | 주식회사 하이닉스반도체 | 반도체 소자의 제조방법 |
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US7208095B2 (en) * | 2004-12-15 | 2007-04-24 | Infineon Technologies Ag | Method for fabricating bottom electrodes of stacked capacitor memory cells and method for cleaning and drying a semiconductor wafer |
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JP2786071B2 (ja) * | 1993-02-17 | 1998-08-13 | 日本電気株式会社 | 半導体装置の製造方法 |
JP3334323B2 (ja) * | 1994-03-17 | 2002-10-15 | ソニー株式会社 | 高誘電体膜の形成方法 |
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US6087261A (en) * | 1997-09-30 | 2000-07-11 | Fujitsu Limited | Method for production of semiconductor device |
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JPH11233723A (ja) * | 1998-02-13 | 1999-08-27 | Sony Corp | 電子素子およびその製造方法ならびに誘電体キャパシタおよびその製造方法ならびに光学素子およびその製造方法 |
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