CN1286145C - 利用硒化反应的衬底键合 - Google Patents

利用硒化反应的衬底键合 Download PDF

Info

Publication number
CN1286145C
CN1286145C CNB021032106A CN02103210A CN1286145C CN 1286145 C CN1286145 C CN 1286145C CN B021032106 A CNB021032106 A CN B021032106A CN 02103210 A CN02103210 A CN 02103210A CN 1286145 C CN1286145 C CN 1286145C
Authority
CN
China
Prior art keywords
substrate
active
bonding
base substrate
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB021032106A
Other languages
English (en)
Chinese (zh)
Other versions
CN1379436A (zh
Inventor
H·李
C·C·杨
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of CN1379436A publication Critical patent/CN1379436A/zh
Application granted granted Critical
Publication of CN1286145C publication Critical patent/CN1286145C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Micromachines (AREA)
  • Recrystallisation Techniques (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Photovoltaic Devices (AREA)
  • Element Separation (AREA)
CNB021032106A 2001-03-30 2002-01-30 利用硒化反应的衬底键合 Expired - Fee Related CN1286145C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/823,550 US6537846B2 (en) 2001-03-30 2001-03-30 Substrate bonding using a selenidation reaction
US09/823550 2001-03-30

Publications (2)

Publication Number Publication Date
CN1379436A CN1379436A (zh) 2002-11-13
CN1286145C true CN1286145C (zh) 2006-11-22

Family

ID=25239072

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB021032106A Expired - Fee Related CN1286145C (zh) 2001-03-30 2002-01-30 利用硒化反应的衬底键合

Country Status (5)

Country Link
US (1) US6537846B2 (enExample)
EP (1) EP1246238B1 (enExample)
JP (1) JP4198375B2 (enExample)
CN (1) CN1286145C (enExample)
DE (1) DE60220736T2 (enExample)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6362075B1 (en) * 1999-06-30 2002-03-26 Harris Corporation Method for making a diffused back-side layer on a bonded-wafer with a thick bond oxide
JP2002305293A (ja) * 2001-04-06 2002-10-18 Canon Inc 半導体部材の製造方法及び半導体装置の製造方法
US6960490B2 (en) * 2002-03-14 2005-11-01 Epitactix Pty Ltd. Method and resulting structure for manufacturing semiconductor substrates
US7192841B2 (en) * 2002-04-30 2007-03-20 Agency For Science, Technology And Research Method of wafer/substrate bonding
CA2467164A1 (en) * 2003-05-13 2004-11-13 Becton, Dickinson & Company Method and apparatus for purifying and desalting biological samples
US7176106B2 (en) * 2003-06-13 2007-02-13 Avago Technologies Fiber Ip (Singapore) Pte. Ltd. Wafer bonding using reactive foils for massively parallel micro-electromechanical systems packaging
US7407863B2 (en) * 2003-10-07 2008-08-05 Board Of Trustees Of The University Of Illinois Adhesive bonding with low temperature grown amorphous or polycrystalline compound semiconductors
US7026189B2 (en) 2004-02-11 2006-04-11 Hewlett-Packard Development Company, L.P. Wafer packaging and singulation method
US7422962B2 (en) * 2004-10-27 2008-09-09 Hewlett-Packard Development Company, L.P. Method of singulating electronic devices
FR2888402B1 (fr) * 2005-07-06 2007-12-21 Commissariat Energie Atomique Procede d'assemblage de substrats par depot d'une couche mince de collage d'oxyde ou de nitrure et structure ainsi assemblee
KR100829562B1 (ko) 2006-08-25 2008-05-14 삼성전자주식회사 기판 접합 구조를 갖는 반도체 레이저 다이오드 및 그제조방법
US20100109115A1 (en) * 2008-11-03 2010-05-06 Ure Michael J Virtual IC wafers and bonding of constitutent IC films
US8748288B2 (en) 2010-02-05 2014-06-10 International Business Machines Corporation Bonded structure with enhanced adhesion strength
EP2372755B1 (de) * 2010-03-31 2013-03-20 EV Group E. Thallner GmbH Verfahren zum permanenten Verbinden zweier Metalloberflächen
US9117948B1 (en) 2012-02-02 2015-08-25 The United States Of America As Represented By The Adminstrator Of National Aeronautics And Space Administration Selenium interlayer for high-efficiency multijunction solar cell
US10736212B2 (en) 2016-05-20 2020-08-04 Ares Materials Inc. Substrates for stretchable electronics and method of manufacture
US10615191B2 (en) 2016-05-20 2020-04-07 Ares Materials Inc. Polymer substrate for flexible electronics microfabrication and methods of use
US10679899B2 (en) * 2016-08-09 2020-06-09 King Abdullah University Of Science And Technology Semiconductor device including monolithically integrated PMOS and NMOS transistors
CN107742606B (zh) * 2017-10-30 2024-04-02 桂林电子科技大学 一种键合晶圆的结构及其制备方法
CN110534644B (zh) * 2019-08-30 2021-01-15 华中科技大学 一种双向生长的超晶格相变单元的制备方法及相变存储器

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61182217A (ja) * 1985-02-08 1986-08-14 Toshiba Corp ウエハ接着方法
JPH0472608A (ja) * 1990-05-18 1992-03-06 Toshiba Corp 化合物半導体ウェハの製造方法および製造装置
JP2990036B2 (ja) 1995-02-13 1999-12-13 ティーディーケイ株式会社 光記録媒体およびその製造方法
JPH08316145A (ja) * 1995-05-12 1996-11-29 Fuji Electric Co Ltd 半導体薄膜の成膜方法
US5730852A (en) 1995-09-25 1998-03-24 Davis, Joseph & Negley Preparation of cuxinygazsen (X=0-2, Y=0-2, Z=0-2, N=0-3) precursor films by electrodeposition for fabricating high efficiency solar cells
JP2737748B2 (ja) * 1996-06-21 1998-04-08 日本電気株式会社 化合物半導体の接合方法
FR2751467B1 (fr) * 1996-07-17 1998-10-02 Commissariat Energie Atomique Procede d'assemblage de deux structures et dispositif obtenu par le procede. applications aux microlasers
JP3249408B2 (ja) 1996-10-25 2002-01-21 昭和シェル石油株式会社 薄膜太陽電池の薄膜光吸収層の製造方法及び製造装置
US6036772A (en) 1996-12-30 2000-03-14 Sony Corporation Method for making semiconductor device
US6258620B1 (en) * 1997-10-15 2001-07-10 University Of South Florida Method of manufacturing CIGS photovoltaic devices
US6323417B1 (en) * 1998-09-29 2001-11-27 Lockheed Martin Corporation Method of making I-III-VI semiconductor materials for use in photovoltaic cells
JP2000349266A (ja) * 1999-03-26 2000-12-15 Canon Inc 半導体部材の製造方法、半導体基体の利用方法、半導体部材の製造システム、半導体部材の生産管理方法及び堆積膜形成装置の利用方法
JP4465745B2 (ja) * 1999-07-23 2010-05-19 ソニー株式会社 半導体積層基板，半導体結晶基板および半導体素子ならびにそれらの製造方法

Also Published As

Publication number Publication date
EP1246238B1 (en) 2007-06-20
US20030017679A1 (en) 2003-01-23
JP2003017375A (ja) 2003-01-17
CN1379436A (zh) 2002-11-13
JP4198375B2 (ja) 2008-12-17
US6537846B2 (en) 2003-03-25
EP1246238A3 (en) 2003-11-26
DE60220736D1 (de) 2007-08-02
DE60220736T2 (de) 2008-03-13
EP1246238A2 (en) 2002-10-02

Similar Documents

Publication Publication Date Title
CN1286145C (zh) 利用硒化反应的衬底键合
TWI867594B (zh) 用於簡化的輔具晶圓的dbi至矽接合
CN106457758B (zh) 装置改性的基材制品及其制备方法
CN107034028B (zh) 用于除去有机硅树脂的组合物、使用其薄化基材和制造半导体封装体的方法及使用其的系统
CN1131554C (zh) 小片接合设备
CN104022016B (zh) 薄晶片处理的多粘合层
US8377798B2 (en) Method and structure for wafer to wafer bonding in semiconductor packaging
US10121762B2 (en) Wafer bonding structure and wafer bonding method
EP1720204A1 (en) Transient liquid phase eutectic bonding
US8563400B2 (en) Laser bonding for stacking semiconductor substrates
CN1436369A (zh) 制备衬底的方法以及使用该方法获得的衬底
KR20160070179A (ko) 캐리어 결합 방법, 및 반도체 및 인터포저 가공을 위한 물품
JP2005516393A5 (enExample)
JP2004260170A (ja) 結晶シリコンダイアレイ、および、基板への結晶シリコン薄膜のアセンブル方法
TW201001503A (en) Wafer structures and wafer bonding methods
US10074567B2 (en) Method and system for vertical integration of elemental and compound semiconductors
US9418961B2 (en) Apparatus and method of substrate to substrate bonding for three dimensional (3D) IC interconnects
TW201205688A (en) Temporary semiconductor structure bonding methods and related bonded semiconductor structures
CN113113306A (zh) 一种利用耐高温托盘进行化合物半导体晶圆高温回火工艺
KR20070000953A (ko) 열방출이 개선된 전면발광형 발광다이오드 소자 및 이의제조방법
CN1716601A (zh) 半导体器件和半导体晶片及其制造方法
US20190006221A1 (en) Method for producing an interface intended to assemble temporarily a microelectronic support and a manipulation handle, and temporary assembly interface
HK1048889A1 (zh) 部件及其制造方法
CN1801485A (zh) 包含具有优异粘着强度的多层薄膜的装置及其制造方法
JP2004320050A (ja) Ｓｏｉ基板及びその製造方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20061122

Termination date: 20110130