CN1223089C - 负载电容补偿缓冲器,其设备及方法 - Google Patents

负载电容补偿缓冲器,其设备及方法 Download PDF

Info

Publication number
CN1223089C
CN1223089C CNB018082157A CN01808215A CN1223089C CN 1223089 C CN1223089 C CN 1223089C CN B018082157 A CNB018082157 A CN B018082157A CN 01808215 A CN01808215 A CN 01808215A CN 1223089 C CN1223089 C CN 1223089C
Authority
CN
China
Prior art keywords
driver
signal
voltage
output signal
auxilliary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CNB018082157A
Other languages
English (en)
Chinese (zh)
Other versions
CN1425220A (zh
Inventor
杰弗里·B·霍尔
佩德罗·奥瓦勒
德聪·T·特兰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of CN1425220A publication Critical patent/CN1425220A/zh
Application granted granted Critical
Publication of CN1223089C publication Critical patent/CN1223089C/zh
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00346Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16Modifications for eliminating interference voltages or currents
    • H03K17/161Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/165Modifications for eliminating interference voltages or currents in field-effect transistor switches by feedback from the output circuit to the control circuit
    • H03K17/166Soft switching
    • H03K17/167Soft switching using parallel switching arrangements
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00369Modifications for compensating variations of temperature, supply voltage or other physical parameters
    • H03K19/00384Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Amplifiers (AREA)
CNB018082157A 2000-03-20 2001-03-02 负载电容补偿缓冲器,其设备及方法 Expired - Lifetime CN1223089C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/528,857 2000-03-20
US09/528,857 US6313664B1 (en) 2000-03-20 2000-03-20 Load capacitance compensated buffer, apparatus and method thereof

Publications (2)

Publication Number Publication Date
CN1425220A CN1425220A (zh) 2003-06-18
CN1223089C true CN1223089C (zh) 2005-10-12

Family

ID=24107476

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB018082157A Expired - Lifetime CN1223089C (zh) 2000-03-20 2001-03-02 负载电容补偿缓冲器,其设备及方法

Country Status (7)

Country Link
US (1) US6313664B1 (enExample)
JP (1) JP4903340B2 (enExample)
KR (1) KR100714668B1 (enExample)
CN (1) CN1223089C (enExample)
AU (1) AU2001247259A1 (enExample)
TW (1) TW523988B (enExample)
WO (1) WO2001071915A2 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003337640A (ja) * 2002-05-21 2003-11-28 Mitsubishi Electric Corp バス制御装置
US6842058B2 (en) * 2002-11-12 2005-01-11 Lsi Logic Corporation Method and apparatus for slew control of an output signal
KR100510515B1 (ko) 2003-01-17 2005-08-26 삼성전자주식회사 공정의 변화에 따라서 클럭신호의 듀티 사이클을 보정하는듀티 사이클 보정회로를 구비하는 반도체 장치
DE10355509A1 (de) * 2003-11-27 2005-07-07 Infineon Technologies Ag Schaltung und Verfahren zum verzögerten Einschalten einer elektrischen Last
JP5239976B2 (ja) * 2009-03-19 2013-07-17 富士通セミコンダクター株式会社 入力回路および半導体集積回路
WO2013017913A1 (en) * 2011-08-01 2013-02-07 Freescale Semiconductor, Inc. Signalling circuit, processing device and safety critical system
TW201535975A (zh) 2014-03-10 2015-09-16 Chunghwa Picture Tubes Ltd 閘極驅動電路
US9584104B2 (en) 2014-03-15 2017-02-28 Nxp Usa, Inc. Semiconductor device and method of operating a semiconductor device
US9202584B1 (en) 2014-05-08 2015-12-01 Freescale Semiconductor, Inc. Power supply slew rate detector
JP6195393B1 (ja) * 2016-03-23 2017-09-13 ウィンボンド エレクトロニクス コーポレーション 出力回路
KR102598741B1 (ko) * 2018-07-17 2023-11-07 에스케이하이닉스 주식회사 데이터 출력 버퍼

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58121610A (ja) * 1982-10-05 1983-07-20 Taamo:Kk 係合具
US4567378A (en) * 1984-06-13 1986-01-28 International Business Machines Corporation Driver circuit for controlling signal rise and fall in field effect transistor processors
JPH04154314A (ja) * 1990-10-18 1992-05-27 Nec Ic Microcomput Syst Ltd 出力回路
JPH04274615A (ja) * 1991-02-28 1992-09-30 Nec Corp 出力バッファ回路
JP3251661B2 (ja) 1991-10-15 2002-01-28 テキサス インスツルメンツ インコーポレイテツド 制御されたスルー・レートを有するcmosバッファ回路
JPH05327443A (ja) * 1992-05-15 1993-12-10 Nec Corp バッファ回路
US5619247A (en) * 1995-02-24 1997-04-08 Smart Vcr Limited Partnership Stored program pay-per-play
US5598119A (en) * 1995-04-05 1997-01-28 Hewlett-Packard Company Method and apparatus for a load adaptive pad driver
US5739715A (en) * 1995-10-31 1998-04-14 Hewlett-Packard Co. Digital signal driver circuit having a high slew rate
US5986489A (en) * 1996-04-03 1999-11-16 Cypress Semiconductor Corp. Slew rate control circuit for an integrated circuit
JP3339311B2 (ja) * 1996-07-16 2002-10-28 富士電機株式会社 自己消弧形半導体素子の駆動回路
KR100226491B1 (ko) * 1996-12-28 1999-10-15 김영환 반도체 메모리에서 비트라인 감지 증폭기의 풀업/풀다운 전압제 공을 위한 디바이스 및 그 구성 방법
US6184703B1 (en) * 1997-06-06 2001-02-06 Altera Corporation Method and circuit for reducing output ground and power bounce noise
US6118324A (en) * 1997-06-30 2000-09-12 Xilinx, Inc. Output driver with reduced ground bounce
US5949259A (en) * 1997-11-19 1999-09-07 Atmel Corporation Zero-delay slew-rate controlled output buffer
US6181156B1 (en) * 1999-03-31 2001-01-30 International Business Machines Corporation Noise suppression circuits for suppressing noises above and below reference voltages
FR2945413B1 (fr) * 2009-05-15 2011-05-06 Aplix Sa Element d'accrochage pour former la partie male d'un auto-agrippant
JP5949259B2 (ja) * 2012-05-25 2016-07-06 三菱電機株式会社 液晶表示装置
JP5986489B2 (ja) * 2012-11-21 2016-09-06 株式会社ハーマン グリル

Also Published As

Publication number Publication date
CN1425220A (zh) 2003-06-18
US6313664B1 (en) 2001-11-06
WO2001071915A3 (en) 2002-02-14
JP4903340B2 (ja) 2012-03-28
KR20030014370A (ko) 2003-02-17
JP2003528525A (ja) 2003-09-24
TW523988B (en) 2003-03-11
AU2001247259A1 (en) 2001-10-03
WO2001071915A2 (en) 2001-09-27
KR100714668B1 (ko) 2007-05-07

Similar Documents

Publication Publication Date Title
JP3709006B2 (ja) 駆動装置及び出力パッド駆動装置
US6008665A (en) Termination circuits and methods therefor
JP2572500B2 (ja) ドライバ回路、低ノイズドライバ回路及び低ノイズ低電圧スイングドライバ・レシーバ回路
US6051995A (en) Constant impedance, low noise CMOS buffer
EP0329285B1 (en) Output buffer
US20030058005A1 (en) Low-power output controlled circuit
CN1223089C (zh) 负载电容补偿缓冲器,其设备及方法
US7683672B2 (en) Dynamically controlled output slew rate pad driver
US20020113634A1 (en) Cmos output driver with slew rate control
JPH10173500A (ja) Mosゲートパワートランジスタのdi/dtおよびdv/dtの切替制御方法
JPH06224719A (ja) 出力レベル制御式の出力バッファ
US6331787B1 (en) Termination circuits and methods therefor
US7656201B2 (en) Output buffer circuit
JP2724331B2 (ja) Ttl出力ドライバゲート構成
US5442304A (en) CMOS logic gate clamping circuit
CN1213223A (zh) 输出缓冲电路
US7768311B2 (en) Suppressing ringing in high speed CMOS output buffers driving transmission line load
US6323675B1 (en) Termination circuits and methods therefor
US6329837B1 (en) Termination circuits and methods therefor
US6847235B2 (en) Bus driver
US6331786B1 (en) Termination circuits and methods therefor
US6323676B1 (en) Termination circuits and methods therefor
JP3883760B2 (ja) 高速、低ノイズ出力バッファ
CN1118936C (zh) 高速低噪声的输出缓冲器
KR960013857B1 (ko) 데이타 출력버퍼

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
TR01 Transfer of patent right

Effective date of registration: 20180918

Address after: texas

Patentee after: Fisical Semiconductor Inc.

Address before: Illinois Instrunment

Patentee before: Motorola Inc.

TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20181016

Address after: American Texas

Patentee after: NXP America Co Ltd

Address before: texas

Patentee before: Fisical Semiconductor Inc.

TR01 Transfer of patent right
CX01 Expiry of patent term

Granted publication date: 20051012

CX01 Expiry of patent term