CN121002653A - 配线基板的制造方法、半导体装置的制造方法、配线基板及半导体装置 - Google Patents

配线基板的制造方法、半导体装置的制造方法、配线基板及半导体装置

Info

Publication number
CN121002653A
CN121002653A CN202380097456.1A CN202380097456A CN121002653A CN 121002653 A CN121002653 A CN 121002653A CN 202380097456 A CN202380097456 A CN 202380097456A CN 121002653 A CN121002653 A CN 121002653A
Authority
CN
China
Prior art keywords
wiring
electrode
dummy
insulating layer
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202380097456.1A
Other languages
English (en)
Chinese (zh)
Inventor
平野寿枝
乃万裕一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Resonac Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Resonac Corp filed Critical Resonac Corp
Publication of CN121002653A publication Critical patent/CN121002653A/zh
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers

Landscapes

  • Structure Of Printed Boards (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CN202380097456.1A 2023-07-13 2023-07-13 配线基板的制造方法、半导体装置的制造方法、配线基板及半导体装置 Pending CN121002653A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2023/025947 WO2025013298A1 (ja) 2023-07-13 2023-07-13 配線基板の製造方法、半導体装置の製造方法、配線基板、及び、半導体装置

Publications (1)

Publication Number Publication Date
CN121002653A true CN121002653A (zh) 2025-11-21

Family

ID=94214865

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202380097456.1A Pending CN121002653A (zh) 2023-07-13 2023-07-13 配线基板的制造方法、半导体装置的制造方法、配线基板及半导体装置

Country Status (4)

Country Link
JP (1) JPWO2025013298A1 (https=)
CN (1) CN121002653A (https=)
TW (1) TW202508392A (https=)
WO (1) WO2025013298A1 (https=)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008091385A (ja) * 2006-09-29 2008-04-17 Toppan Printing Co Ltd 多層回路配線板及び半導体装置
JP5007250B2 (ja) * 2008-02-14 2012-08-22 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP5503466B2 (ja) * 2010-08-31 2014-05-28 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2012191123A (ja) * 2011-03-14 2012-10-04 Renesas Electronics Corp 半導体集積回路装置およびその製造方法ならびにそれを用いた電子システム

Also Published As

Publication number Publication date
WO2025013298A1 (ja) 2025-01-16
TW202508392A (zh) 2025-02-16
JPWO2025013298A1 (https=) 2025-01-16

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