CN1195423A - 电子组件结构体 - Google Patents
电子组件结构体 Download PDFInfo
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- CN1195423A CN1195423A CN97190679A CN97190679A CN1195423A CN 1195423 A CN1195423 A CN 1195423A CN 97190679 A CN97190679 A CN 97190679A CN 97190679 A CN97190679 A CN 97190679A CN 1195423 A CN1195423 A CN 1195423A
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Abstract
一种电子组件结构体,要解决当使半导体元件(1)与带状载体(5)的内引线(6)接合时,多余合金层(9)流至半导体元件(1)的边缘与之接触而引起半导体元件(1)工作不良这一问题。将金属线顶端熔融形成的金属球接合在半导体元件(1)的电极(2)之上,在电极(2)上形成凸头(11),并在带状载体(5)内引线(6)表面形成镀层,使内引线(6)与凸头(11)位置对准,在此状态使镀层熔融,利用合金层(9)使半导体元件(1)与内引线(6)接合。该电子组件结构体在电极(2)上形成有多个凸头(11),增大了保持合金层(9)的力,阻止了合金层(9)的流动。
Description
技术领域
本发明涉及利用焊锡等的低熔点合金将半导体元件电极与带状载体的内引线相连接而成的电子组件结构体,尤其涉及使金属线顶端形成的金属球与半导体元件电极结合形成凸头后,再与带状载体的内引线连接而成的电子组件结构体。
背景技术
作为半导体元件电极与带状载体的内引线相连接而成的电子组件结构体,例如已有如图25-图29所示的电子组件结构体。即,如图25所示,通过电镀法在半导体元件1的电极2上形成有锡或焊锡等的凸头3。4是保护半导体元件1的有效面的钝化膜。
又如图26所示,带状载体5的各内引线6与上述各电极2上形成的凸头3呈相对状态地定位于凸头3之上。然后,如图27所示,用加热后的焊头7一下按压各内引线6的顶端部。其结果如图28所示,形成于各内引线6表面的锡或焊锡之类的镀层8发生熔融,凸头3与内引线6通过合金层9连接,形成电子组件结构体。
但是,如图25所示用电镀法能形成的凸头3的最大高度H为约20μm,很低,所以存在如下问题,即,当使所述镀层8熔融、通过合金层9使凸头3与内引线6相连接时,如图29所示,与熔融后的合金层9的量相比,内引线6与半导体元件1的间隙较小,导致多余的合金层9a与半导体元件1的边缘部接触,会引起半导体元件1的工作不良。
此外,为了形成高度比上述电镀法形成的凸头3高的凸头,除了电镀法之外,如图30-图34所示,还有一种使用金属线结合法形成凸头11的现有技术。即,在图30中,如(a)所示,将用金、铜、铝、焊锡等制成的金属线12插入并贯穿陶瓷或红宝石制成的毛细管13,在贯穿后的金属线12的顶端与被称为焊枪头的电极14之间进行放电,形成金属球15。
接着如(b)所示,将上述金属球15按压到经预热的半导体元件1的电极2之上,施加超声波振动,利用温度、压力及超声波振动的作用,使所述金属球15与半导体元件1的电极2结合。然后,如(c)所示,使毛细管13沿垂直方向上升,再如(d)所示,将金属线12拉断,形成金属球造成的凸头11。
如上所述,在半导体元件1的各电极2上如图31所示逐一形成凸头11之后,如图32所示,带状载体5的内引线6定位于上述凸头11之上与之呈相对状态,再如图33所示,用加热后的焊枪头7一下按压各内引线6的顶端部。各内引线6表面形成的锡或焊锡等的镀层8发生熔融,金属球造成的凸头11与内引线6通过合金层9相连接,形成电子组件结构体。
这样,如图31所示,用金属线结合法能形成的凸头11的最大高度H约为50μm,可形成比电镀法形成的图25的凸头3高的凸头。
但是,用金属线结合法形成的凸头11如图34所示,因为凸头11与合金层9的接触面积小,故保持熔融后的金属层9的力也小,仍然不能解决多余的合金层9a流到半导体元件1的边缘部与之接触,引起半导体元件1的工作不良的问题。
鉴于上述现有技术存在的问题,本发明的目的在于,提供一种能使半导体元件电极与带状载体的内引线高可靠地接合的电子组件结构体。
发明概述
本发明的电子组件结构体在半导体元件电极上形成有多个金属球造成的凸头,若采用本发明,能使半导体元件电极与带状载体的内引线高度可靠地接合。
本发明权利要求1所述的发明是一种电子组件结构体,当使半导体元件与带状载体的内引线接合时,将金属线顶端熔融形成的金属球接合在上述半导体元件电极之上,在所述半导体元件电极上形成凸头,并在所述内引线表面形成镀层后,使所述内引线与半导体元件的凸头位置对准,在此状态使所述镀层熔融,利用合金层使半导体元件与所述内引线接合,该种电子组件结构体在半导体元件电极上形成的所述金属球造成的凸头有多个。这样的话,当内引线与半导体元件电极相对置地定位之后,用加热后的焊头按压内引线顶端,使内引线表面形成的镀层熔融而利用合金层使凸头与内引线相连接时,与在半导体元件电极上形成有1个金属球凸头时相比较,凸头与合金层的接触面积增大,保持熔融后的合金层的力也增大,且多个凸头形成阻力,起着阻止熔融后的合金层流动的作用,所以,能防止合金层流到半导体元件的边缘部与边缘部接触,能以很高的可靠性使半导体元件电极与带状载体的内引线相连接。
本发明权利要求2所述的发明是一种电子组件结构体,当使半导体元件与带状载体的内引线接合时,将金属线顶端熔融形成的金属球接合在上述半导体元件电极之上,在所述半导体元件电极上形成凸头,并在所述内引线表面形成镀层后,使所述内引线与半导体元件的凸头位置对准,在此状态使所述镀层熔融,利用合金层使半导体元件与所述内引线接合,该种电子组件结构体在所述半导体元件电极上形成的所述金属球造成的所述凸头之上,再结合上在金属线顶端形成的金属球,拉断所述金属线使所述金属球留下呈与所述凸头接合的状态,在半导体元件电极之上形成至少2层以上的金属球造成的凸头。这样的话,当内引线与半导体元件电极相对置地定位之后,用加热后的焊头按压内引线顶端,使内引线表面形成的镀层熔融而利用合金层使凸头与内引线相连接时,与在半导体元件电极上形成由电镀法形成的凸头或在电极上形成有1个金属球凸头时相比较,因为内引线与半导体元件之间的间隙增大,故接合所需的合金层量也能增大,所以,能防止多余的合金层流到半导体元件的边缘部与边缘部接触,能以很高的可靠性使半导体元件电极与带状载体的内引线相连接。
本发明权利要求3所述的发明是一种电子组件结构体,其凸头是使穿过毛细管的金属线顶端熔融,在所述金属线顶端形成金属球,移动所述毛细管使所述金属球定位在半导体元件电极之上,使所述金属球与半导体元件电极接合,使所述毛细管上升,横向偏移后下降,使所述金属线再接合在已接合于半导体元件电极上的金属球之上后,再次使所述毛细管上升,拉断所述金属线使所述金属球留下呈与半导体元件电极接合的状态,从而在半导体元件电极上形成的由所述金属球造成的双层凸起状凸头。这样的话,因为在半导体元件电极上形成的多个凸头的高度是均匀的,当内引线与半导体元件电极相对置地定位之后,用加热后的焊头按压内引线顶端,使内引线表面形成的镀层熔融而利用合金层将凸头与内引线相连接时,内引线与各凸头均匀且可靠地接触,从而利用合金层能使各金属球造成的凸头与内引线可靠地相连接。并且,凸头与合金层的接触面积增大,保持熔融后的合金层的力增大,多个凸头形成阻力,起阻止熔融后的合金层流动的作用,所以,能防止合金层流到半导体元件的边缘部与边缘部接触,能以很高的可靠性使半导体元件电极与带状载体的内引线相连接。
本发明权利要求4所述的发明是一种电子组件结构体,其凸头是使穿过毛细管的金属线顶端熔融,在所述金属线顶端形成金属球,移动所述毛细管使所述金属球定位在半导体元件电极之上,使所述金属球与半导体元件电极接合,使所述毛细管上升,横向偏移后下降,使所述金属线接合在已接合于半导体元件电极上的金属球之上,再次使所述毛细管上升,拉断所述金属线,以使所述金属球留下呈与半导体元件电极接合的状态,在半导体元件电极上形成双层凸起状凸头,在该双层凸起状凸头之上再重叠另外的双层凸起状凸头,从而在电极之上形成至少2层以上的由金属球造成的双层凸起状凸头。这样的话,因为至少2层以上重叠的凸头的高度是均匀的,当内引线与半导体元件电极相对置地定位之后,用加热后的焊头按压内引线顶端,使内引线表面形成的镀层熔融而利用合金层将凸头与内引线相连接时,各内引线与半导体元件的各电极上的凸头均匀且可靠地接触,从而利用合金层能使各凸头与各内引线可靠地相连接。并且,因为内引线与半导体元件的间隙增大,故能增大接合所需的合金层的量,能防止多余的合金层流到半导体元件的边缘部与边缘部接触,能以很高的可靠性使半导体元件电极与带状载体的内引线相接合。
附图的简单说明
图1是本发明实施形态1中的电子组件结构体在半导体元件电极上形成有凸头的立体图。
图2是该实施形态1中的电子组件结构体在半导体元件电极上形成有凸头的主视图。
图3是该实施形态1中的电子组件结构体当半导体元件电极上形成的凸头与带状载体的内引线相接合时的状态图。
图4是该实施形态1中的电子组件结构体当半导体元件电极上所形成的凸头与带状载体的内引线相接合后状态的图。
图5是本发明实施形态2中的电子组件结构体在半导体元件电极上形成有2层凸头的立体图。
图6是该实施形态2中的电子组件结构体在半导体元件电极上形成有凸头的主视图。
图7是该实施形态2中的电子组件结构体当半导体元件电极上形成的凸头与带状载体的内引线相接合时的状态图。
图8是该实施形态2中的电子组件结构体当半导体元件电极上所形成的凸头与带状载体的内引线相接合后的状态图。
图9是该实施形态2中的电子组件结构体在半导体元件电极上形成有3层凸头的主视图。
图10是示出在半导体元件电极上所形成的多个拉断凸头高度差异的图。
图11是使半导体元件电极上形成的多个拉断凸头与带状载体的内引线相接合时的状态图。
图12是半导体元件电极上形成的多个拉断凸头与带状载体的内引线相接合后的状态图。
图13示出本发明实施形态3中的电子组件结构体在半导体元件电极上形成双层凸起状凸头的形成方法。
图14是该实施形态3中的电子组件结构体在半导体元件电极上形成有双层凸起状凸头的主视图。
图15是该实施形态3中的在电极上形成有多个双层凸起状凸头的主视图。
图16是该实施形态3中的电子组件结构体当半导体元件电极上形成的双层凸起状凸头与带状载体的内引线相接合时的状态图。
图17是该实施形态3中的电子组件结构体当半导体元件电极上形成的双层凸起状凸头与带状载体的内引线相接合后的状态图。
图18是示出在半导体元件电极上所形成的2层拉断凸头高度差异的图。
图19是半导体元件电极上形成的2层拉断凸头与带状载体的内引线相接合时的状态图。
图20是半导体元件电极上形成的2层拉断凸头与带状载体的内引线相接合后的状态图。
图21是示出本发明实施形态4中的电子组件结构体在半导体元件电极上形成有2层的双层凸起状凸头的主视图。
图22是该实施形态4中的电子组件结构体在半导体元件电极上形成有2层的双层凸起状凸头的主视图。
图23是该实施形态4中的电子组件结构体当半导体元件电极上形成的2层双层凸起状凸头与带状载体的内引线相接合时的状态图。
图24是该实施形态4中的电子组件结构体当半导体元件电极上形成的2层双层凸起状凸头与带状载体的内引线相接合后的状态图。
图25是示出传统的在半导体元件电极上用电镀法形成的凸头的主视图。
图26是传统的用电镀法形成的凸头的立体图。
图27是传统的用电镀法形成的凸头与带状载体的内引线接合时的状态图。
图28是传统的用电镀法形成的凸头与带状载体的内引线相接合后的状态图。
图29示出了传统的用电镀法形成的凸头与带状载体的内引线相接合时存在的问题。
图30是示出传统的由金属球造成凸头的形成方法的图。
图31是传统的在半导体元件电极上形成有金属球凸头的主视图。
图32是传统的在半导体元件电极上形成有金属球凸头的立体图。
图33是传统电子组件结构体当半导体元件电极上形成的凸头与带状载体的内引线相接合时的状态图。
图34是传统电子组件结构体当半导体元件电极上形成的凸头与带状载体的内引线相接合后的状态图。
实施本发明的最佳形态
以下利用图1至图24说明本发明的实施形态。
(实施形态1)
如图1和图2所示,在半导体元件1的有效面上形成有电极2和保护上述有效面的钝化膜4。在半导体元件1的电极2之上,形成有多个用金属线结合法形成的金属球所形成的凸头11。另外,因为上述金属线结合法在前面的现有技术说明中已利用图30的(a)-(d)进行了说明,故在此省略说明。
用金属线结合法在各电极2上形成多个凸头11之后,如图3所示,带状载体5的内引线6与凸头11相对置地定位于多个凸头11之上,用加热后的焊头7一下按压内引线6的顶端部,使内引线6表面形成的锡或焊锡等的镀层8发生熔融。其结果如图4所示,多个凸头11与内引线6经合金层9相连接,形成电子组件结构体。
这样,因为在半导体元件1的电极2上形成有多个金属球造成的凸头11,故与图34所示那样在各电极2上仅形成1个金属球造成的凸头11时相比较,凸头11与合金层9的接触面积增大,因而保持熔融后的合金层9的力增大。此外,多个凸头11成为阻力,起阻止熔融后的合金层9流动的作用,所以,能防止合金层9流到半导体元件1的边缘部与之接触,能以很高的可靠性使半导体元件电极与带状载体的内引线相接合。
(实施形态2)
如图5、图6所示,用金属线结合法在半导体元件1的电极2上形成金属球凸头11之后,再在该凸头11之上用金属线结合法形成凸头11,凸头11重叠成2层。即,将在金属线12顶端形成的金属球15再次定位在形成于电极2上的由金属球造成的第1层凸头11之上,利用热压着或兼用超声波的热压着使金属球15与第1层凸头11接合,再拉断金属线12,并使金属球15留下与第1层凸头11呈接合状态,在第1层凸头11之上就形成第2层凸头11。
然后如图7所示,带状载体5的内引线6与上述2层凸头11相对置地定位于凸头11之上,用加热后的焊头7一下按压内引线6的顶端部,使内引线6表面形成的锡或焊锡等的镀层8发生熔融。其结果如图8所示,2层的凸头11与内引线6经合金层9相连接,形成电子组件结构体。
用图25所示的电镀法形成凸头3时,其高度H最大约为20μm,另外,用图31所示的金属线结合法仅形成1个凸头11时,其高度约为50μm。与此相比较,本实施形态如图6所示用金属线结合法重叠2层的凸头11时,高度H约为100μm以上,故如图8所示,内引线6与半导体元件1的间隙增大,能增大接合所需的合金层9的量,能防止多余合金层接触半导体元件1的边缘,因而能以很高的可靠性使半导体元件1的电极2与带状载体5的内引线6相接合。
另外,重叠的凸头11并不限于2层,也可以如图9所示做成3层,或做成3层以上。
(实施形态3)
在上文所述的实施形态1中,当采用金属线结合法在电极2上设置多个凸头11(一般称为拉断凸头)时,由于如图30的(c)-(d)所示将金属球15从金属线12拉断的程度不同,如图10所示,各凸头11的高度H可能会有差异h。例如,当形成多个高度H为45μm的凸头11时,其高度的差异h约为±10μm。
因此,当如图11所示,内引线6相对置地定位于多个凸头11之上,并用加热后的焊头7一下按压内引线6的顶端部,使形成于内引线6表面的锡或焊锡之类的镀层8熔融时,由于高度H的差异h,会有与内引线6不接触的凸头11,其结果如图12所示,在接合后,可能会有凸头11不能通过合金层9与内引线6接触。
鉴于此种情况,在实施形态3中,当设置多个凸头时,为了使各凸头的高度均匀,将各凸头做成双层凸起状凸头。即,在图13中,如(a)所示,将用金、铜、铝、焊锡等制成的金属线12插入并贯穿陶瓷或红宝石制成的毛细管13,在贯穿后的金属线12的顶端与被称为焊枪头的电极14之间进行放电,形成金属球15。
接着如(b)所示,将上述金属球15按压到经预热的半导体元件1的电极2之上,施加超声波振动,利用温度、压力及超声波振动的作用,使所述金属球15与半导体元件1的电极2结合。然后,如(c)所示,使毛细管13沿垂直方向上升,再如(d)所示,使毛细管13横向偏移下降,然后如图(e)所示,使金属线12与金属球15上面接触,利用温度、压力(或温度、压力及超声波振动)的作用,使金属线12与金属球15接合,再如(f)所示,使毛细管13再次上升,将金属线12拉断,形成双层凸起状凸头20。因为这样形成的双层凸起状凸头20的高度H均匀,所以如图15所示,若在半导体元件1的电极2上形成多个双层凸起状凸头20,各凸头20的高度H也均匀。例如,形成多个高度H为45μm的双层凸起状凸头20时,各高度H的差异h为±2μm,在不成问题的范围之内。
因此,当如图16所示,用焊头7按压内引线6时,各凸头20能可靠地与内引线6接触,其结果如图17所示,各凸头20与内引线6通过合金层9均匀且可靠地接合,并且因为与上述的实施形态1一样,形成有多个凸头20,所以,能防止合金层9流到半导体元件1的边缘部,能以很高的可靠性使半导体元件1的电极2与带状载体5的内引线6相接合。
(实施形态4)
如上文所述的实施形态2那样采用金属线结合法在各电极2上设置2层重叠的凸头11(一般称为拉断凸头)时,也会如图18所示,各凸头11的高度H有可能产生差异h。
由于如图30的(c)-(d)所示将金属球15从金属线12拉断的程度不同,如图10所示,各凸头11的高度H可能会有差异h。例如,当形成多个高度H为45μm的凸头11时,其高度的差异h约为±10μm。
因此,当如图19所示,各内引线6相对置地定位于各电极2上所形成的凸头11之上,并用加热后的焊头7一下按压各内引线6的顶端部,使形成于内引线6表面的锡或焊锡之类的镀层8熔融时,由于高度H的差异h,会有与内引线6不接触的凸头11,其结果如图20所示,在接合后,可能会有凸头11不能通过合金层9与内引线6接触。
鉴于此种情况,在实施形态4中,当在半导体元件1的各电极2上设置2层重叠的凸头时,将各凸头做成双层凸起状的凸头。即,2层凸起形状的凸头20的形成方法与前面叙述实施形态3的一样,如此,则如图22所示,2层重叠的各凸头20的高度H均匀。因此,当如图23所示,用焊头7按压各内引线6时,各电极2上的凸头20能可靠地与各内引线6接触,其结果如图24所示,各凸头20与各内引线6通过合金层9均匀且可靠地接合,并且与上述实施形态2一样,通过将凸头20重叠使凸头20的高度H增高,内引线6与半导体元件1的间隙增大,能增大接合所需的合金层9的量,能防止多余的合金层与半导体元件1的边缘接触,所以,能以很高的可靠性使半导体元件1的电极2与带状载体5的内引线6接合。
另外,重叠的凸头20不限于2层,也可以是3层,或3层以上。
Claims (4)
1.一种电子组件结构体,当使半导体元件(1)与带状载体(5)的内引线(6)接合时,将金属线(12)顶端熔融形成的金属球(15)接合在所述半导体元件(1)的电极(2)之上,在所述半导体元件(1)的电极(2)上形成凸头(11),并在所述内引线(6)表面形成镀层(8),使所述内引线(6)与半导体元件(1)的凸头(11)位置对准,在此状态使所述镀层(8)熔融,利用合金层(9)使半导体元件(1)与所述内引线(6)接合,其特征在于,在半导体元件(1)的电极(2)上形成的由所述金属球(15)造成的凸头(11)有多个。
2.一种电子组件结构体,当使半导体元件(1)与带状载体(5)的内引线(6)接合时,将金属线(12)顶端熔融形成的金属球(15)接合在所述半导体元件(1)的电极(2)之上,在所述半导体元件(1)的电极(2)上形成凸头(11),并在所述内引线(6)表面形成镀层(8),使所述内引线(6)与半导体元件(1)的凸头(11)位置对准,在此状态使所述镀层(8)熔融,利用合金层(9)使半导体元件(1)与所述内引线(6)接合,其特征在于,在半导体元件(1)的电极(2)上形成的由所述金属球(15)造成的凸头(11)之上,再结合上在金属线(12)顶端形成的金属球(15),拉断所述金属线(12)使所述金属球(15)留下呈接合在所述凸头(11)上面的状态,在半导体元件(1)的电极(2)之上形成至少2层以上的金属球(15)造成的凸头(11)。
3.根据权利要求1所述的电子组件结构体,其特征在于,所述凸头(11)是使贯穿过毛细管(13)的金属线(12)顶端熔融,在所述金属线(12)顶端形成金属球(15),移动所述毛细管(13)使所述金属球(15)定位在半导体元件(1)的电极(2)之上,使所述金属球(15)与半导体元件(1)的电极(2)接合,使所述毛细管(13)上升,横向偏移后下降,使所述金属线(12)再接合在已接合于半导体元件(1)的电极(2)上的金属球(15)之上后,使所述毛细管(13)再次上升,拉断所述金属线(12)使所述金属球(15)留下呈与半导体元件(1)的电极(2)接合的状态,从而在半导体元件(1)的电极(2)上形成的由所述金属球(15)造成的双层凸起状凸头(20)。
4.根据权利要求2所述的电子组件结构体,其特征在于,所述凸头(11)是使贯穿过毛细管(13)的金属线(12)顶端熔融,在所述金属线(12)顶端形成金属球(15),移动所述毛细管(13)使所述金属球(15)定位在半导体元件(1)的电极(2)之上,使所述金属球(15)与半导体元件(1)的电极(2)接合,使所述毛细管(13)上升,横向偏移后下降,使所述金属线(12)再接合在已接合于半导体元件(1)的电极(2)上的金属球(15)之上后,使所述毛细管(13)再次上升,拉断所述金属线(12)使所述金属球(15)留下呈与半导体元件(1)的电极(2)接合的状态,在半导体元件(1)的电极(2)上形成双层凸起状凸头(20),在该双层凸起状凸头(20)之上再重叠另外的双层凸起状凸头(20),从而在电极(2)之上形成至少2层以上的由金属球(15)造成的双层凸起状凸头(20)。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP146921/96 | 1996-06-10 | ||
JP14692196A JP3558449B2 (ja) | 1996-06-10 | 1996-06-10 | 電子部品構体 |
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CN1195423A true CN1195423A (zh) | 1998-10-07 |
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CN97190679A Pending CN1195423A (zh) | 1996-06-10 | 1997-06-09 | 电子组件结构体 |
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US (1) | US20020014685A1 (zh) |
EP (1) | EP0844656A4 (zh) |
JP (1) | JP3558449B2 (zh) |
KR (1) | KR19990036180A (zh) |
CN (1) | CN1195423A (zh) |
WO (1) | WO1997048131A1 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101924046A (zh) * | 2009-06-16 | 2010-12-22 | 飞思卡尔半导体公司 | 在半导体器件中形成引线键合的方法 |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
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CN1151547C (zh) * | 1997-07-15 | 2004-05-26 | 株式会社日立制作所 | 半导体装置制造方法 |
TW465064B (en) * | 2000-12-22 | 2001-11-21 | Advanced Semiconductor Eng | Bonding process and the structure thereof |
JP3727615B2 (ja) * | 2002-06-26 | 2005-12-14 | 株式会社新川 | ワイヤボンディング用ワイヤのイニシャルボール形成方法およびワイヤボンディング装置 |
US7115998B2 (en) * | 2002-08-29 | 2006-10-03 | Micron Technology, Inc. | Multi-component integrated circuit contacts |
US20070200234A1 (en) * | 2006-02-28 | 2007-08-30 | Texas Instruments Incorporated | Flip-Chip Device Having Underfill in Controlled Gap |
US10411085B2 (en) * | 2016-12-29 | 2019-09-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and a method for fabricating the same |
JP6858939B2 (ja) * | 2017-04-28 | 2021-04-14 | 東北マイクロテック株式会社 | 外部接続機構、半導体装置及び積層パッケージ |
US10535644B1 (en) * | 2018-06-29 | 2020-01-14 | Taiwan Semiconductor Manufacturing Co., Ltd. | Manufacturing method of package on package structure |
FR3088018B1 (fr) * | 2018-11-06 | 2023-01-13 | Mbda France | Procede de liaison par brassage permettant d'ameliorer la tenue en fatigue de joints brases |
US20200203243A1 (en) * | 2018-12-19 | 2020-06-25 | Texas Instruments Incorporated | Universal leaded/leadless chip scale package for microelecronic devices |
Family Cites Families (6)
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US5025348A (en) * | 1987-11-20 | 1991-06-18 | Casio Computer Co., Ltd. | Bonding structure of an electronic device and a method for manufacturing the same |
US5014111A (en) * | 1987-12-08 | 1991-05-07 | Matsushita Electric Industrial Co., Ltd. | Electrical contact bump and a package provided with the same |
JP2733418B2 (ja) * | 1992-09-16 | 1998-03-30 | 松下電子工業株式会社 | 半導体装置の製造方法 |
JPH06268013A (ja) * | 1993-03-15 | 1994-09-22 | Hitachi Ltd | 半導体装置とそれに用いられるキャリアテープの製造方法 |
JPH06302645A (ja) * | 1993-04-15 | 1994-10-28 | Fuji Xerox Co Ltd | 電子部品の端子接続方法とこの接続方法で接続した電子機器およびその端子接続用バンプ |
JP3184014B2 (ja) * | 1993-07-26 | 2001-07-09 | 株式会社東芝 | 半導体装置 |
-
1996
- 1996-06-10 JP JP14692196A patent/JP3558449B2/ja not_active Expired - Fee Related
-
1997
- 1997-06-09 WO PCT/JP1997/001990 patent/WO1997048131A1/ja not_active Application Discontinuation
- 1997-06-09 US US09/011,039 patent/US20020014685A1/en not_active Abandoned
- 1997-06-09 CN CN97190679A patent/CN1195423A/zh active Pending
- 1997-06-09 KR KR1019980700848A patent/KR19990036180A/ko not_active Application Discontinuation
- 1997-06-09 EP EP97924372A patent/EP0844656A4/en not_active Withdrawn
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN101924046A (zh) * | 2009-06-16 | 2010-12-22 | 飞思卡尔半导体公司 | 在半导体器件中形成引线键合的方法 |
Also Published As
Publication number | Publication date |
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JPH09330949A (ja) | 1997-12-22 |
KR19990036180A (ko) | 1999-05-25 |
JP3558449B2 (ja) | 2004-08-25 |
EP0844656A1 (en) | 1998-05-27 |
WO1997048131A1 (fr) | 1997-12-18 |
EP0844656A4 (en) | 2000-03-29 |
US20020014685A1 (en) | 2002-02-07 |
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