CN1512566A - 用于倒装焊的基板 - Google Patents

用于倒装焊的基板 Download PDF

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CN1512566A
CN1512566A CNA021604800A CN02160480A CN1512566A CN 1512566 A CN1512566 A CN 1512566A CN A021604800 A CNA021604800 A CN A021604800A CN 02160480 A CN02160480 A CN 02160480A CN 1512566 A CN1512566 A CN 1512566A
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pad
substrate
substrate layer
welding
chip
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杜黎光
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Weiyu Science & Technology Test Package (shanghai) Co Ltd
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Weiyu Science & Technology Test Package (shanghai) Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81385Shape, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/8185Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0105Tin [Sn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

本发明提供一种用于倒装焊的基板。传统的芯片的焊点与基板上的焊盘之间的焊接解决方案中,存在状增加工序,导致价格上升的问题。为解决这一问题,本发明提供一种基板,包含衬底层、位于衬底层上的焊盘以及围绕所述焊盘的阻焊层,所述焊盘被去掉中心区域,在焊盘中心形成中空区域。本发明的改进使焊盘接触面不平,在芯片焊点与基板焊盘的焊接过程中,这种不平整能有效地排开填料,实现焊点与焊盘的可靠焊接。

Description

用于倒装焊的基板
技术领域
本发明涉及集成电路封装技术,尤其涉及一种芯片倒装焊技术中使用的基板。
背景技术
倒装焊(Flip Chip)工艺是一种取代常用的丝焊(wire bonding)工艺的用于芯片和外界电互连的先进的封装技术。其优势在于电性能好,适合高速高密度电子器件的应用。图1示出了这种倒装焊技术的流程图。
如图1所示,该倒装焊技术的大致流程为:
在衬底层100具到焊盘101的一面上,通过滴嘴110滴涂助焊剂,在衬底层100表面上形成助焊剂层120;(如图1A所示)
然后,把待封装的芯片130倒置到衬底层100上,使芯片130上的焊点131与衬底层100上的焊盘101对齐;(如图1B所示)
然后,用再流焊工艺使芯片130上的焊点131与衬底层100上的焊盘101之间键合(即电连接);(如图1C所示)
然后,清洗衬底层100与芯片130之间的助焊剂层120;(如图1D所示)
然后,在衬底层100与芯片130之间充填底充胶,底充胶靠表面张力自行流入芯片130与基板100间的间隙,形成底充胶层140;(如图1E所示)
最后,对底充胶层140进行加热固化,完成倒装焊,将芯片焊接到基板上。(如图1F所示)
这种倒装焊的缺点在于:由于芯片130和有机衬底层100的热膨胀系数不同,造成器件在制造过程中和工作时由于热失配导致焊点可靠性下降。现在常用在芯片和衬底层之间填充胶体(Underfill)来缓冲焊点的应力,但效果仍不理想。而且,由于填充胶体需要较长的时间,且由于缝隙小,不易完全充满。
基于此,已有技术中已改进采有非自流式底充胶的工艺来实现倒装焊。其步骤和方式如图2所示。
在衬底层200具有焊盘201的一面上,通过滴嘴210滴涂非自流式底充胶,在衬底层200表面上形成非自流式底充胶层220;(如图2A所示)
然后,把待封装的芯片230倒置于衬底层200上,使芯片230上的焊点231与衬底层200上的焊盘201对齐;(如图2B所示)
最后,用再流焊工艺使芯片230上的焊点231与衬底层200上的焊盘201键合(电连接),同时使非自流式底充胶层220加热固化。(如图2C所示)
图2的这种技术可使芯片焊点的焊接过程和胶体的固化过程合二为一,降低成本。同时能有效避免充胶不满的问题,因而是图1所示的常规的工艺更先进。但,其仍存在缺点,即不能在有机胶体中添加或只能少量添加无机填料(如Si02等)来使胶体的热膨胀系数和芯片的热膨胀系数匹配,从而使胶体对焊点的保护作用下降。因为,如图3所示,由于传统的基板200上的金属焊盘201都是圆盘状的金属片,其表面是平整的。当非自流底充胶220中混入较多的无机填料时,这些填料可能卡在焊点231和衬底层200上的金属焊盘201之间,导致焊点231与焊盘201无法焊接或焊接不良。
为了解决这一问题,传统也提出了一种改变基板上的焊盘结构的改进。如图4所示,对衬底层200先做预浸锡工艺,在金属焊盘201上形成焊料盖202。这样,在焊点的焊接过程中能有效地排开在焊点231与焊盘201之间的填料,从而实现可靠焊接。同时,由于填充了无机填料,对焊点的保护作用也得到加强。但这种形式的缺点是增加了工序,导致价格上升。
发明内容
因此,本发明的目的在于在图3的基础上,提出一种对基板上的金属焊盘的改进,使其可以达到既能排开无机填料,又能使工艺简化的效果。
根据本发明的上述目的,本发明提供一种用于倒装焊的基板,包含衬底层、位于所述衬底层上的焊盘以及围绕所述焊盘的阻焊层,其特征在于,所述焊盘被去掉中心区域,在焊盘中心形成中空区域。
在如上所述的基板中,所述焊盘呈环形。
在如上所述的基板中,所述焊盘呈一侧开口的环形。
在如上所述的基板中,所述焊盘呈二侧开口的环形。
在如上所述的基板中,所述焊盘开设有十字槽。
本发明对基板上的焊盘作了如上的改进,利用图2所示的方式进行倒装焊,在芯片焊点与基板焊盘的焊接过程中,由于焊盘接触面不平,也能有效地排开填料,实现焊点与焊盘的可靠焊接,起到与图4与似的效果,而其所用的成本则远低于图4的技术。
附图说明
图1是一种传统的倒装焊工艺的流程图;
图2是另一种传统的倒装焊工艺的流程图;
图3用于说明图2的工艺中,焊点与焊盘之间的焊接情况;
图4示出了传统技术中,对焊盘的一种改进结构;
图5是本发明对基板上的焊盘的一种改进结构;
图6是本发明可以使用的几种焊盘典型的形状。
具体实施方式
如图5所示,与传统的结构一样,衬底层300上有多个焊盘301,每个焊盘301的周围设置有阻焊层303。本发明改进点在于,将焊盘301的中心区域去掉,形成环状的焊盘结构,在焊盘中心形成中空区域302。图5A和图5B中示出了其截面图。由于中空区域302使焊盘301的表面不平整,因此,在芯片焊点231与焊盘301焊接过程中,由于两者的接触面不平,能有效地排开填料(如图5B所示),起到与图4中的改进相同的效果。
图6示出了几种可以使用的、焊盘中心具有中空区域的焊盘形状。但应当理解,图6的所示仅是例举,并非穷举,因此,其它中空区域的的其它形状的焊盘也应包括在本发明的保护范围内。图6中,图6A所示的焊盘为圆环形,其中空区域为302A;图6B所示的焊盘为两侧开口的环形,其中空区域为302B;图6C所示的焊盘为四侧开口的圆环形,其中空区域为302C;图6D所示为具有十字形中空区域303D的焊盘;图6E所示为单侧开口的圆环形。

Claims (5)

1、一种用于倒装焊的基板,包含衬底层、位于衬底层上的焊盘以及围绕所述焊盘的阻焊层,其特征在于,所述焊盘被去掉中心区域,在焊盘中心形成中空区域。
2、如权利要求1所述的基板,其特征在于,所述焊盘呈环形。
3、如权利要求1或2所述的基板,其特征在于,所述焊盘呈一侧开口的环形。
4、如权利要求1或2所述的基板,其特征在于,所述焊盘呈二侧开口的环形。
5、如权利要求1所述的基板,其特征在于,所述焊盘开设有十字槽。
CNA021604800A 2002-12-27 2002-12-27 用于倒装焊的基板 Pending CN1512566A (zh)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100416810C (zh) * 2006-03-09 2008-09-03 南茂科技股份有限公司 半导体元件及其制造方法
CN100424864C (zh) * 2004-07-16 2008-10-08 矽品精密工业股份有限公司 提高封装可靠性的导线架及其封装结构
US7651886B2 (en) 2006-03-01 2010-01-26 Chipmos Technologies Inc. Semiconductor device and manufacturing process thereof
CN1595626B (zh) * 2004-07-15 2010-04-28 番禺得意精密电子工业有限公司 电子元件的锡球成形方法
CN107797049A (zh) * 2017-09-28 2018-03-13 北京时代民芯科技有限公司 一种ic芯片背面观察样品及其制作方法

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1595626B (zh) * 2004-07-15 2010-04-28 番禺得意精密电子工业有限公司 电子元件的锡球成形方法
CN100424864C (zh) * 2004-07-16 2008-10-08 矽品精密工业股份有限公司 提高封装可靠性的导线架及其封装结构
US7651886B2 (en) 2006-03-01 2010-01-26 Chipmos Technologies Inc. Semiconductor device and manufacturing process thereof
CN100416810C (zh) * 2006-03-09 2008-09-03 南茂科技股份有限公司 半导体元件及其制造方法
CN107797049A (zh) * 2017-09-28 2018-03-13 北京时代民芯科技有限公司 一种ic芯片背面观察样品及其制作方法
CN107797049B (zh) * 2017-09-28 2021-09-28 北京时代民芯科技有限公司 一种ic芯片背面观察样品及其制作方法

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