CN1185656A - 半导体封装结构及其制造方法 - Google Patents

半导体封装结构及其制造方法 Download PDF

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CN1185656A
CN1185656A CN97108703A CN97108703A CN1185656A CN 1185656 A CN1185656 A CN 1185656A CN 97108703 A CN97108703 A CN 97108703A CN 97108703 A CN97108703 A CN 97108703A CN 1185656 A CN1185656 A CN 1185656A
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framework
encapsulation
tab
wire
lead
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CN1147930C (zh
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申明进
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SK Hynix Inc
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LG Semicon Co Ltd
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Abstract

一种半导体封装的结构及其制造方法,该结构包括:具有导体片的构架,每个导体片皆掩埋在通过该构架敞开且按一定间隔设置的数个小孔中的一个中;具有固定于夹具上并在四个方向上延伸的引线的TAB,每根引线用于电连接一个导体片。所说方法包括以下步骤:根据封装的形状提供构架;把引线贴装在夹具上,使之在四个方向上延伸,构成TAB;在构架上按一定间隔形成小孔;在每个小孔中掩埋一个导体片;回流TAB上的引线,电连接引线与各导体片,并把引线贴装到构架上。

Description

半导体封装结构 及其制造方法
本发明涉及一种半导体封装，特别涉及一种半导体封装结构及其制造方法，可以简化制造工艺，适于提高器件的可靠性。
在晶片上制造集成电路后，在制造半导体封装时，一般情况下，进行连续的工艺步骤，包括划片分离晶片上制造的芯片，芯片粘结，用于将分离芯片固定于引线框的底盘上，引线键合，用于电连接芯片上的键合焊盘与引线框的内引线，及模制电路，用于进行起保护作用。
下面将参照附图解释常规半导体封装。图1示出了常规引线键合半导体封装的剖面结构。
参见图1，常规半导体封装包括：带有半导体电路的芯片11；与芯片11相连并支撑芯片11的引线框12；用于固定芯片11和引线框12的双面胶带13；引线框12底下的下焊盘15，用于连接PCB14与引线框12；芯片11上部的键合焊盘16，用作电极；电连接键合焊盘16与引线框12的金属丝17，及保护器件免受外界影响的EMC(环氧树脂化合物)管座18。
上述常规半导体封装存在以下问题。
首先，电连接芯片与引线框的引线键合工艺使得制造工艺复杂，且在堆叠了芯片后还需要复杂的焊接工艺。
第二，没有提供用于散发器件工作期间产生的热量的散热装置(heatsinks)。
第三，带有一个摞一个的许多封装的堆叠封装外观不够精细。
因此，本发明旨在提供一种半导体封装结构及其制造方法，基本上能够克服现有技术的局限和缺点造成的一个或多个问题。
本发明的目的在于提供一种制造半导体封装的方法，制造简单且容易堆叠。
本发明的另一目的在于提供一种半导体封装结构，该结构具有附着于其上的散热装置，易于散热，可以提高器件的可靠性。
本发明的一个其它特点和优点如说明书所述，或可从说明书中显现出，或可以通过实施本发明获知。特别是书面说明和权利要求书及附图中指出的结构将会实现和获得本发明的目的和优点。
为了实现这些和其它优点，根据本发明的目的，正如所概述和概括说明的那样，该半导体封装结构包括：具有导体片的构架，每个导体片皆掩埋在通过该构架敞开且按一定间隔设置的数个小孔中的一个中；及具有固定于夹具有上并在四个方向上延伸的引线的TAB，每根引线用于电连接一个导体片。
按本发明的另一方案，提供一种制造半导体封装的方法，该方法包括以下步骤：根据封装的形状提供构架；把引线贴装在夹具上，使之在四个方向上延伸，构成TAB；在构架上按一定间隔形成小孔；在每个小孔中掩埋一个导体片；回流TAB上的引线，用于电连接引线与各导体片，并随之把引线贴装到构架上。
应该明白，上述的概括说明和以下的详细说明皆是例证性和说明性的，旨在对所申请的发明作进一步地说明。
各附图可用于理解本发明，它们与说明书结合并构成说明书的一部分，它们示出了本发明的实施例，并与说明书一起解释本发明的原理。
各附图中：
图1是常规引线键合半导体封装结构的剖面图；
图2是本发明优选实施例的半导体封装结构的透视图；
图3a-3d是展示根据本发明优选实施例制造半导体封装的工艺步骤的透视图；
图4a和4b是展示沿图3b中I-I′线的半导体封装的剖面图；
图5a和5b是展示沿图3b中II-II＇线的半导体封装的剖面图；
图6是安装于PCB上的半导体封装的剖面图；
图7是根据本发明优选实施例的半导体封装的堆叠剖面图；
图8是根据本发明优选实施例、具有贴于其上的散热装置的半导体封装的剖面图。
下面结合示于附图的实例详细说明本发明的优选实施例。图2是根据本发明优选实施例的半导体封装结构的透视图。
参见图2，根据本发明优选实施例的半导体封装包括：构架22，其上具有每片皆掩埋于通孔中的导体片21，所说通孔按一定间隔在上下方向上形成于构架中；夹具，用于在四个方向上固定引线，引线由此夹具延伸；及具有与导体片21电连接的引线的TAB24。
构架22具有于其上安装芯片的底板，该底板的形成方法可以是以下两种方法中的任一种，第一种，预先提供其上仅具有用于掩埋导体片21的小孔的柱形底板结构，将此结构切成单元底板片，并研磨，由此形成底板；第二种，预先提供其上具有用于掩埋导体片21的小孔和安装芯片的通孔的柱形底板结构，将此结构切成单元底板片，并贴上底盘，由此形成底板。夹具可以是固定引线23的载带。掩埋于构架22中的引线23和导体片21通过凸点电连接。
图3a-3d是根据本发明优选实施例制造半导体封装的工艺步骤的透视图，其中图3a展示的是TAB，具有贴于其上并在四个方向延伸的多根引线23。每根引线23皆通过凸点与以后将形成的一个导体片21电连接。
另外，图3b是根据封装形状形成的构架的透视图，该构架具有形成于其中心的凹腔，和围绕着凹腔按一定间隔形成于构架22中的多个小孔，每个小孔中掩埋有一个导体片21。晶片芯片和TAB贴装于具有这样的掩埋导体片21的构架22上，便可以得到一个完成的封装。
图3c是具有贴装于构架上的晶片芯片和TAB的封装的透视图。贴装于TAB上的每根引线23与掩埋于构架中的一个导体片21电连接。
图3d是模制后完成的封装的透视图，该封装没有发生可靠性和氧化的问题。在把构架安装于实际的PCB上后进行模制时，有两种情况，即只模制构架上部和模制整个构架。此时，为了容易散热，模制之前在TAB上贴装一散热装置(未示出)。
下面结合各剖面图解释制造这种半导体封装的方法。图4a和4b是半导体封装沿图3b中I-I＇线的剖面图。
参见图4a，TAB贴在构架22上，使多根引线23与掩埋于构架22中的各导体片21电连接。在模制工艺中模制各根引线23之间的空间。图4b是模制完成后半导体封装的剖面图。如图所示，只是利用环氧化树脂24模制了构架的上部。
图5a和5b是半导体封装沿图3b中的II-II＇线的剖面图。
参见图5a，该图是完成的封装的剖面图，该封装包括设置于其两侧的导体片21，构架22上的晶片芯片25，和在构架22上、具有贴于其上的引线23的TAB。引线23从晶片芯片25延伸到晶片芯片25两侧上的导体片21。设置于导体片21上的凸点(未示出)电连接导体片21和引线23。
参见图5b，此图是模制后完成的封装的剖面图，环氧树脂24模制了构架22的上部，模制延伸到构架22中心部分上的晶片芯片25的边缘。
导体片21上设置的、用于连接TAB的引线23的凸点有利于容易地利用回流进行导体片21与引线23的粘结。另外，在把半导体封装安装于PCB上时，导体片下设有焊料球或凸点的话，PCB和封装的粘结很容易。
图6是粘结于PCB26上的模制封装的剖面图，其中简单地设于导体片21之下的焊料球27可以电连接PCB26与导体片21。封装粘结于PCB26上后，再用环氧树脂24模制构架22，以包封整个构架，这样便可以进一步提高封装的可靠性。
以上介绍的制造半导体封装的方法具有简单的制造工艺，这是因为不需要连接晶片芯片与导体片的键合工艺，另外，由于容易堆叠，所以可以拓宽其用途。
图7是根据本发明优选实施例的各半导体封装的堆叠剖面图。
参见图7，设置了焊料球27和凸点28后，堆叠各封装。进行回流，这样便可以容易地粘结堆叠的各封装。另外，在把堆叠的各封装安装于PCB26上后模制整个堆叠封装时，由于封装堆表现为一个封装，所以，可以显著提高实际每个单位封装的容量。在把堆叠的各封装安装于PCB上时，利用焊料球27和凸点28可以容易地利用回流工艺粘结堆叠封装与PCB。
图8是具有贴装于其上用于散热的散热装置的半导体封装的剖面图。
参见图8，在根据本发明优选实施例的制造半导体封装的方法中，在把散热装置29贴装于封装的TAB上后，用环氧树脂24模制整个导体封装。
以上介绍的本发明优选实施例的制造半导体封装的方法具有以下优点。
首先，封装时只需粘结工艺，不需要引线键合工艺，所以，有利于简化制造工艺。
第二，可以只用简单的回流工艺而不必任何附加工艺就可以堆叠几个封装。
第三，简单地贴装了容易散热的散热装置，可以提高器件的可靠性。
显然，对本领域的普通技术人员来说，在不脱离本发明的精视和范围的情况下，可以对本发明的半导体封装结构及其制造方法做出各种改型和变化。本发明包含发明的所有改型和变化，这些改型的变化皆落在权利要求书及其等同物范围内。

Claims (16)

1.一种半导体封装结构，包括：
具有导体片的构架，每个导体片皆掩埋在通过该构架敞开且按一定间隔设置的数个小孔中的一个中；及
具有固定于夹具上并在四个方向上延伸的引线的TAB，每根引线用于电连接一个导体片。
2.如权利要求1的结构，其中，夹具是固定引线的载带。
3.如权利要求1的结构，其中，每个导体片具有设置于其上的凸点，用于电连接导体片与各引线。
4.如权利要求1的结构，其中，构架是具有用于掩埋导体片的小孔的柱形板。
5.如权利要求1的结构，其中，构架是具有用于掩埋导体片的小孔和安装芯片的通孔的柱形板。
6.一种制造半导体封装的方法，包括以下步骤：
根据封装的形状提供构架；
把引线贴装在夹具上，使之在四个方向上延伸，构成TAB；
在构架上按一定间隔形成小孔；
在每个小孔中掩埋一个导体片；
回流TAB上的引线，电连接引线与各导体片，并把引线贴装到此构架上。
7.如权利要求6的方法，还包括在把TAB贴装于构架上后模制半导体封装的步骤。
8.如权利要求7的方法，还包括完成了模制后把半导体封装安装于PCB上的步骤。
9.如权利要求8的方法，其中，焊料球或凸点形成于PCB上，用于连接导体片与PCB。
10.如权利要求8的方法，还包括把模制封装安装于PCB上后再模制模制过的封装的步骤。
11.如权利要求6的方法，其中，TAB贴装于构架上，而另一封装堆叠于其上。
12.如权利要求11的方法，其中，在堆叠各封装时堆叠的各封装利用焊料球或凸点电连接。
13.如权利要求6的方法，其中，在封装的TAB的上部贴装一散热装置，用于从由TAB贴装到构架上完成的封装中散热。
14.如权利要求7的方法，其中，对构架的上部或整个构架进行模制。
15.如权利要求12的方法，其中，堆叠封装时封装之间的粘结通过回流完成。
16.如权利要求13的方法，还包括贴装了散热装置后再模制封装的步骤。
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