CN1160735C - 输入收信机电路 - Google Patents

输入收信机电路 Download PDF

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Publication number
CN1160735C
CN1160735C CNB991040430A CN99104043A CN1160735C CN 1160735 C CN1160735 C CN 1160735C CN B991040430 A CNB991040430 A CN B991040430A CN 99104043 A CN99104043 A CN 99104043A CN 1160735 C CN1160735 C CN 1160735C
Authority
CN
China
Prior art keywords
mos transistor
channel mos
signal
source electrode
grid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB991040430A
Other languages
English (en)
Chinese (zh)
Other versions
CN1238530A (zh
Inventor
高井康浩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of CN1238530A publication Critical patent/CN1238530A/zh
Application granted granted Critical
Publication of CN1160735C publication Critical patent/CN1160735C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/225—Clock input buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1084—Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1087—Data input latches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Dram (AREA)
CNB991040430A 1998-03-18 1999-03-18 输入收信机电路 Expired - Fee Related CN1160735C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP10068592A JP3061126B2 (ja) 1998-03-18 1998-03-18 入力レシーバ回路
JP68592/98 1998-03-18
JP68592/1998 1998-03-18

Publications (2)

Publication Number Publication Date
CN1238530A CN1238530A (zh) 1999-12-15
CN1160735C true CN1160735C (zh) 2004-08-04

Family

ID=13378229

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB991040430A Expired - Fee Related CN1160735C (zh) 1998-03-18 1999-03-18 输入收信机电路

Country Status (4)

Country Link
US (1) US6137320A (ja)
JP (1) JP3061126B2 (ja)
KR (1) KR100331011B1 (ja)
CN (1) CN1160735C (ja)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6927753B2 (en) 2000-11-07 2005-08-09 Semiconductor Energy Laboratory Co., Ltd. Display device
KR100417857B1 (ko) * 2001-06-26 2004-02-05 주식회사 하이닉스반도체 램버스 디램의 입력 리시버 회로
US6781428B2 (en) 2001-06-27 2004-08-24 Intel Corporation Input circuit with switched reference signals
KR100397890B1 (ko) * 2001-07-04 2003-09-19 삼성전자주식회사 펄스 신호를 발생시키는 고속 입력 리시버
US6512704B1 (en) * 2001-09-14 2003-01-28 Sun Microsystems, Inc. Data strobe receiver
WO2004103772A2 (en) 2003-05-19 2004-12-02 Donnelly Corporation Mirror assembly for vehicle
DE10244516B4 (de) * 2002-09-25 2006-11-16 Infineon Technologies Ag Integrierte Schaltung mit einer Eingangsschaltung
KR100532507B1 (ko) * 2004-03-05 2005-11-30 삼성전자주식회사 안정된 출력 스윙 폭과 안정된 지연 시간을 가지는 증폭회로
US7298182B2 (en) * 2004-06-15 2007-11-20 Infineon Technologies Ag Comparator using differential amplifier with reduced current consumption
US20060115016A1 (en) * 2004-11-12 2006-06-01 Ati Technologies Inc. Methods and apparatus for transmitting and receiving data signals
KR100562649B1 (ko) 2004-12-20 2006-03-20 주식회사 하이닉스반도체 입력 신호 리시버 및 입력 신호 감지 방법
KR100571647B1 (ko) * 2005-03-31 2006-04-17 주식회사 하이닉스반도체 반도체 장치의 데이터 래치회로
JP2011061289A (ja) 2009-09-07 2011-03-24 Elpida Memory Inc 入力バッファ回路
CN103618540A (zh) * 2013-11-27 2014-03-05 苏州贝克微电子有限公司 一种低功率差分接收器输入电路
US11226767B1 (en) 2020-09-30 2022-01-18 Micron Technology, Inc. Apparatus with access control mechanism and methods for operating the same

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57148418A (en) * 1981-03-09 1982-09-13 Toshiba Corp Comparator
JP2647527B2 (ja) * 1990-02-21 1997-08-27 シャープ株式会社 センス増幅回路
KR100196510B1 (ko) * 1995-12-28 1999-06-15 김영환 센스 증폭기
JP3090189B2 (ja) * 1996-07-03 2000-09-18 日本電気株式会社 増幅回路

Also Published As

Publication number Publication date
KR100331011B1 (ko) 2002-04-01
KR19990077962A (ko) 1999-10-25
US6137320A (en) 2000-10-24
JP3061126B2 (ja) 2000-07-10
CN1238530A (zh) 1999-12-15
JPH11266152A (ja) 1999-09-28

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Legal Events

Date Code Title Description
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C06 Publication
PB01 Publication
ASS Succession or assignment of patent right

Owner name: NEC ELECTRONICS TAIWAN LTD.

Free format text: FORMER OWNER: NIPPON ELECTRIC CO., LTD.

Effective date: 20030410

C41 Transfer of patent application or patent right or utility model
TA01 Transfer of patent application right

Effective date of registration: 20030410

Address after: Kawasaki, Kanagawa, Japan

Applicant after: NEC Corp.

Address before: Tokyo, Japan

Applicant before: NEC Corp.

C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20040804