CN114664750A - 半导体封装体用底部填充膜及利用其的半导体封装体的制造方法 - Google Patents

半导体封装体用底部填充膜及利用其的半导体封装体的制造方法 Download PDF

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CN114664750A
CN114664750A CN202110982614.4A CN202110982614A CN114664750A CN 114664750 A CN114664750 A CN 114664750A CN 202110982614 A CN202110982614 A CN 202110982614A CN 114664750 A CN114664750 A CN 114664750A
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adhesive layer
semiconductor
temperature
underfill film
epoxy resin
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CN202110982614.4A
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崔泰镇
李充九
朴守仁
李正进
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Doosan Corp
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Doosan Corp
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Publication of CN114664750A publication Critical patent/CN114664750A/zh
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    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
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Abstract

本发明涉及半导体封装体用底部填充膜及利用其的半导体封装体的制造方法，涉及通过包含熔体粘度和起始温度(Onset Temp.)被调节至预定范围的粘接层而封装工序简化从而能够提高生产效率、且能够提高封装体的连接可靠性的半导体封装体用底部填充膜及利用其的半导体封装体的制造方法。所述半导体封装体用底部填充膜包含：基材；以及配置在所述基材的一面、150至160℃时的熔体粘度为300至1000Pa.s、且差示扫描量热分析仪DSC上起始温度为145±5℃的粘接层。

Description

半导体封装体用底部填充膜及利用其的半导体封装体的制造 方法
技术领域
本发明涉及半导体封装体用底部填充膜及利用其的半导体封装体的制造方法，具体而言，涉及利用芯片布局方式而能够将半导体芯片移送和贴合工序简化以及提高生产效率、且能够提高封装体的可靠性的半导体封装体用底部填充膜及利用其的半导体封装体的制造方法。
背景技术
近年来，随着电子设备的小型化、高密度化，能够以最小的面积贴装半导体元件的倒装芯片(flip-chip)封装体制造方法受到关注。
在制造倒装芯片封装体时，在半导体芯片与封装体基板之间的空间配置底部填充(underfill)。底部填充不仅会保护封装体结构免受机械冲击和接合部的腐蚀之类的外部影响，还会通过使芯片与基板间的热膨胀系数差异所导致的应力最小化而起到提高封装体制品的可靠性的作用。
这样的底部填充通过如下方式形成：在实施焊料回流(solder reflow)工序后，利用针头之类的设备在半导体芯片与封装体基板之间的空间填充液态底部填充树脂，然后进行固化。但是，液态底部填充树脂的填充工序应当在半导体芯片与封装体基板之间的空白空间的整体区域均匀地提供底部填充树脂。因此，不仅要确保用于使针头沿半导体芯片的侧面以一定的轨迹移动的针头移动空间，还要确保用于配置针头的富裕空间。因此，发生空间消耗，这在将使用倒装芯片的制品小型化方面成为阻碍因素。此外，液态底部填充树脂的填充工序由于印刷电路基板的电路图案和贴合焊盘以及半导体芯片的焊料，使液态底部填充树脂的扩散速度产生差异，因此会在底部填充发生气隙或孔隙。这样的气隙或孔隙不仅使底部填充功能降低，还成为水分长期渗透而使封装体的可靠性降低的原因。
另一方面，近年来，对于应对半导体元件的小型化趋势的晶圆级封装体(WaferLevel Package)技术的关注度日益提高。晶圆级封装体技术与将从晶圆切下的半导体芯片一个一个进行封装的以往方式不同，是在芯片还未分离的晶圆上连组装也会完成的半导体封装体技术。如果应用这种半导体封装体技术，那么会缩短配线连接、塑料封装之类的半导体组装过程，因此能够通过工序简化来实现成本削减。
目前，半导体封装分别单独进行半导体芯片的移送工序、移送后的半导体芯片与封装体基板的贴合工序以及高温下的回流(reflow)工序，因此在没有物性降低的情况下将封装工序简化而提高生产效率方面存在局限。为此，急切需要开发能够应用晶圆级封装体技术而将半导体封装工序简化、且能够改善封装体的可靠性的贴合用新型材料以及利用其的半导体封装体制造工序。
发明内容
所要解决的课题
本发明人认识到，利用单独拾取半导体芯片而使其向贴合设备的支架水平移送且在预定位置对准的芯片布局(chip placement)方式后实施回流工序的情况下，能够将半导体封装工序自动化，相比现有技术能够减少材料损失和停机时间且使封装工序简化而有效提高生产效率。
为此，本发明的技术课题在于，提供一种半导体封装体用底部填充(underfill)膜，其适合于半导体封装时可将移送和贴合工序简化的芯片布局方式，而且能够提高连接可靠性。
此外，本发明的另一技术课题在于，提供一种制造半导体封装体的方法，其利用上述底部填充膜而简化贴合工序以及提高生产效率，同时连接可靠性优异。
本发明的其他目的和优点可以通过以下发明的具体实施方式和权利要求范围来进一步明确地说明。
解决课题的方法
为了实现上述技术课题，本发明提供一种半导体封装体用底部填充膜，其包含基材；以及配置在上述基材的一面、150至160℃时的熔体粘度为300至1000Pa.s、且差示扫描量热分析仪(DSC)上起始温度(Onset Temperature)为145±5℃的粘接层。
根据本发明的一实施例，上述底部填充膜可以用于芯片布局方式(ChipPlacement)，该芯片布局方式为：拾取附着有上述粘接层的半导体芯片而附着于被贴合台支撑的封装体基板上。
根据本发明的一实施例，上述粘接层的起始温度可以与预设定的贴合台的预热温度(Ts)实质相同。这里，所谓的“实质相同”是指，粘接层的起始温度与预设定的贴合台的预热温度(Ts)之差为0℃以上5℃以下。
根据本发明的一实施例，上述粘接层的厚度可以为上述半导体芯片与上述封装体基板间的间隔的80至120％范围。
根据本发明的一实施例，上述粘接层的差示扫描量热分析仪(DSC)上峰值顶点温度为165±5℃，上述起始温度与上述峰值顶点温度之差可以为25±5℃。
根据本发明的一实施例，上述粘接层可以为粘接树脂组合物的固化物或半固化物，上述粘接树脂组合物包含(a)含有液态环氧树脂、苯氧树脂和多官能性环氧树脂的环氧树脂；(b)酸酐系固化剂；(c)含氮(N)杂环化合物；以及(d)填料。
根据本发明的一实施例，上述多官能性环氧树脂、苯氧树脂和液态环氧树脂的混合比率可以为4:3～4:2～3重量比率。
根据本发明的一实施例，以上述环氧树脂1当量基准，上述酸酐固化剂的含量可以为0.3至1.0酸酐当量范围。
根据本发明的一实施例，以上述酸酐固化剂1当量基准，上述含氮杂环化合物的含量可以为0.005当量以上且小于0.02当量。
此外，本发明提供半导体封装体的制造方法，其包括：(i)在具备凸点的半导体芯片的凸点上附着上述底部填充膜的粘接层的步骤；(ii)拾取附着有上述粘接层的半导体芯片的凸点而使其在支撑于贴合台上的封装体基板的贴合焊盘上对准的步骤；(iii)将对准后的半导体芯片和封装体基板投入至加压室烘箱中的步骤；(iv)使上述半导体芯片的凸点熔融而使半导体芯片与封装体基板连接的步骤；以及(v)使配置在上述连接后的半导体芯片与封装体基板之间的粘接层固化的步骤。
根据本发明的一实施例，上述步骤(ii)中的拾取以及对准通过芯片布局方式来实施。
根据本发明的一实施例，上述步骤(ii)的贴合台可以被预热至与上述底部填充膜所具备的粘接层的起始温度实质相同的设定温度(Ts)。
根据本发明的一实施例，上述步骤(ii)中的凸点与贴合焊盘间的对准可以通过在130～150℃的贴合台温度、常温(RT)的贴片机头、10～200N、1～5秒的条件下进行压接来实施。
根据本发明的一实施例，上述步骤(iv)中在凸点的熔融步骤后，上述粘接层内空隙面积比可以为1.0％以下。
根据本发明的一实施例，上述步骤(v)中的粘接层的固化温度可以为160至250℃范围。
发明效果
根据本发明的一实施例，通过具备具有调节至预定范围的熔体粘度和起始温度(Onset Temp.)的粘接层，且应用芯片布局方式而进行半导体芯片移送和贴合工序的简化以及自动化，从而能够实现批量生产。并且能够提高封装体的连接可靠性。
因此，本发明的底部填充膜在本领域的半导体装置及其制作工序中也可以有效地应用。
本发明的效果不受以上例示的内容的限制，在本说明书中包含更加多样的效果。
附图说明
图1是示出本发明的第一实施例的半导体封装体用底部填充膜的结构的截面图。
图2是示出本发明的第二实施例的半导体封装体用底部填充膜的结构的截面图。
图3至图6是用于概略性说明本发明的半导体封装体的制造方法的各工序的截面图。
图7是利用实施例1的底部填充膜的半导体封装体的俯视照片。
图8是利用实施例1的底部填充膜的半导体封装体的截面照片。
符号说明
10A、10B：底部填充膜
11：基材
12：粘接层
13：第二基材
20：半导体芯片
21：凸点
30：封装体基板
31：贴合焊盘
具体实施方式
以下，详细说明本发明。本发明的实施例是为了向本技术领域的一般技术人员更加完整地说明而提供的，以下实施例可以变形为各种各样的其他形态，本发明的范围不受以下实施例的限定。此时，本说明书全篇中相同的参考符号指代相同的结构。
除非另行定义，本说明书中所使用的全部用语(包括技术和科学用语)可以按照本发明所属技术领域的一般技术人员共同理解的含义来使用。另外，一般使用的词典中所定义的用语除非被明确地另行定义则不应理想地或过度地解释。
此外，附图中示出的各构成的大小以及厚度是为了便于说明而随意示出的，本发明并不会受到图示的限定。附图中，为了确切展现各层以及区域而会将厚度放大后示出。并且，附图中，为了便于说明，夸张地示出了一部分层以及区域的厚度。
此外，说明书全篇中，当指出某一部分“包含”某一构成要素时，除非存在特别相反的记载，则其含义是可以进一步包含其他构成要素，而非将其他构成要素排除。此外，说明书全篇中，“在……上”的含义是，不仅包括位于对象部分的上或下的情况，也包括其中间还有其他部分的情况，而且并非以重力方向为基准位于上部。另外，本申请说明书中，“第一”、“第二”等用语并非表示任何顺序或重要度，是为了将构成要素彼此区别而使用。另外，当记载某一构成要素与另一构成要素“连结”、“结合”或“连接”时，不仅包括该构成要素与该另一构成要素直接连结、结合或连接的情况，还包括通过存在于该构成要素与该另一构成要素之间的其他构成要素来“连结”、“结合”或“连接”的情况。
另外，说明书全篇中，所谓“俯视”，其含义是从上部观察对象部分，所谓“截面”，其含义是从侧面观察将对象部分垂直切割后的截面。
<半导体封装体用底部填充膜>
图1是概略性示出本发明的第一实施例的半导体封装体用底部填充膜的截面图，图2是概略性示出本发明的第二实施例的半导体封装体用底部填充膜的截面图。
本发明的底部填充膜10A、10B是用于缓解在半导体封装时施加于半导体芯片的凸点与封装体基板的贴合焊盘的连接部的应力(stress)的非导电性粘接膜，具体而言，具有适合于芯片布局(Chip Placement)方式的物性。
如图1和图2所示，上述底部填充膜10A、10B包含基材11以及配置在上述基材的一面上的粘接层12。选择性地，可以进一步包含配置在上述粘接层的另一面的另一基材(以下，称为“第二基材”)13(参照图2)。
以下，参照图1来说明本发明的第一实施例的半导体封装体用底部填充膜10A。
基材
本发明的底部填充膜中，基材11是支撑粘接层且保护粘接层的表面的部分，使用底部填充膜时会被剥离而去除。
作为这样的基材11，只要是本领域中通常已知的塑料膜且能够剥离就可以无限制地使用，此外，也可以使用脱模纸。
作为可使用的塑料膜的非限制性例子，有聚对苯二甲酸乙二醇酯(PET)、聚对苯二甲酸丁二醇酯、聚萘二甲酸乙二醇酯等聚酯膜、聚乙烯膜、聚丙烯膜、玻璃纸、二乙酰纤维素膜、三乙酰纤维素膜、乙酰纤维素丁酸酯膜、聚氯乙烯膜、聚偏二氯乙烯膜、聚乙烯醇膜、乙烯-乙酸乙烯酯共聚物膜、聚苯乙烯膜、聚碳酸酯膜、聚甲基戊烯膜、聚砜膜、聚醚醚酮膜、聚醚砜膜、聚醚酰亚胺膜、聚酰亚胺膜、氟树脂膜、聚酰胺膜、丙烯酸树脂膜、降冰片烯系树脂膜、环烯烃树脂膜等。这样的塑料膜可以为透明或半透明，或者也可以被着色或未被着色。作为一例，基材11可以为聚对苯二甲酸乙二醇酯(PET)。作为另一例，基材11可以为聚酰亚胺(PI)。
这样的塑料膜上可以配置有脱模层。脱模层能够在将基材11与粘接层12分离时以粘接层不受到损伤且维持形状的状态使基材与粘接层容易地分离。这里，脱模层可以为一般使用膜状的脱模物质。
作为脱模层中所使用的脱模剂的成分，没有特别限定，可以使用本领域已知的通常的脱模剂成分。作为其非限制性例子，可以举出环氧系脱模剂、由氟树脂构成的脱模剂、有机硅系脱模剂、醇酸树脂系脱模剂、水溶性高分子等。此外，根据需要，可以包含粉末状填料、比如硅、二氧化硅等作为脱模层的成分。此时，微粒形态的粉末填料可以混用2种类型的粉末填料，此时，它们的平均粒度可以考虑所形成的表面粗糙度来适当选择。此外，脱模层的厚度可以在本领域已知的通常的范围内适当调节。另外，形成脱模层的方法没有特别限定，可以采用热压、热辊层压、挤出层压、涂布液的涂布、干燥等公知的方法。
上述基材11的厚度没有特别限定，可以在本领域已知的通常的范围内调节，比如，可以为约25至150μm，具体可以为约30至100μm，更具体可以为约30至50μm。此外，基材11的脱模能力没有特别限定，比如，可以为约1至500gf/英寸(inch)，具体可以为约10至100gf/英寸范围。
粘接层
本发明的底部填充膜中，粘接层12配置在基材11的一面上，能够在半导体封装时将半导体芯片与封装体基板对准时使半导体芯片粘接于封装体基板，且作为底部填充(underfill)能够将由于半导体芯片与封装体基板间的热膨胀系数差异而产生的应力和变形进行再分配。
本发明的粘接层12是半固化的状态，在约150至160℃具有1000Pa.s以下的最低熔体粘度(lowest melt viscosity)。这样的粘接层12在封装时配置在具备凸点(bump)的半导体芯片与具备贴合焊盘的封装体基板之间，且在130～150℃的贴合台温度、常温的贴片机头、10～200N、1～5秒的条件下使它们压接。此时，实质进行贴合的贴合台和贴片机中贴合台施加预定的温度，而贴片机头(Die Bonder Head)为常温状态。因此，与以往使用必须施加高温的贴片机的现有技术存有区别。
具体而言，本发明的粘接层12的最低熔体粘度在约150至160℃低至约1000Pa.s以下，具体为100至900Pa.s，更具体约300至600Pa.s，因此即使通过预定条件(例如，约150℃、75～200N、1～3秒)下的压接也容易熔融而具有流动性。因此，在将半导体芯片的凸点与封装体基板的贴合焊盘预贴合时，位于半导体芯片的凸点与封装体基板的贴合焊盘之间的粘接层12容易熔融而填充凸点与贴合焊盘之间的空白空间从而能够提高连接可靠性。特别是，由于上述粘接层12的流动性大，因此也能够填充微小间距(fine pitch)的微小空白空间。
此外，本发明的粘接层12不仅能够起到底部填充(underfill)的作用，也能够起到熔剂(flux)的作用，因此与以往不同，无需在贴合焊盘上涂布另外的熔剂(flux)或洗涤熔剂。因此根本不会产生由熔剂的残渣或熔剂洗涤溶剂的残留物导致的空隙。如此，本发明的粘接层的填充(gap-filling(填隙))效果优异，能够使空隙(void)产生最小化。
特别是，由于本发明的底部填充膜利用拾取附着有粘接层的半导体芯片并将其水平移动、对准以及附着于被贴合台支撑的封装体基板上的芯片布局(Chip Placement)方式，因此需要调节粘接层12的物性以适合于上述方式。比如，在粘接层12的起始温度(OnsetTemp.)与预设定的贴合台的预热温度(Ts)控制得实质相同的情况下，即使在预定条件下实施压接工序、比如后述的预贴合(pre-bonding)工序，也能够稳定附着，因此能够使半导体芯片移送工序和贴合工序简化而提高生产效率。
根据另一具体例，上述粘接层12在差示扫描量热分析仪(Differential ScanningCalorimeter，DSC)上的起始温度(Onset Temperature)可以为约145±5℃，具体可以为143至147℃。这里，起始温度是粘接层12开始部分固化的起始点，其具体含义是，为了起到熔剂(flux)功能，半固化状态的粘接层内存在的酸二酐固化剂的酸酐基开环(Ring open)成羧基而发生固化反应。如此，通过精确地将开始固化的粘接层12的起始温度(Onset Temp.)与实现封装贴合的贴合台的预热温度(Ts)控制得相同，从而能够适合于芯片布局方式。
此外，上述粘接层12的峰值顶点温度(Peak Temperature)可以为165±5℃，上述起始温度(Onset Temp.)与上述峰值顶点温度(Peak Temp.)间的温度差(ΔT)可以为25±5℃。这里，峰值顶点温度(Peak temp.)的含义是DSC图中的最高峰值温度。在粘接层12具有上述起始温度和峰值顶点温度特性的情况下，不仅能够通过芯片布局方式而确保最适合的物性，而且能够在高温下显示出稳定的固化特性。
上述粘接层12的厚度考虑粘接层的最低熔体粘度等而调节。作为一例，以上述半导体芯片与封装体基板间的间隔(例如，100％)为基准，粘接层12的厚度可以为80至120％范围。
本发明的粘接层12只要满足上述的熔体粘度(M.V)和起始温度(Onset Temp.)物性数值，则对构成上述粘接层12的成分及其组成等没有特别限制。这样的粘接层12可以由粘接树脂组合物的固化物或半固化物构成。作为上述粘接树脂组合物的具体例，包含(a)含有液态环氧树脂、苯氧基系树脂和多官能性环氧树脂的环氧树脂、(b)酸酐系固化剂、(c)含氮(N)杂环化合物、以及(d)填料(filler)。
更具体而言，本发明中，作为构成粘接层12的主树脂成分，将包含液态环氧树脂、苯氧基系树脂和多官能性环氧树脂在内的至少3种以上混用，并将它们的混合比率调节至预定范围。
至少3种以上的环氧树脂中，液态环氧树脂作为在25±5℃为液体状态的环氧树脂，是热固性树脂。这样的液态环氧树脂能够对粘接树脂组合物赋予粘接性、固化性，而且能够对固化后的粘接层赋予固化均匀性。
作为可使用的液态环氧树脂的非限制性例子，有液态双酚A型环氧树脂、液态双酚F型环氧树脂、液态萘型环氧树脂、液态氨基苯酚型环氧树脂、液态氢化双酚型环氧树脂、液态脂环式环氧树脂、液态醇醚型环氧树脂、液态环状脂肪族型环氧树脂、液态芴型环氧树脂、液态硅氧烷系环氧树脂等，其中，液态双酚A型环氧树脂、液态双酚F型环氧树脂、液态萘型环氧树脂从粘接性、固化性、耐久性、耐热性方面考虑是合适的。它们可以单独使用或两种以上混合使用。具体而言，作为液态环氧树脂的制品，有新日铁化学制双酚F型环氧树脂(制品名：YDF8170)、DIC制双酚A型环氧树脂(制品名：EXA-850CRP)、新日铁化学制双酚F型环氧树脂(制品名：YDF870GS)、DIC制萘型环氧树脂(制品名：HP4032D)、三菱化学制氨基苯酚型环氧树脂(等级：JER630、JER630LSD)、迈图高新制硅氧烷系环氧树脂(制品名：TSL9906)、新日铁化学株式会社制1,4-环己烷二甲醇二缩水甘油醚(制品名：ZX1658GS)等，但不限定于此。
苯氧树脂是在至少一侧末端含有环氧基的热塑性高分子，分子内环氧基与分子量相比当量非常小，因此虽参与固化，但在高温下可以赋予流动性。由于这样的苯氧树脂，因此本发明的粘接层能够在常温(约25±5℃)下按照半固化(B阶段(B-stage))状态的膜形状来形成。
作为可使用的苯氧树脂，只要是在高分子链内含有苯氧基且在至少一个末端含有环氧基的高分子就没有特别限定。
比如，苯氧树脂可以为以下化学式1所表示的化合物，但不特别限于此。
[化学式1]
Figure BDA0003229689160000101
上述化学式1中，
a和b分别为1至4的整数，
多个R1和多个R2彼此相同或不同，各自独立地选自由氢、卤素、C1～C10的烷基、C3～C20的环烷基、C5～C20的芳基和硝基组成的组，具体而言，各自独立地选自由氢、卤素、C1～C5的烷基、C3～C10的环烷基、C5～C10的芳基和硝基组成的组；
R3至R8彼此相同或不同，各自独立地为氢或羟基，其中，R3至R8中的至少一个为羟基；
X1为单键或者为C1～C10的亚烷基，具体为单键或者为C1～C5的亚烷基，
Y1和Y2彼此相同或不同，各自独立地为氢、羟基或环氧基，其中，Y1和Y2中的至少一个为环氧基，
n为30至400的整数。
此外，多官能性环氧树脂是含有至少2个以上的环氧基的环氧树脂。这样的多官能性环氧树脂对粘接层赋予电绝缘性、耐热性、化学稳定性、强度(toughness)以及成型性。
作为可使用的多官能性环氧树脂，只要是单位分子(单体)含有2个以上、具体2个至5个环氧基的环氧树脂就没有特别限定。作为多官能性环氧树脂的非限制性例子，有通过将苯酚或烷基酚类与羟基苯甲醛的缩合物环氧化而得到的环氧树脂、苯酚酚醛清漆型环氧树脂、甲酚酚醛清漆型环氧树脂、苯酚芳烷基型环氧树脂、联苯(biphenyl)型环氧树脂、双酚A型环氧树脂、双酚F型环氧树脂、线形脂肪族环氧树脂、脂环式环氧树脂、杂环式环氧树脂、含螺环的环氧树脂、XYLOK型环氧树脂、多官能型环氧树脂、酚醛树脂酚醛清漆型环氧树脂、双酚A/双酚F/双酚AD的酚醛清漆型环氧树脂、双酚A/双酚F/双酚AD的缩水甘油醚环氧树脂、双羟基联苯系环氧树脂、二环戊二烯系环氧树脂、萘系环氧树脂等。其中，优选在25±5℃时为非液态的多官能性环氧树脂。这里，所谓在25±5℃时为非液态，是指在25±5℃时为半固态或固态的环氧树脂，也包括接近于固态的环氧树脂。
构成上述粘接层12的至少3种环氧树脂、比如液态环氧树脂、苯氧基系树脂以及多官能性环氧树脂间的含量比率优选考虑粘接性和填充性等而调节至预定范围。例如，多官能性环氧树脂、苯氧基系树脂和液态环氧树脂间的使用比率(混合比率)可以为4:3～4:2～3重量比率，具体可以为4:3～3.5:2～2.5重量比率。在满足上述环氧树脂混合比率的情况下，通过将最低熔体粘度和固化开始的起始温度(Onset Temp.)控制至预定范围，从而能够通过改善粘接性和填充性而确保封装体的连接可靠性，且由于适合于芯片布局方式，因此能够通过半导体芯片移送和贴合工序的简化而提高生产效率。
构成本发明的粘接层12的粘接树脂组合物包含酸酐系固化剂。酸酐系固化剂能够使液态环氧树脂、苯氧树脂和多官能性环氧树脂中的至少一种固化，并且能够发挥熔剂(flux)特性。
作为可使用的酸酐系固化剂的非限制性例子，有四氢邻苯二甲酸酐、甲基四氢邻苯二甲酸酐、甲基六氢邻苯二甲酸酐、六氢邻苯二甲酸酐、三烷基四氢邻苯二甲酸酐、甲基环己烯二甲酸酐、邻苯二甲酸酐、马来酸酐、均苯四酸酐等，它们可以单独使用或两种以上混合使用。
上述酸酐固化剂的含量没有特别限制，可以在本领域公知的范围内适当调节。例如，以上述环氧树脂1当量基准，酸酐固化剂的含量可以为0.3至1.0酸酐当量范围，具体可以为0.4至0.7当量。
除了上述酸酐系固化剂以外，本发明的粘接树脂组合物可以进一步追加包含一种以上本领域中作为使环氧树脂固化的成分而已知的固化剂。例如，有间苯二胺、二氨基二苯基甲烷、二氨基二苯基砜等芳香族胺系固化剂；二乙三胺、三乙四胺等脂肪族胺系固化剂；苯酚芳烷基型酚醛树脂、苯酚酚醛清漆型酚醛树脂、XYLOK型酚醛树脂、甲酚酚醛清漆型酚醛树脂、萘酚型酚醛树脂、萜烯型酚醛树脂、多官能型酚醛树脂、二环戊二烯系酚醛树脂、萘型酚醛树脂、由双酚A和甲阶酚醛树脂合成的酚醛清漆型酚醛树脂等之类的酚系固化剂；双氰胺(dicyandiamide)等潜伏性固化剂等，它们可以单独使用或两种以上混合使用。
构成本发明的粘接层12的粘接用树脂组合物包含含氮(N)杂环化合物。含N杂环化合物作为能够促进固化的固化催化剂之一，不仅可以调节固化速度，还可以确保粘接层的高温稳定性。
这样的含氮(N)杂环化合物可以为选自由以下化学式2所表示的化合物和以下化学式3所表示的化合物组成的组中的一种以上。
[化学式2]
Figure BDA0003229689160000121
[化学式3]
Figure BDA0003229689160000122
上述化学式2和3中，
n1为1或2，
n2分别为0至2的整数，
X1至X6彼此相同或不同，各自独立地为N或C(R1)，其中，X1至X6中的1个以上为N，
Y1至Y6彼此相同或不同，各自独立地为N(R2)或C(R3)(R4)，其中，Y1至Y6中的1个以上为N(R2)，
此时，多个C(R1)彼此相同或不同，多个N(R2)彼此相同或不同，多个C(R3)(R4)彼此相同或不同，
R1、R2、R3和R4各自独立地选自由氢、氘(D)、卤素、氰基、硝基、C1～C20的烷基、C2～C20的烯基和C2～C20的炔基组成的组。
具体而言，上述化学式2中，X1至X6中的1～2个可以为N，其余可以为C(R1)。
此外，上述化学式3中，Y1至Y6中的1～2个可以为N(R2)，其余可以为C(R3)(R4)。
此外，上述化学式2和3中，R1、R2、R3和R4各自独立地可以选自由氢、氘(D)、卤素、氰基、硝基、C1～C12的烷基、C2～C12的烯基和C2～C12的炔基组成的组。
作为上述化学式2所表示的化合物的例子，有吡嗪系(pyrazine-based)化合物、吡啶系(pyridine-based)化合物、咪唑系(Imidazole-based)化合物等，但不限定于此。具体而言，上述化学式2所表示的化合物的非限制性例子可以为以下化学式2a所表示的化合物。
[化学式2a]
Figure BDA0003229689160000131
作为上述化学式3所表示的化合物的例子，有哌嗪系(piperazine-based)化合物等，但不限定于此。具体而言，上述化学式3所表示的化合物的非限制性例子可以为以下化学式3a所表示的化合物、以下化学式3b所表示的化合物。
[化学式3a]
Figure BDA0003229689160000132
[化学式3b]
Figure BDA0003229689160000133
作为一例，含N杂环化合物可以包含选自由吡嗪系(pyrazine-based)化合物、吡啶系(pyridine-based)化合物和哌嗪系(piperazine-based)化合物组成的组中的一种以上。
本发明的粘接树脂组合物中，含N杂环化合物的含量优选考虑所使用的酸酐系固化剂的种类及其含量来调节。例如，以上述酸酐固化剂1当量基准，上述含氮杂环化合物含量可以为0.005当量以上且小于0.02当量，具体可以为0.01至0.015当量。
形成本发明的粘接层12的粘接树脂组合物包含本领域公知的通常的填料(filler)。填料不仅能够通过表现出触变特性(thixotropic property)来调节熔体粘度，还能够在提高粘接性的同时降低热膨胀系数。
这样的填料可以为有机填料或无机填料。具体而言，作为无机填料，有金粉、银粉、铜粉、镍粉等之类的金属成分；氧化铝、氢氧化铱、氢氧化镁、碳酸钙、碳酸镁、硅酸钙、硅酸镁、氧化钙、氧化镁、氧化铝、氮化铝、二氧化硅、氮化硼、二氧化钛、玻璃、氧化铁、陶瓷等之类的非金属成分，作为有机填料，有碳、橡胶系填料、聚合物系填料等，但不限定于此。它们可以单独使用或两种以上混合使用。
填料的形状以及大小没有特别限制，比如，填料的形状可以为方形、球形等，平均粒径可以为约10至100nm范围。如果填料的平均粒径为上述范围，则能够进一步提高固化物的机械物性。作为一例，填料可以为具有约10至100nm的平均粒径的二氧化硅。
这样的填料的含量没有特别限定，比如，可以为将粘接树脂组合物的总量(例如，固体成分基准)调节成100重量％的余量，具体而言，以环氧树脂的总量(例如，100重量份)为基准，可以为约10～50重量份，具体可以为20至40重量份。在填料的含量处于上述数值范围的情况下，形成具有低热膨胀系数(CTE)的粘接层，因此基板与半导体元件间的热膨胀系数差异小而能够使翘曲(warpage)或裂纹(crack)产生最小化。
根据本发明的一具体例，关于形成粘接层12的粘接树脂组合物，以上述组合物的总重量(例如，100重量份)为基准，环氧树脂的含量(即，将多官能性环氧树脂、苯氧树脂和液态环氧树脂合计后的整体含量)以树脂组合物的总量为基准可以为约40～60重量％范围，酸酐系固化剂的含量以树脂组合物的总量为基准可以为约10～20重量％范围，含N杂环化合物的含量以树脂组合物的总量为基准可以为约0.1～0.5重量％范围。此外，可以包含满足上述组合物的总重量的余量的溶剂。这里，溶剂只要是满足上述组合物100重量份的余量就没有特别限制，例如，可以为30至60重量份，具体可以为30至50重量份。此时，构成整体环氧树脂的多官能性环氧树脂、苯氧树脂和液态环氧树脂间的使用比率(混合比率)可以为4:3～4:2～3重量比率。
上述溶剂只要与环氧树脂的混合性优异而能够使它们均匀地分散或将它们稳定地溶解就没有特别限定。作为这样的溶剂的例子，可以为水、有机溶剂或它们的混合溶剂，作为其非限制性例子，有甲基醇、乙基醇、异丙醇、丁基醇等之类的醇系溶剂；甲基溶纤剂(methyl cellosolve)、乙基溶纤剂、丁基溶纤剂、丙二醇单甲基醚、丙二醇单乙基醚、溶纤剂乙酸酯等之类的醚系溶剂；甲基乙基酮、环己酮、丙酮、二丙酮醇、作为酯类的乙酸甲酯、乙酸乙酯等之类的酮系溶剂；乙酸甲酯、乙酸乙酯等之类的酯系溶剂；氯仿、二氯甲烷、四氯乙烷等之类的卤代烃系溶剂等，此外，有二甲基亚砜、乙二醇、甘油、山梨糖醇、甲酰胺、N-甲基甲酰胺、N,N-二甲基甲酰胺、乙酰胺、N-甲基乙酰胺、N-二甲基乙酰胺、N,N-二甲基甲酰胺、四氢呋喃、N-甲基-2-吡咯烷酮、硝基甲烷、乙腈等。它们可以单独使用或两种以上混合使用。
具有上述组成的本发明的粘接层12不仅操作性容易，粘接力优异，而且在约150至160℃的最低熔体粘度低至约1000Pa.s以下，因此空隙产生最小化且填充性优异而能够提高连接可靠性。此外，由于将粘接层的起始温度(Onset Temp.)与贴合台的预热温度(Ts)调节得相同，因此适合于芯片布局方式而能够容易地实现半导体封装。
只要不损害上述粘接层的固有特性，那么本发明的粘接树脂组合物视需要可以根据上述组合物的使用目的以及使用环境而选择性进一步包含本领域公知的通常的添加剂。例如，有丙酮、甲基乙基酮、甲苯、乙酸乙酯等溶剂、增粘剂、偶联剂、抗静电剂、密合力增强剂、润湿性增强剂、流平增强剂等，但不限定于此。这样的添加剂的含量没有特别限定，可以按照本技术领域已知的通常的范围来使用。比如，以上述树脂组合物的总量为基准，可以为约0.01至10重量％。
上述粘接树脂组合物可以通过本技术领域通常已知的方法来制造。比如，可以将液态环氧树脂、苯氧树脂、多官能性环氧树脂、酸酐系固化剂、含N杂环化合物、填料以及选择性的添加剂使用球磨机、珠磨机、3辊磨机(3roll mill)、篮式磨机(basket mill)、研磨机(dyno mill)、行星式磨机(planetary)等混合设备在室温至适当升温后的温度下混合并搅拌而制造粘接树脂组合物。
本发明的底部填充膜可以根据本技术领域已知的通常的方法来制造。比如，可以通过如下方式来制造底部填充膜：将通过上述方法得到的粘接树脂组合物根据需要利用能够进行稀释的有机溶剂进行稀释而调成容易进行涂膜制造的适当浓度后，将其在基材上涂布并干燥。
关于上述涂布并干燥的方式，只要是能够通过棒涂、凹版涂布、缺角辊涂布、逆转辊涂布、辊刀涂布、模涂、模唇涂布等形成涂膜的方法就没有特别限定。
如上构成的本发明的底部填充膜的最低熔体粘度低，因此在半导体芯片与封装体基板间的预贴合时使空隙产生最小化，且填充性优异而能够提高封装体的连接可靠性，而且能够应用于微小间距(fine pitch)。此外，由于采用芯片布局方式，因此与以往不同，可以通过将半导体芯片的移送以及贴合工序简化而实施批量回流(mass reflow)工序。
以下，对图2所示的本发明的第二实施例的底部填充膜10B进行说明。
如图2所示，本发明的底部填充膜10B可以包含基材(以下，称为“第一基材”)11；配置在上述基材的一面上的粘接层12；以及配置在上述粘接层12的另一面的另一基材(以下，称为“第二基材”)13。
本发明中可使用的第一基材11和粘接层12与第一实施例的基材和粘接层部分中记载的相同，因此省略。
本发明中，第二基材13是配置在粘接层13的另一面而支撑粘接层并且保护粘接层的表面的部分，能够剥离，因此在使用膜时会被剥离而去除。
这样的第二基材13与第一基材相同或不同，对于第二基材的例子的说明与第一实施例的基材部分中记载的相同，因此省略。
<半导体封装体的制造方法>
本发明的另一实施例提供利用上述底部填充膜10A、10B的多种半导体封装体的制造方法。
特别是，上述底部填充膜10A、10B的粘接层不仅在约150～160℃时最低熔体粘度低至约1000Pa.s以下，而且粘接层的起始温度(Onset Temp.)与贴合台的预热温度实质相同，因此即使在预定条件下实施压接(预贴合(pre-bonding))，也会因粘接层容易具备流动性而能够无空隙地填充半导体芯片与封装体基板间的间隙(gap)，由此能够提高半导体封装体的连接可靠性。因此，本发明通过利用上述底部填充膜，不仅能够简化半导体封装体的制造工序，而且能够提高生产效率，并且制造连接可靠性优异的半导体封装体。
特别是，以往在半导体封装中需要分别对实现贴合的贴合台和贴片机头施加特定高温和高压。与此相比，本发明中通过使用调节至上述物性的底部填充膜，从而即使不对贴片机头(Die Bonder Head)另外施加高温，也能够完全实施半导体封装，因此能够通过制造工序的简化以及费用削减而提高生产率。此外，由于之后实施回流工序而以空隙达到最小的状态来实施电连接，因此能够提高封装体的可靠性。
以下，对本发明的一实施方式的半导体封装体的制造方法进行说明。但是，上述半导体封装体不仅限于以下制造方法，可以根据本领域公知的通常的方法来无限制地制造。根据需要可以改变或选择性混用各工序的步骤来实施。
根据上述半导体封装体的制造方法的一实施例，可以包括：(i)在具备凸点的半导体芯片的凸点上附着上述底部填充膜的粘接层的步骤(“S100步骤”)；(ii)拾取附着有上述粘接层的半导体芯片的凸点并使其在支撑于贴合台上的封装体基板的贴合焊盘上对准的步骤(“S200步骤”)；(iii)将对准后的半导体芯片和封装体基板投入至加压室烘箱中的步骤(“S300步骤”)；(iv)使上述半导体芯片的凸点熔融而使半导体芯片与封装体基板连接的步骤(“S400步骤”)；以及(v)使配置在上述连接后的半导体芯片与封装体基板之间的粘接层固化的步骤(“S500步骤”)。
以下，参照图3至图6，将本发明的半导体封装体的制造方法分成不同的工序步骤来进行说明，内容如下。
(a)将粘接层配置于半导体芯片的步骤
如图3所示，在具备凸点21的半导体芯片20的凸点21上配置上述底部填充膜10A、10B的粘接层12(以下，称为“S100步骤”)。
一般而言，在半导体芯片20上沿芯片的边缘形成有用于将内部的电子电路与外部连接的端子(焊盘)(未图示)，而且根据需要可以沿芯片的中央形成有1列或2列。
在这样的半导体芯片的端子上分别形成有凸点(bump)21。上述凸点作为封装时将基板与半导体芯片点连接的外部端子，有焊料凸点(solder bump)或金凸点(Au bump)等。
本发明中，如图3所示，从上述底部填充膜10A、10B将基材11、13分离后，仅将粘接层12配置于半导体芯片的凸点21侧。此时，可以按照约30～100N的压力使具备凸点21的半导体芯片20加压层叠在粘接层12上。此外，需要时，可以使上述半导体芯片20在低于粘接层的起始温度(onset temperature)的温度、比如50～150℃的温度下加压层叠。由此，粘接层以半固化状态(B阶段)压接在半导体芯片的凸点上。此时，粘接层不仅可以起到底部填充的作用，也可以起到熔剂(flux)的作用，因此本发明与以往不同，无需利用熔剂(flux)来洗涤凸点。
(b)半导体芯片和基板的对准步骤
使上述S100步骤中压接有粘接层12的半导体芯片20在封装体基板30上对准(以下，称为“S200步骤”)。
具体而言，本发明中，作为半导体芯片的移送工序以及将移送后的半导体芯片在被贴合台支撑的封装体基板上对准并附着的工序，应用芯片布局(Chip Placement)方式。
此时，安放封装体基板的贴合台优选预先被预热至与上述底部填充膜所具备的粘接层的起始温度(Onset Temp.)实质相同的设定温度(Ts)。例如，贴合台的预热温度(Ts)可以为145±5℃。
上述被贴合台支撑的封装体基板30可以无限制地使用本领域公知的通常的基板。例如，作为至少一面形成有电路图案(未图示)的基板，比如可以为印刷电路基板(PCB)。这样的封装体基板30在与半导体芯片20的凸点21位置相对应的区域形成有贴合焊盘31。
本发明中，如图4所示，以形成有凸点21的半导体芯片20排列在贴合焊盘31上的方式，在封装体基板30上搭载半导体芯片20。具体而言，可以在约130～150℃的贴合台温度、常温(RT)的贴片机头、10～200N、1～5秒的条件下，将半导体芯片20的凸点21加压于封装体基板30的贴合焊盘31上，从而使封装体基板30与半导体芯片20预贴合(pre-bonding)。此时，配置在半导体芯片20与封装体基板30之间的粘接层12如上所述因最低熔体粘度低而流动。
另一方面，本发明中，粘接层12含有可以起到熔剂功能的成分，因此与以往不同，无需在S200步骤前将熔剂(flux)涂布于封装体基板30的贴合焊盘31。因此，本发明中，能够省略对于贴合焊盘的熔剂涂布工序以及熔剂洗涤工序。
(c)空隙去除步骤
将在S200步骤中对准的半导体芯片和封装体基板在预定条件下投入至加压室烘箱(pressure chamber oven，PCO)中(以下，称为“S300步骤”)。
上述加压室烘箱的条件没有特别限制，例如，可以在约100至200℃、具体约110至150℃的烘箱中将空隙(void)去除。
(d)凸点的熔融步骤
如图5所示，使半导体芯片20的凸点21熔融而将半导体芯片20与封装体基板30电连接、机械连接(以下，称为“S400步骤”)。
作为将凸点回流(reflow)的步骤，凸点熔融而半导体芯片20与封装体基板30电连接、机械连接。
此时，配置在半导体芯片20与封装体基板30之间的粘接层12也一起熔融，因而粘接层内空隙面积比变小。例如，回流工序后上述粘接层12内空隙面积比每1m2可以为1％以下。由此，能够进一步提高根据本发明制造的半导体封装体的连接可靠性。
(e)粘接层的固化步骤
如图6所示，使配置在上述S300步骤中连接的半导体芯片20与封装体基板30之间的粘接层12固化(以下，称为“S500步骤”)。
本发明的粘接层12具有约145±5℃的起始温度，因此S400步骤可以在高于上述起始温度的温度、比如在约160℃以上、具体在160至250℃实施。
粘接层的固化时间可以根据固化温度来适当调节，例如，可以为约0.5至3小时。
接着，根据需要，可以实施本领域公知的后续工序。例如，可以将封装体基板切割成单元基板形态而进行单片化。此时，将印刷电路基板形态的封装体基板完全切割成封装体单元的工序可以利用本领域已知的通常的工序、比如锯片(blade)或激光切割(lasercutting)等来实施。
以下，通过实施例来具体说明本发明，但以下实施例和实验例仅是例示本发明的一方式，本发明的范围不限于以下实施例和实验例。
[实施例1]
1-1.粘接树脂组合物的制造
按照以下表1中记载的组成将各成分混合而制造实施例1的粘接树脂组合物。表1中记载的各成分的含量单位为重量份(重量比率)，具体而言，填料的含量以环氧树脂100重量份为基准。此外，固化剂以环氧基1当量为基准设定其含量，催化剂的含量以所使用的固化剂1当量为基准。
1-2.底部填充膜的制造
在PET脱模膜(厚度：38μm)的一面上，模涂实施例1-1中制造的各个粘接用树脂组合物，然后干燥而形成粘接层(厚度：18μm)，从而制造非导电性粘接膜。
[表1]
Figure BDA0003229689160000211
[实验例1：物性评价]
如下测定实施例1中制造的底部填充膜的物性，将测定结果示于上述表1中。
1)起始温度(Onset Temperature)
利用差示扫描量热分析仪(Differential Scanning Calorimetry，DSC)测定底部填充膜的粘接层的起始温度。
2)熔体粘度(Melt Viscosity)
利用流变仪(Rheometer)将底部填充膜的粘接层的温度按照每分钟10℃从50℃提高至300℃，同时测定粘度。
[实验例2：封装评价]
利用实施例1中制造的底部填充膜根据芯片布局方式实施半导体封装后，评价它们被封装后的贴合截面。
图7是半导体芯片的凸点与封装体基板的贴合焊盘预贴合(pre-bonding)以及投入至加压室烘箱(PCO)后的粘接层的俯视照片。可知PCO之后，粘接层内空隙(void)面积骤减。
此外，图8是回流(Reflow)工序之后底部填充膜的粘接层被固化后的截面照片。
实验结果，可以确认到本发明的底部填充膜不仅在固化之后，即使是在预贴合的状态，半导体芯片的凸点与封装体基板的贴合焊盘也稳定地形成了贴合(参照以下图8)。

Claims (15)

1.一种半导体封装体用底部填充膜，其包含：
基材；以及
配置在所述基材的一面、150至160℃时的熔体粘度为300至1000Pa.s、且差示扫描量热分析仪DSC上起始温度为145±5℃的粘接层。
2.根据权利要求1所述的半导体封装体用底部填充膜，所述底部填充膜用于芯片布局方式，所述芯片布局方式为：拾取附着有所述粘接层的半导体芯片而附着于被贴合台支撑的封装体基板上。
3.根据权利要求2所述的半导体封装体用底部填充膜，所述粘接层的起始温度与预设定的贴合台的预热温度Ts实质相同。
4.根据权利要求2所述的半导体封装体用底部填充膜，所述粘接层的厚度为所述半导体芯片与所述封装体基板间的间隔的80至120％范围。
5.根据权利要求1所述的半导体封装体用底部填充膜，
所述粘接层的差示扫描量热分析仪DSC上峰值顶点温度为165±5℃，
所述起始温度与所述峰值顶点温度之差为25±5℃。
6.根据权利要求1所述的半导体封装体用底部填充膜，所述粘接层为粘接树脂组合物的固化物或半固化物，所述粘接树脂组合物包含：
(a)含有液态环氧树脂、苯氧树脂和多官能性环氧树脂的环氧树脂；
(b)酸酐系固化剂；
(c)含氮(N)杂环化合物；以及
(d)填料。
7.根据权利要求6所述的半导体封装体用底部填充膜，所述多官能性环氧树脂、苯氧树脂和液态环氧树脂的混合比率为4:3～4:2～3重量比率。
8.根据权利要求6所述的半导体封装体用底部填充膜，以所述环氧树脂1当量基准，所述酸酐固化剂的含量为0.3至1.0酸酐当量范围。
9.根据权利要求6所述的半导体封装体用底部填充膜，以所述酸酐固化剂1当量基准，所述含氮杂环化合物的含量为0.005当量以上且小于0.02当量。
10.一种半导体封装体的制造方法，其包括：
(i)在具备凸点的半导体芯片的凸点上附着权利要求1至9中任一项所述的底部填充膜的粘接层的步骤；
(ii)拾取附着有所述粘接层的半导体芯片的凸点而使其在支撑于贴合台上的封装体基板的贴合焊盘上对准的步骤；
(iii)将对准后的半导体芯片和封装体基板投入至加压室烘箱中的步骤；
(iv)使所述半导体芯片的凸点熔融而使半导体芯片与封装体基板连接的步骤；以及
(v)使配置在所述连接后的半导体芯片与封装体基板之间的粘接层固化的步骤。
11.根据权利要求10所述的半导体封装体的制造方法，所述步骤(ii)中的拾取以及对准通过芯片布局方式来实施。
12.根据权利要求10所述的半导体封装体的制造方法，所述步骤(ii)的贴合台被预热至与所述底部填充膜所具备的粘接层的起始温度实质相同的设定温度Ts。
13.根据权利要求10所述的半导体封装体的制造方法，所述步骤(ii)中的凸点与贴合焊盘间的对准通过在130～150℃的贴合台温度、常温的贴片机头、10～200N、1～5秒的条件下进行压接来实施。
14.根据权利要求10所述的半导体封装体的制造方法，所述步骤(iv)中，凸点的熔融步骤之后，所述粘接层内空隙面积比为1.0％以下。
15.根据权利要求10所述的半导体封装体的制造方法，所述步骤(v)中的粘接层的固化温度为160至250℃范围。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117567973A (zh) * 2024-01-16 2024-02-20 深圳先进电子材料国际创新研究院 一种高Tg底部填充胶及其制备方法

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3384357B2 (ja) 1999-04-13 2003-03-10 日立電線株式会社 液晶ポリマーテープの接着方法、およびリードフレームへの半導体チップの搭載方法
DE60036038T2 (de) 1999-06-18 2008-04-30 Hitachi Chemical Co., Ltd. Klebstoff, Klebstoffgegenstand, Schaltungssubstrat für Halbleitermontage mit einem Klebstoff und eine Halbleiteranordnung die diesen Enthält
US6919420B2 (en) 2002-12-05 2005-07-19 International Business Machines Corporation Acid-cleavable acetal and ketal based epoxy oligomers
US7166491B2 (en) * 2003-06-11 2007-01-23 Fry's Metals, Inc. Thermoplastic fluxing underfill composition and method
JP2013219286A (ja) * 2012-04-11 2013-10-24 Hitachi Chemical Co Ltd 半導体封止用接着剤及びフィルム状半導体封止用接着剤
KR20160045628A (ko) * 2013-08-22 2016-04-27 세키스이가가쿠 고교가부시키가이샤 반도체용 접착제
JP6129696B2 (ja) * 2013-09-11 2017-05-17 デクセリアルズ株式会社 アンダーフィル材、及びこれを用いた半導体装置の製造方法
US10639210B2 (en) * 2013-12-19 2020-05-05 The Procter & Gamble Company Article with tackifier-free adhesive
CN105874030B (zh) * 2014-01-02 2019-07-26 汉高知识产权控股有限责任公司 含有纳米微粒填料的膜
JP6438790B2 (ja) * 2015-02-06 2018-12-19 デクセリアルズ株式会社 半導体装置の製造方法、及びアンダーフィルフィルム
JP6438340B2 (ja) 2015-04-08 2018-12-12 積水化学工業株式会社 半導体接合用接着フィルム及び半導体装置の製造方法
WO2017062586A1 (en) 2015-10-07 2017-04-13 Henkel IP & Holding GmbH Formulations and the use for 3d tsv packages
JP6670156B2 (ja) * 2016-04-05 2020-03-18 リンテック株式会社 回路部材接続用シートおよび半導体装置の製造方法
JP2017197688A (ja) * 2016-04-28 2017-11-02 三井化学東セロ株式会社 アンダーフィル用絶縁フィルム
JP2018160566A (ja) * 2017-03-23 2018-10-11 三井化学東セロ株式会社 ギャングボンディングプロセス用アンダーフィル絶縁フィルム
JP7233377B2 (ja) * 2017-11-17 2023-03-06 リンテック株式会社 熱硬化性樹脂フィルム及び第１保護膜形成用シート
JP6974137B2 (ja) * 2017-11-27 2021-12-01 積水化学工業株式会社 導電材料、接続構造体及び接続構造体の製造方法
JP7400714B2 (ja) * 2018-05-25 2023-12-19 株式会社レゾナック アンダーフィル材、半導体パッケージ及び半導体パッケージの製造方法
KR102530763B1 (ko) * 2018-09-21 2023-05-11 삼성전자주식회사 반도체 패키지의 제조방법
KR102584266B1 (ko) * 2019-05-10 2023-10-05 주식회사 엘지화학 반도체 회로 접속용 접착제 조성물, 이를 이용한 반도체용 접착 필름, 반도체 패키지 제조방법 및 반도체 패키지
TWI713181B (zh) * 2019-10-01 2020-12-11 昇貿科技股份有限公司 將球柵陣列封裝元件焊接於電路基板的方法、及適用於所述方法的熱固性樹脂組合物

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117567973A (zh) * 2024-01-16 2024-02-20 深圳先进电子材料国际创新研究院 一种高Tg底部填充胶及其制备方法
CN117567973B (zh) * 2024-01-16 2024-04-09 深圳先进电子材料国际创新研究院 一种高Tg底部填充胶及其制备方法

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