CN114467180A - 半导体装置以及半导体装置的制造方法 - Google Patents

半导体装置以及半导体装置的制造方法 Download PDF

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Publication number
CN114467180A
CN114467180A CN202180005478.1A CN202180005478A CN114467180A CN 114467180 A CN114467180 A CN 114467180A CN 202180005478 A CN202180005478 A CN 202180005478A CN 114467180 A CN114467180 A CN 114467180A
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region
peak
semiconductor substrate
donor
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Chinese (zh)
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洼内源宜
吉村尚
泷下博
内田美佐稀
根本道生
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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    • HELECTRICITY
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    • H10P32/00Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10Diffusion of dopants within, into or out of semiconductor bodies or layers
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    • HELECTRICITY
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    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01Manufacture or treatment
    • H10D12/031Manufacture or treatment of IGBTs
    • H10D12/032Manufacture or treatment of IGBTs of vertical IGBTs
    • H10D12/038Manufacture or treatment of IGBTs of vertical IGBTs having a recessed gate, e.g. trench-gate IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/441Vertical IGBTs
    • H10D12/461Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • HELECTRICITY
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    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/441Vertical IGBTs
    • H10D12/491Vertical IGBTs having both emitter contacts and collector contacts in the same substrate side
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    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
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    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
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    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
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    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
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    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393Body regions of DMOS transistors or IGBTs 
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    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/50Physical imperfections
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    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/617Combinations of vertical BJTs and only diodes
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    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
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    • H10P30/208Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
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    • H10P30/21Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
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    • H10P30/00Ion implantation into wafers, substrates or parts of devices
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    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/28Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by an annealing step, e.g. for activation of dopants
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    • H10P32/00Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
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    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00Grinding, lapping or polishing of wafers, substrates or parts of devices
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    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/111Field plates
    • H10D64/117Recessed field plates, e.g. trench field plates or buried field plates
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    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811Combinations of field-effect devices and one or more diodes, capacitors or resistors

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  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
CN202180005478.1A 2020-04-01 2021-04-01 半导体装置以及半导体装置的制造方法 Pending CN114467180A (zh)

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JP2020-066314 2020-04-01
JP2020066314 2020-04-01
PCT/JP2021/014179 WO2021201235A1 (ja) 2020-04-01 2021-04-01 半導体装置および半導体装置の製造方法

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US (1) US20220216055A1 (https=)
JP (1) JP7452632B2 (https=)
CN (1) CN114467180A (https=)
DE (1) DE112021000165T5 (https=)
WO (1) WO2021201235A1 (https=)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7001104B2 (ja) * 2017-12-14 2022-01-19 富士電機株式会社 半導体装置
US20230049926A1 (en) * 2021-08-13 2023-02-16 Semiconductor Components Industries, Llc Epitaxial field stop region for semiconductor devices

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107408581A (zh) * 2015-09-16 2017-11-28 富士电机株式会社 半导体装置及半导体装置的制造方法
CN109075191A (zh) * 2016-10-17 2018-12-21 富士电机株式会社 半导体装置
US20200152778A1 (en) * 2018-01-17 2020-05-14 Fuji Electric Co., Ltd. Semiconductor device

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Publication number Priority date Publication date Assignee Title
JP5104314B2 (ja) * 2005-11-14 2012-12-19 富士電機株式会社 半導体装置およびその製造方法
JP5817686B2 (ja) * 2011-11-30 2015-11-18 株式会社デンソー 半導体装置
DE102013216195B4 (de) 2013-08-14 2015-10-29 Infineon Technologies Ag Verfahren zur Nachdotierung einer Halbleiterscheibe
US9754787B2 (en) * 2014-06-24 2017-09-05 Infineon Technologies Ag Method for treating a semiconductor wafer
WO2016204227A1 (ja) * 2015-06-17 2016-12-22 富士電機株式会社 半導体装置および半導体装置の製造方法
JP6477897B2 (ja) * 2015-09-16 2019-03-06 富士電機株式会社 半導体装置および半導体装置の製造方法
DE102016102861B3 (de) * 2016-02-18 2017-05-24 Infineon Technologies Ag Halbleiterbauelemente und Verfahren zum Bilden eines Halbleiterbauelements
DE112019000094T5 (de) * 2018-03-19 2020-09-24 Fuji Electric Co., Ltd. Halbleitervorrichtung und verfahren zum herstellen einerhalbleitervorrichtung
JP6958740B2 (ja) * 2018-08-14 2021-11-02 富士電機株式会社 半導体装置および製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107408581A (zh) * 2015-09-16 2017-11-28 富士电机株式会社 半导体装置及半导体装置的制造方法
CN109075191A (zh) * 2016-10-17 2018-12-21 富士电机株式会社 半导体装置
US20200152778A1 (en) * 2018-01-17 2020-05-14 Fuji Electric Co., Ltd. Semiconductor device

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DE112021000165T5 (de) 2022-07-28
US20220216055A1 (en) 2022-07-07
JPWO2021201235A1 (https=) 2021-10-07
WO2021201235A1 (ja) 2021-10-07

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