CN113341296B - 一种基于ate的soc芯片测试方法 - Google Patents
一种基于ate的soc芯片测试方法 Download PDFInfo
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- CN113341296B CN113341296B CN202110532131.4A CN202110532131A CN113341296B CN 113341296 B CN113341296 B CN 113341296B CN 202110532131 A CN202110532131 A CN 202110532131A CN 113341296 B CN113341296 B CN 113341296B
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- 238000012360 testing method Methods 0.000 title claims abstract description 102
- 238000010586 diagram Methods 0.000 claims description 15
- 238000010998 test method Methods 0.000 claims description 7
- 239000013598 vector Substances 0.000 claims description 7
- 238000013461 design Methods 0.000 claims description 5
- 238000001228 spectrum Methods 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 11
- 238000004519 manufacturing process Methods 0.000 abstract description 7
- 238000005070 sampling Methods 0.000 abstract description 6
- 230000010354 integration Effects 0.000 abstract description 5
- 230000001427 coherent effect Effects 0.000 abstract description 3
- 230000006870 function Effects 0.000 description 7
- 238000012545 processing Methods 0.000 description 4
- 238000011161 development Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000012954 risk control Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000011664 signaling Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
- G01R31/2889—Interfaces, e.g. between probe and tester
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
- G01R31/2834—Automated test systems [ATE]; using microprocessors or computers
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- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
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Priority Applications (1)
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CN202110532131.4A CN113341296B (zh) | 2021-05-17 | 2021-05-17 | 一种基于ate的soc芯片测试方法 |
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CN202110532131.4A CN113341296B (zh) | 2021-05-17 | 2021-05-17 | 一种基于ate的soc芯片测试方法 |
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CN113341296A CN113341296A (zh) | 2021-09-03 |
CN113341296B true CN113341296B (zh) | 2022-12-27 |
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Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN114035557A (zh) * | 2021-11-19 | 2022-02-11 | 西安太乙电子有限公司 | 一种用于RapidIO协议器件的测试系统及方法 |
CN117491842A (zh) * | 2023-11-02 | 2024-02-02 | 珠海电科星拓科技有限公司 | 一种优化dc参数准确性且缩短测试时间的方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103684453A (zh) * | 2012-08-31 | 2014-03-26 | 复旦大学 | 一种模数变换器集成芯片量产测试方法 |
CN110708047A (zh) * | 2019-08-29 | 2020-01-17 | 上海御渡半导体科技有限公司 | 一种基于tdc芯片测量高速比较器精度的结构及方法 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7724014B2 (en) * | 2008-02-15 | 2010-05-25 | Texas Instruments Incorporated | On-chip servo loop integrated circuit system test circuitry and method |
US8386209B2 (en) * | 2008-06-20 | 2013-02-26 | University Of Limerick | Testing system |
US8659309B2 (en) * | 2010-01-26 | 2014-02-25 | Scott Lawrence Howe | Mixed signal integrated circuit, with built in self test and method |
CN102207535B (zh) * | 2010-03-30 | 2014-04-30 | 上海摩波彼克半导体有限公司 | 对含adc和dac的模拟基带芯片自动测试的电路结构及方法 |
CN102788947A (zh) * | 2011-05-17 | 2012-11-21 | 联咏科技股份有限公司 | 测试芯片及其芯片测试系统 |
US8543960B1 (en) * | 2012-05-31 | 2013-09-24 | International Business Machines Corporation | Power and timing optimization for an integrated circuit by voltage modification across various ranges of temperatures |
CN103457603B (zh) * | 2013-09-09 | 2017-03-29 | 江南大学 | 一种基于平均频谱测试adc动态参数的方法 |
CN103559110A (zh) * | 2013-11-01 | 2014-02-05 | 珠海全志科技股份有限公司 | Soc芯片lvds接口测试方法及装置 |
CN104572383B (zh) * | 2014-11-28 | 2017-05-03 | 深圳市芯海科技有限公司 | 一种基于ate的mcu/soc芯片的测试方法 |
CN107390109B (zh) * | 2017-06-09 | 2019-12-24 | 苏州迅芯微电子有限公司 | 高速adc芯片的自动测试平台及其软件架构设计方法 |
CN109725250B (zh) * | 2019-01-04 | 2021-07-13 | 珠海亿智电子科技有限公司 | 一种片上系统芯片模拟电路的测试系统及测试方法 |
CN111025134A (zh) * | 2019-12-30 | 2020-04-17 | 北京自动测试技术研究所 | 一种片上系统芯片的测试方法及系统 |
CN111596201B (zh) * | 2020-05-25 | 2022-10-25 | 上海岱矽集成电路有限公司 | 一种用数字通道供电的方法 |
CN112782562A (zh) * | 2021-01-05 | 2021-05-11 | 珠海欧比特宇航科技股份有限公司 | 基于ate的soc芯片低电压差分信号测试方法及装置 |
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- 2021-05-17 CN CN202110532131.4A patent/CN113341296B/zh active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103684453A (zh) * | 2012-08-31 | 2014-03-26 | 复旦大学 | 一种模数变换器集成芯片量产测试方法 |
CN110708047A (zh) * | 2019-08-29 | 2020-01-17 | 上海御渡半导体科技有限公司 | 一种基于tdc芯片测量高速比较器精度的结构及方法 |
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PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of invention: A Test Method of SOC Chip Based on ATE Effective date of registration: 20230222 Granted publication date: 20221227 Pledgee: Shanghai Rural Commercial Bank Co.,Ltd. Songjiang sub branch Pledgor: SHANGHAI KEHAI HUATAI SHIP ELECTRIC CO.,LTD. Registration number: Y2023310000039 |
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Granted publication date: 20221227 Pledgee: Shanghai Rural Commercial Bank Co.,Ltd. Songjiang sub branch Pledgor: SHANGHAI KEHAI HUATAI SHIP ELECTRIC CO.,LTD. Registration number: Y2023310000039 |