CN113241371A - 一种具有超高隔离电压的智能型超结mos及其制造方法 - Google Patents

一种具有超高隔离电压的智能型超结mos及其制造方法 Download PDF

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CN113241371A
CN113241371A CN202110532789.5A CN202110532789A CN113241371A CN 113241371 A CN113241371 A CN 113241371A CN 202110532789 A CN202110532789 A CN 202110532789A CN 113241371 A CN113241371 A CN 113241371A
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何军
胡兴正
薛璐
刘海波
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Chuzhou Huarui Microelectronics Technology Co ltd
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Abstract

本发明涉及超结MOS制造领域，公开了一种具有超高隔离电压的智能型超结MOS及其制造方法，其技术方案要点是包括集成连接在一个芯片上的主MOS、电阻R以及若干功能MOS，所述功能MOS设置在所述主MOS的范围内，所述功能MOS在芯片上的分布包括功能MOS隔离区和设置在所述功能隔离区内部的功能MOS有源区，所述功能MOS隔离区包括相邻间隔且呈环形设置的P型掺杂区和N型掺杂区，所述功能MOS有源区和主MOS包括若干组相互平行且间隔设置的P型掺杂区和N型掺杂区。

Description

一种具有超高隔离电压的智能型超结MOS及其制造方法
技术领域
本发明涉及超结MOS制造领域，更具体地说，它涉及一种具有超高隔离电压的智能型超结MOS及其制造方法。
背景技术
智能型超结MOS产品是在普通超结产品的基础上，集成了采样MOS、启动MOS、高阻R，或者只集成采样MOS与启动MOS中的一个MOS，普通超结与智能型超结电路示意图对比如图4所示；
智能型超结MOS产品，在同一颗芯片上，会有2~3个MOS，应用电路要求MOS间功能独立，工作状态下互不影响；超结产品是由多组P/N柱交替连接构成，因此采样MOS、启动MOS的隔离设计中，P/N柱在排列设计时，需要考虑到MOS间隔离电压和管芯的耐压；
目前市场上对于超结产品的设计其P/N柱为简单的纵横交叉的排布设计，即如图3所示，此种设计可以满足管芯耐压的需求，但是MOS间隔离电压只有不到10V，如图4所示，耐压曲线几乎为阻性曲线，经分析，此种设计时，采样MOS、动MOS的有源区在经过工艺高温退火过程后，与主MOS的有源区是相连的，因此，MOS间并没有真正的隔离，所以隔离电压非常低。
发明内容
本发明的目的是提供一种具有超高隔离电压的智能型超结MOS及其制造方法，能够保持功能MOS隔离区内部的功能MOS有源区的独立性，因此可以保证超高的隔离电压。
本发明的上述技术目的是通过以下技术方案得以实现的：一种具有超高隔离电压的智能型超结MOS，包括集成连接在一个芯片上的主MOS、电阻R以及若干功能MOS，其特征是：所述功能MOS设置在所述主MOS的范围内，所述功能MOS在芯片上的分布包括功能MOS隔离区和设置在所述功能隔离区内部的功能MOS有源区，所述功能MOS隔离区包括相邻间隔且呈环形设置的P型掺杂区和N型掺杂区，所述功能MOS有源区和主MOS包括若干组相互平行且间隔设置的P型掺杂区和N型掺杂区。
作为本发明的一种优选技术方案，所述主MOS在芯片上的分布包括主MOS终端区和设置在所述主MOS终端区内部的主MOS有源区；所述功能MOS设置在所述主MOS有源区的范围内；
作为本发明的一种优选技术方案，所述功能MOS之间的工作状态相互独立。
作为本发明的一种优选技术方案，所述功能MOS包括采样MOS和/或启动MOS。
一种具有超高隔离电压的智能型超结MOS的制造方法，包括如下步骤：
在n型衬底片上形成外延层，得到外延片；
在外延片上形成氧化层，并进行JFET光刻及JFET注入，得到JFET注入片；
对JFET注入片进行二氧化硅淀积，再进行光刻和刻蚀，在外延层上形成深沟槽，并在深沟槽内进行P型外延回填，得到具有主MOS、功能MOS的隔离结构的智能型超结器件P/N结构片；
对超结器件P/N结构片，在MOS有源区位置进行选择性曝光后进行注入、体区退火，形成P型体区片；
对P型体区片，进行氧化层生长，并对有源区进行曝光和腐蚀，得到主MOS终端机隔离终端完备的产品片；
对产品片进行栅极氧化、沉积多晶并进行掺杂、多晶光刻、多晶刻蚀，形成器件的栅极结构，得到带有栅极的结构片；
对带有栅极的结构片，进行N+光刻、N+注入及N+推阱，形成MOS器件的N+源极结构，得到带有源极结构的结构片；
对带有源极结构的结构片，淀积一层介质，并进行光刻腐蚀，在MOS源极区、栅极区的位置开孔，得到具有通孔的结构片；
对具有通孔的结构片，淀积一层金属，并进行光刻、腐蚀，分隔开源极金属及栅极金属，得到具有金属电极的结构片；
对具有金属电极的结构片，淀积一层氮化硅，并进行光刻、腐蚀，将部分栅极区、源极区打开，正面工艺完成，得到正面结构完备的结构片；
对正面结构完备的结构片，进行背面减薄、背面金属蒸发，在圆片背面制作出漏极，得到正背面结构均完备的产品片。
综上所述，本发明具有以下有益效果：通过将功能MOS隔离区的P型掺杂区和N型掺杂区采用封闭的环形设计，这样的设计在经过制作工艺的高温退火环节后，仍能保持功能MOS隔离区内部的功能MOS有源区的独立性，因此可以保证超高的隔离电压。
附图说明
图1是本发明的结构示意图；
图2是本发明的功能MOS和主MOS在芯片上的分布图；
图3是现有的智能型超结MOS产品结构图；
图4是普通智能超结MOS产品（左图）和本发明的智能超结MOS产品（右图）电路图；
图5是普通智能超结MOS产品（a）和本发明的智能超结MOS产品（b）的隔离电压测试结果对比示意图。
图中：1、功能MOS有源区；2、功能MOS隔离区；3、主MOS有源区；4、主MOS终端区。
具体实施方式
以下结合附图对本发明作进一步详细说明。
如图1-5所示，本发明提供一种具有超高隔离电压的智能型超结MOS，包括集成连接在一个芯片上的主MOS、电阻R以及若干功能MOS，功能MOS设置在主MOS的范围内，功能MOS在芯片上的分布包括功能MOS隔离区和设置在功能隔离区内部的功能MOS有源区，功能MOS隔离区包括相邻间隔且呈环形设置的P型掺杂区和N型掺杂区，功能MOS有源区和主MOS包括若干组相互平行且间隔设置的P型掺杂区和N型掺杂区。
具体的，主MOS在芯片上的分布包括主MOS终端区和设置在主MOS终端区内部的主MOS有源区；功能MOS设置在主MOS有源区的范围内。
功能MOS之间的工作状态相互独立，互不影响。
功能MOS包括采样MOS和/或启动MOS，一般情况下，智能型超结MOS产品会集成采样MOS、启动MOS，或者只集成采样MOS、启动MOS中的一个。
通过将功能MOS隔离区的P型掺杂区和N型掺杂区采用封闭的环形设计，这样的设计在经过制作工艺的高温退火环节后，仍能保持功能MOS隔离区内部的功能MOS有源区的独立性，因此可以保证超高的隔离电压，可以至少达到目前市场设计的隔离电压的三十倍。
本发明对应于上述的一种具有超高隔离电压的智能型超结MOS还公开了其制造方法，包括如下步骤：
外延准备：在n型衬底片上形成外延层，得到外延片；
JFET光刻注入：在外延片上形成氧化层，并进行JFET光刻及JFET注入，得到JFET注入片；
深槽光刻、刻蚀及P型外延回填：对JFET注入片进行二氧化硅淀积，再进行光刻和刻蚀，在外延层上形成深沟槽，并在深沟槽内进行P型外延回填，得到具有主MOS、启动MOS、采样MOS的隔离结构的智能型超结器件P/N结构片；
体区光刻、注入和退火：对超结器件P/N结构片，在MOS有源区部分进行选择性曝光后进行注入、体区退火，形成P型体区片；
场氧生长、光刻、腐蚀：对P型体区片，进行氧化层生长，并对有源区进行曝光和腐蚀，得到主MOS终端机隔离终端完备的产品片；
栅氧、沉积多晶、多晶掺杂、光刻、刻蚀：对以上产品片进行栅极氧化、沉积多晶并进行掺杂，多晶光刻，多晶刻蚀等步骤，形成器件的栅极结构，得到带有栅极的结构片；
N+光刻，N+注入，N+推进：对带有栅极的结构片，进行N+光刻、N+注入及N+推阱步骤，形成MOS器件的N+源极结构，得到带有源极结构的结构片；
生成介质，孔光刻，孔腐蚀：对带有源极结构的结构片，淀积一层介质，并进行光刻腐蚀，在MOS源极区、栅极区适当位置开孔，得到具有通孔的结构片；
溅射金属，金属光刻，腐蚀：对具有通孔的结构片，淀积一层金属，并进行光刻、腐蚀，分隔开源极金属及栅极金属，得到具有金属电极的结构片；
钝化层沉积，钝化层光刻，腐蚀：对具有金属电极的结构片，淀积一层氮化硅，并进行光刻、腐蚀，将部分栅极区、源极区打开，正面工艺完成，得到正面结构完备的结构片；
背面Ti-Ni-Ag：对正面结构完备的结构片，进行背面减薄、背面金属蒸发，在圆片背面制作出漏极，得到正背面结构均完备的产品片。
通过上述的制造过程，制造出的智能型超结MOS的隔离电压可以到达200V，而在相同的材料条件下，现有隔离设计的产品的隔离电压只有6V，所以本发明提供的智能型超结MOS更加符合市场需求，更方便于实际使用。
以上所述仅是本发明的优选实施方式，本发明的保护范围并不仅局限于上述实施例，凡属于本发明思路下的技术方案均属于本发明的保护范围。应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明原理前提下的若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。

Claims (5)

1.一种具有超高隔离电压的智能型超结MOS，包括集成连接在一个芯片上的主MOS、电阻R以及若干功能MOS，其特征是：所述功能MOS设置在所述主MOS的范围内，所述功能MOS在芯片上的分布包括功能MOS隔离区和设置在所述功能隔离区内部的功能MOS有源区，所述功能MOS隔离区包括相邻间隔且呈环形设置的P型掺杂区和N型掺杂区，所述功能MOS有源区和主MOS包括若干组相互平行且间隔设置的P型掺杂区和N型掺杂区。
2.根据权利要求1所述的一种具有超高隔离电压的智能型超结MOS，其特征是：所述主MOS在芯片上的分布包括主MOS终端区和设置在所述主MOS终端区内部的主MOS有源区；所述功能MOS设置在所述主MOS有源区的范围内。
3.根据权利要求1所述的一种具有超高隔离电压的智能型超结MOS，其特征是：所述功能MOS之间的工作状态相互独立。
4.根据权利要求1所述的一种具有超高隔离电压的智能型超结MOS，其特征是：所述功能MOS包括采样MOS和/或启动MOS。
5.一种具有超高隔离电压的智能型超结MOS的制造方法，其特征是：包括如下步骤：
在n型衬底片上形成外延层，得到外延片；
在外延片上形成氧化层，并进行JFET光刻及JFET注入，得到JFET注入片；
对JFET注入片进行二氧化硅淀积，再进行光刻和刻蚀，在外延层上形成深沟槽，并在深沟槽内进行P型外延回填，得到具有主MOS、功能MOS的隔离结构的智能型超结器件P/N结构片；
对超结器件P/N结构片，在MOS有源区位置进行选择性曝光后进行注入、体区退火，形成P型体区片；
对P型体区片，进行氧化层生长，并对有源区进行曝光和腐蚀，得到主MOS终端机隔离终端完备的产品片；
对产品片进行栅极氧化、沉积多晶并进行掺杂、多晶光刻、多晶刻蚀，形成器件的栅极结构，得到带有栅极的结构片；
对带有栅极的结构片，进行N+光刻、N+注入及N+推阱，形成MOS器件的N+源极结构，得到带有源极结构的结构片；
对带有源极结构的结构片，淀积一层介质，并进行光刻腐蚀，在MOS源极区、栅极区的位置开孔，得到具有通孔的结构片；
对具有通孔的结构片，淀积一层金属，并进行光刻、腐蚀，分隔开源极金属及栅极金属，得到具有金属电极的结构片；
对具有金属电极的结构片，淀积一层氮化硅，并进行光刻、腐蚀，将部分栅极区、源极区打开，正面工艺完成，得到正面结构完备的结构片；
对正面结构完备的结构片，进行背面减薄、背面金属蒸发，在圆片背面制作出漏极，得到正背面结构均完备的产品片。
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CN104157689A (zh) * 2014-08-14 2014-11-19 西安芯派电子科技有限公司 一种具有自隔离的半导体结构
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US20020060340A1 (en) * 1999-04-21 2002-05-23 Gerald Deboy Semiconductor component
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