CN113555360A - 一种智能型超结mos器件及其制造方法 - Google Patents

一种智能型超结mos器件及其制造方法 Download PDF

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CN113555360A
CN113555360A CN202110736027.7A CN202110736027A CN113555360A CN 113555360 A CN113555360 A CN 113555360A CN 202110736027 A CN202110736027 A CN 202110736027A CN 113555360 A CN113555360 A CN 113555360A
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翟士杰
何军
胡兴正
薛璐
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Chuzhou Huarui Microelectronics Technology Co ltd
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Abstract

本发明涉及智能型超结MOS器件领域,公开了一种智能型超结MOS器件及其制造方法,其技术方案要点是包括集成连接在一个芯片上的主MOS和若干功能MOS,其特征是:所述功能MOS设置在所述主MOS的范围内,所述功能MOS在芯片上的分布包括功能MOS隔离区和功能MOS有源区,所述功能MOS有源区包括若干组相互平行且间隔设置的P型掺杂区柱和N型掺杂区柱,所述功能MOS隔离区包括呈方形围绕在所述功能有源区外围的N型掺杂区柱和均匀点阵呈栅格状分布在N型掺杂区柱内部的P型掺杂区柱,本发明的智能型超结MOS器件经过工艺高温退火,也仍然可以保证功能MOS有源区的独立性,可以保证超高的隔离电压。

Description

一种智能型超结MOS器件及其制造方法
技术领域
本发明涉及智能型超结MOS器件领域,更具体地说,它涉及一种智能型超结MOS器件及其制造方法。
背景技术
智能型超结MOS器件产品是在普通超结产品的基础上,集成了采样MOS、启动MOS、高阻R,或者只集成采样MOS与启动MOS中的一个MOS,普通超结与智能型超结电路示意图对比见图13。可以看到,智能型超结MOS器件产品,在同一颗芯片上,会有2~3个MOS,应用电路要求MOS间功能独立,工作状态下互不影响;
超结产品是由多组P型掺杂区柱和N型掺杂区柱交替连接构成,因此采样MOS、启动MOS的隔离设计中,P型掺杂区柱和N型掺杂区柱如何排列不仅仅影响到MOS间隔离电压、还会影响管芯的耐压;
图11和12为现有技术的超结MOS隔离设计,仅将P型掺杂区柱和N型掺杂区柱进行简单的纵横交叉的排布,此种设计可以满足管芯耐压要求,但是MOS间隔离电压只有不到10V,耐压曲线几乎为阻性曲线,经分析,此种设计时,采样MOS、启动MOS的有源区在经过工艺高温退火过程后,与主MOS的有源区是相连的,因此,MOS间并没有真正的隔离,所以隔离电压非常低。
发明内容
本发明的目的是提供一种智能型超结MOS器件及其制造方法,经过工艺高温退火,也仍然可以保证功能MOS有源区的独立性,可以保证超高的隔离电压。
本发明的上述技术目的是通过以下技术方案得以实现的:一种智能型超结MOS器件,其特征是:包括集成连接在一个芯片上的主MOS和若干功能MOS,所述功能MOS设置在所述主MOS的范围内,所述功能MOS在芯片上的分布包括功能MOS隔离区和功能MOS有源区,所述功能MOS有源区包括若干组相互平行且间隔设置的P型掺杂区柱和N型掺杂区柱,所述功能MOS隔离区包括呈方形围绕在所述功能有源区外围的N型掺杂区柱和均匀点阵呈栅格状分布在N型掺杂区柱内部的P型掺杂区柱。
作为本发明的一种优选技术方案,所述主MOS在芯片上的分布包括主MOS终端区和设置在所述主MOS终端区内部的主MOS有源区;所述功能MOS设置在所述主MOS有源区的范围内。
作为本发明的一种优选技术方案,所述主MOS终端区和主MOS有源区分别包括若干组相互平行且间隔设置的P型掺杂区柱和N型掺杂区柱。
作为本发明的一种优选技术方案,所述功能MOS之间的工作状态相互独立。
作为本发明的一种优选技术方案,若干功能MOS之间相邻设置。
作为本发明的一种优选技术方案,所述功能MOS包括采样MOS和/或启动MOS。
一种智能型超结MOS器件的制造方法,包括如下步骤:
S1、在N型衬底片上生长形成N型掺杂外延层,注入N型掺杂物质,再选择性曝光,注入P型掺杂物质,得到单次外延片;
S2、重复上述外延生长和注入的步骤,最后一次外延只注入N型掺杂物质,得到多次外延片;
S3、对多次外延片进行氧化层和氮化层淀积,退火、刻去氧化层和氮化层,形成N型漂移区和P型柱区,得到P/N结构片;
S4、对P/N结构片进行场氧生长、光刻、场氧刻蚀,得到带有场氧的结构片;
S5、对场氧结构片进行栅极氧化、淀积多晶并进行掺杂、多晶光刻、多晶刻蚀,形成栅氧化层和多晶层,得到带有栅极的结构片;
S6、对带有栅极的结构片,选择性曝光后,注入P型掺杂物质,体区退火,形成P型体区,得到P型体区片;
S7、对P型体区片,进行N+光刻及N+推阱,形成MOS器件的N+源极结构层,得到带有源极结构的结构片;
S8、对带有源极结构的结构片,生长Spacer氧化层、刻蚀,在多晶侧壁形成Spacer效果,得到带有P+自对准结构的结构片;
S9、对带有P+自对准结构的结构片,注入P型掺杂物质,得到带有P+结构的结构片;
S10、对带有P+结构的结构片,淀积介质,形成介质层,并进行光刻、刻蚀,在MOS源区的位置开孔,得到带有通孔的结构片;
S11、对带有通孔的结构片进行金属沉积并光刻,形成金属层,得到具有金属层的结构片;
S12、对具有金属层的结构片进行钝化层淀积、光刻、刻蚀,形成栅极和源极的开口区,得到带有钝化层的结构片;
S13、对带有钝化层的结构片的背面进行减薄和蒸发Ti-Ni-Ag的操作,形成蒸发层,得到智能型超结MOS器件。
综上所述,本发明具有以下有益效果:功能MOS隔离区设计为呈方形围绕在所述功能有源区外围的N型掺杂区柱和均匀点阵呈栅格状分布在N型掺杂区柱内部的P型掺杂区柱,这样的功能MOS隔离区设计即使经过工艺高温退火,也仍然可以保证功能MOS有源区的独立性;这样的设计也能为功能MOS隔离区的呈方形阵列分布的P型掺杂区柱间多引入了一个方向的电荷平衡效应,使得电场分布更加平缓,因此可以保证超高的隔离电压。
附图说明
图1是本发明的智能型超结MOS器件的P型掺杂区柱和N型掺杂区柱分布示意图;
图2是本发明的智能型超结MOS器件的立体截面图;
图3是本发明的智能型超结MOS器件的三种结构样式;
图4是本发明方法的单次外延片示意图;
图5是本发明方法的多次外延片示意图;
图6是本发明方法的P/N结构片示意图;
图7是本发明方法的带有栅极的结构片示意图;
图8是本发明方法的P型体区片片示意图;
图9是本发明方法的带有源极结构的结构片示意图;
图10是本发明方法的具有金属层的结构片示意图;
图11是现有技术的超结MOS器件的设计图;
图12是现有技术的超结MOS器件的立体截面图;
图13是普通超结与智能型超结电路对比示意图。
图中:1、主MOS有源区;2、主MOS终端区;3、功能MOS有源区;4、功能MOS隔离区;P、P型掺杂区柱;N、N型掺杂区柱。
具体实施方式
以下结合附图对本发明作进一步详细说明。
本发明提供一种智能型超结MOS器件,如图1和2所示,包括集成连接在一个芯片上的主MOS和若干功能MOS,功能MOS包括采样MOS和/或启动MOS。
主MOS在芯片上的分布包括主MOS终端区2和设置在主MOS终端区2内部的主MOS有源区1;功能MOS设置在主MOS有源区1的范围内,主MOS终端区2和主MOS有源区1分别包括若干组相互平行且间隔设置的P型掺杂区柱和N型掺杂区柱;
若干功能MOS之间相邻设置,功能MOS在芯片上的分布包括功能MOS隔离区4和功能MOS有源区3,功能MOS有源区3包括若干组相互平行且间隔设置的P型掺杂区柱和N型掺杂区柱,功能MOS隔离区4包括呈方形围绕在功能有源区外围的N型掺杂区柱和均匀点阵呈栅格状分布在N型掺杂区柱内部的P型掺杂区柱,功能MOS之间的工作状态相互独立。
本发明的工作原理和优势为:功能MOS隔离区4设计为呈方形围绕在所述功能有源区外围的N型掺杂区柱和均匀点阵呈栅格状分布在N型掺杂区柱内部的P型掺杂区柱,这样的功能MOS隔离区4设计即使经过工艺高温退火,也仍然可以保证功能MOS有源区3的独立性;这样的设计也能为功能MOS隔离区4的呈方形阵列分布的P型掺杂区柱间多引入了一个方向的电荷平衡效应,使得电场分布更加平缓,因此可以保证超高的隔离电压。
本发明还提供一种智能型超结MOS器件的制造方法,包括如下步骤:
S1、如图4所示,在N型衬底片上生长形成N型掺杂外延层,注入N型掺杂物质,再选择性曝光,注入P型掺杂物质,得到单次外延片;
S2、如图5所示,重复上述外延生长和注入的步骤,最后一次外延只注入N型掺杂物质,得到多次外延片;
S3、如图6所示,对多次外延片进行氧化层和氮化层淀积,退火、刻去氧化层和氮化层,形成N型漂移区和P型柱区,得到P/N结构片;
S4、对P/N结构片进行场氧生长、光刻、场氧刻蚀,得到带有场氧的结构片;
S5、如图7所示,对场氧结构片进行栅极氧化、淀积多晶并进行掺杂、多晶光刻、多晶刻蚀,形成栅氧化层和多晶层,得到带有栅极的结构片;
S6、如图8所示,对带有栅极的结构片,选择性曝光后,注入P型掺杂物质,体区退火,形成P型体区,得到P型体区片;
S7、如图9所示,对P型体区片,进行N+光刻及N+推阱,形成MOS器件的N+源极结构层,得到带有源极结构的结构片;
S8、对带有源极结构的结构片,生长Spacer氧化层、刻蚀,在多晶侧壁形成Spacer效果,得到带有P+自对准结构的结构片;
S9、对带有P+自对准结构的结构片,注入P型掺杂物质,得到带有P+结构的结构片;
S10、对带有P+结构的结构片,淀积介质,形成介质层,并进行光刻、刻蚀,在MOS源区的位置开孔,得到带有通孔的结构片;
S11、如图10所示,对带有通孔的结构片进行金属沉积并光刻,形成金属层,得到具有金属层的结构片;
S12、对具有金属层的结构片进行钝化层淀积、光刻、刻蚀,形成栅极和源极的开口区,得到带有钝化层的结构片;
S13、对带有钝化层的结构片的背面进行减薄和蒸发Ti-Ni-Ag的操作,形成蒸发层,得到智能型超结MOS器件。
一般的,可根据不同的耐压和隔离需求,可以拓展为三种结构,如图3所示,以结构一为例,其具体的制造方法是:
S1、如图4所示,在N型衬底片上生长形成N型掺杂外延层,N型衬底片采用N型(100)晶向,砷元素掺杂,电阻率通常为0.001~0.005Ω*cm,采用多次外延的方法生长高阻外延层,通常每层电阻率为15~40Ω*cm,以第一层为例,生长一层5~10um的N型掺杂外延;再注入N型掺杂物质,用于扩散形成N型漂移区,注入能量:140KeB~160KeV,剂量:2e12~4e12,磷元素;对注入的N形掺杂物质进行选择性曝光,并注入P型掺杂物质,用于扩散形成P-Pillar,注入能量:50~70KeV,注入剂量:6e12~8e12,硼元素,得到单次外延片。
S2、如图5所示,重复N型掺杂外延层的外延生长和N型掺杂物质、P型掺杂物质的注入过程至整体外延为50~70um,最后再生长一层N型掺杂外延,厚度3~8um,并且只注入N型掺杂物质,用于体区和源区注入,得到多次外延片。
S3、如图6所示,对多次外延片淀积一层1800埃~2400埃的SiO2,通过PCVD淀积一层1000埃~1500埃的氮化硅,防止杂质扩散。然后进行P-Pillar退火,温度1180℃,时间根据单次外延层的厚度在150min~250min,气体氛围为氮气。通过湿法刻蚀将氮化硅去除,将SiO2去除,形成N型漂移区和P型柱区,得到P/N结构片。
S4、在P/N结构片上生长场氧厚度8000埃~12000埃,并进行光刻,对有源区曝光&腐蚀,除主MOS终端区及功能MOS隔离区外,其余主MOS有源区、采样MOS有源区,启动MOS有源区氧化层全部去除,得到带有场氧的结构片。
S5、如图7所示,对带有场氧的结构片生长栅氧化层厚度一般700-1200埃,沉积多晶硅厚度6000-8000埃并进行掺杂;再对多晶硅光刻和刻蚀,形成栅氧化层和多晶层,得到带有栅极的结构片。
S6、如图8所示,对带有栅极的结构片进行选择性曝光,P型掺杂物质注入剂量为3e13~6e13,注入能量:80KeV~110KeV,硼元素,注入后退火,1150℃,50~60min,杂质扩散形成P型体区,得到P型体区片。
S7、如图9所示,在P型体区片上进行N+光刻及N+推阱,形成主MOS管源区,得到带有源极结构的结构片,其中NP注入剂量:5E15~1E16,注入能量:40Kev-100Kev,注入元素:磷。NP推阱温度:850℃,时间:40~60分钟。
S8、对带有源极结构的结构片,生长一层Spacer氧化层,厚度1000埃~1500埃,并使用干法刻蚀将氧化层去除,可以在Poly侧壁形成Spacer结果,做为P+注入的自对准结构,得到带有P+自对准结构的结构片。
S9、对带有P+自对准结构的结构片进行P+注入,增加P-body体区掺杂浓度,降低Rb电阻,有助于提高MOS的抗冲击能力,剂量:2e15~4e15,能量:120KeV,硼元素,得到带有P+结构的结构片。
S10、对带有P+结构的结构片沉积介质BPSG(硼磷硅玻璃)10000埃,然后开孔,形成孔接触,得到带有通孔的结构片。
S11、如图10所示,对带有通孔的结构片沉积4um铝,然后光刻腐蚀铝,形成MOS的栅区和源区,得到具有金属层的结构片。
S12、对具有金属层的结构片沉积钝化层氮化硅6000-10000埃,然后光刻腐蚀,形成Gate和Source的开口区,得到带有钝化层的结构片。
S13、对带有钝化层的结构片减薄背面到200um-300um,再在背面蒸发Ti-Ni-Ag(钛-镍-银),最终得到智能型超结MOS器件。
以上所述仅是本发明的优选实施方式,本发明的保护范围并不仅局限于上述实施例,凡属于本发明思路下的技术方案均属于本发明的保护范围。应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明原理前提下的若干改进和润饰,这些改进和润饰也应视为本发明的保护范围。

Claims (7)

1.一种智能型超结MOS器件,包括集成连接在一个芯片上的主MOS和若干功能MOS,其特征是:所述功能MOS设置在所述主MOS的范围内,所述功能MOS在芯片上的分布包括功能MOS隔离区(4)和功能MOS有源区(3),所述功能MOS有源区(3)包括若干组相互平行且间隔设置的P型掺杂区柱和N型掺杂区柱,所述功能MOS隔离区(4)包括呈方形围绕在所述功能有源区外围的N型掺杂区柱和均匀点阵呈栅格状分布在N型掺杂区柱内部的P型掺杂区柱。
2.根据权利要求1所述的一种智能型超结MOS器件,其特征是:所述主MOS在芯片上的分布包括主MOS终端区(2)和设置在所述主MOS终端区(2)内部的主MOS有源区(1);所述功能MOS设置在所述主MOS有源区(1)的范围内。
3.根据权利要求2所述的一种智能型超结MOS器件,其特征是:所述主MOS终端区(2)和主MOS有源区(1)分别包括若干组相互平行且间隔设置的P型掺杂区柱和N型掺杂区柱。
4.根据权利要求3所述的一种智能型超结MOS器件,其特征是:所述功能MOS之间的工作状态相互独立。
5.根据权利要求4所述的一种智能型超结MOS器件,其特征是:若干功能MOS之间相邻设置。
6.根据权利要求5所述的一种智能型超结MOS器件,其特征是:所述功能MOS包括采样MOS和/或启动MOS。
7.一种智能型超结MOS器件的制造方法,其特征是:包括如下步骤:
S1、在N型衬底片上生长形成N型掺杂外延层,注入N型掺杂物质,再选择性曝光,注入P型掺杂物质,得到单次外延片;
S2、重复上述外延生长和注入的步骤,最后一次外延只注入N型掺杂物质,得到多次外延片;
S3、对多次外延片进行氧化层和氮化层淀积,退火、刻去氧化层和氮化层,形成N型漂移区和P型柱区,得到P/N结构片;
S4、对P/N结构片进行场氧生长、光刻、场氧刻蚀,得到带有场氧的结构片;
S5、对场氧结构片进行栅极氧化、淀积多晶并进行掺杂、多晶光刻、多晶刻蚀,形成栅氧化层和多晶层,得到带有栅极的结构片;
S6、对带有栅极的结构片,选择性曝光后,注入P型掺杂物质,体区退火,形成P型体区,得到P型体区片;
S7、对P型体区片,进行N+光刻及N+推阱,形成MOS器件的N+源极结构层,得到带有源极结构的结构片;
S8、对带有源极结构的结构片,生长Spacer氧化层、刻蚀,在多晶侧壁形成Spacer效果,得到带有P+自对准结构的结构片;
S9、对带有P+自对准结构的结构片,注入P型掺杂物质,得到带有P+结构的结构片;
S10、对带有P+结构的结构片,淀积介质,形成介质层,并进行光刻、刻蚀,在MOS源区的位置开孔,得到带有通孔的结构片;
S11、对带有通孔的结构片进行金属沉积并光刻,形成金属层,得到具有金属层的结构片;
S12、对具有金属层的结构片进行钝化层淀积、光刻、刻蚀,形成栅极和源极的开口区,得到带有钝化层的结构片;
S13、对带有钝化层的结构片的背面进行减薄和蒸发Ti-Ni-Ag的操作,形成蒸发层,得到智能型超结MOS器件。
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CN114122115B (zh) * 2022-01-28 2022-04-29 绍兴中芯集成电路制造股份有限公司 超结半导体器件及其形成方法

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