CN113013132A - 电性连接结构及包含其的电子装置 - Google Patents

电性连接结构及包含其的电子装置 Download PDF

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Publication number
CN113013132A
CN113013132A CN202010987044.3A CN202010987044A CN113013132A CN 113013132 A CN113013132 A CN 113013132A CN 202010987044 A CN202010987044 A CN 202010987044A CN 113013132 A CN113013132 A CN 113013132A
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China
Prior art keywords
light emitting
electrical connection
circuit
electronic device
connection structure
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CN202010987044.3A
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Inventor
胡顺源
丁景隆
毛立维
曾名骏
郭拱辰
徐怡华
高克毅
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Innolux Corp
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Innolux Corp
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Priority to US17/119,864 priority Critical patent/US11974479B2/en
Publication of CN113013132A publication Critical patent/CN113013132A/zh
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Abstract

本发明提供一种电性连接结构，包括穿孔、第一衬垫、第二衬垫以及导电桥，其中该穿孔具有第一末端与第二末端；该第一衬垫至少部分包围该穿孔的该第一末端，并电性连接第一电路；该第二衬垫位于该穿孔的该第二末端，并电性连接第二电路；该导电桥借由该穿孔连接该第一衬垫与该第二衬垫，以使该第一电路与该第二电路彼此电性连接。

Description

电性连接结构及包含其的电子装置
技术领域
本发明有关于一种发光装置，特别是有关于一种包含具有双面电路的电路基板的发光装置。
背景技术
现行的发光装置中，由于各光源在发光装置中的位置不同，造成各走线的距离长、短有别，导致整体线路的阻抗差异增加，在IR压降未获改善的情况下，会降低装置的操作性能。
发明内容
根据本发明的一实施例，提供一种电性连接结构，包括穿孔、第一衬垫、第二衬垫以及导电桥，其中该穿孔具有第一末端与第二末端；该第一衬垫至少部分包围该穿孔的该第一末端，并电性连接第一电路；该第二衬垫位于该穿孔的该第二末端，并电性连接第二电路；该导电桥借由该穿孔连接该第一衬垫与该第二衬垫，以使该第一电路与该第二电路彼此电性连接。
根据本发明的一实施例，该第一衬垫完全围绕该穿孔的该第一末端，并呈现一封闭环的形式。
根据本发明的一实施例，该第一衬垫的材料包括铜、镍、或金。
根据本发明的一实施例，该电性连接结构电性连接一第一电子组件与一第二电子组件。
根据本发明的一实施例，该第一电子组件包括一基板，承载该第一电路，该穿孔形成于该基板中，且该第一衬垫形成于该基板上。
根据本发明的一实施例，该第二电子组件包括一印刷电路板，承载该第二电路，且该第二衬垫形成于该印刷电路板上。
根据本发明的一实施例，该导电桥的材料包括金、铜、或锡膏。
根据本发明的一实施例，还提供一种电子装置，包括上述一实施例中的电性连接结构。
根据本发明的一实施例，该电子装置包括一有机发光二极管发光装置。
根据本发明的一实施例，该电子装置包括一发光二极管发光装置。
附图说明
以下将配合所附图式详述本发明实施例。应注意的是，各种特征部件并未按照比例绘制且仅用以说明例示。事实上，组件的尺寸可能经放大或缩小，以清楚地表现出本发明实施例的技术特征。
图1根据本发明的一实施例，一种电子装置的俯视图；
图2根据本发明的一实施例，一种电子装置的剖面示意图；
图3根据本发明的一实施例，一种电子装置的剖面示意图；
图4根据本发明的一实施例，一种电子装置的剖面示意图；
图5根据本发明的一实施例，一种电子装置的剖面示意图；
图6根据本发明的一实施例，一种电子装置的剖面示意图；
图7根据本发明的一实施例，一种电子装置的剖面示意图；
图8A～8D根据本发明的一实施例，一种电子装置制造方法的剖面示意图；
图9A～9D根据本发明的一实施例，一种电子装置制造方法的剖面示意图；
图10根据本发明的一实施例，一种电子装置的剖面示意图；
图11根据本发明的一实施例，一种电子装置的剖面示意图；
图12根据本发明的一实施例，一种拼接式显示器的剖面示意图；以及
图13A～13D根据本发明的一实施例，一种电子装置制造方法的剖面示意图。
符号说明：
10,100,100a,100b,500：电子装置(发光装置)
12,120：电路基板
12a,120a：电路基板的上表面
12b,120b：电路基板的下表面
14,140：阵列基板
16,160：发光单元
16a,16b,16c,16d,16e,16f,16g,16h,16i,16j,16k,16l：发光单元
18,180,180a,180b：驱动装置
20,200：电性连接结构
20a,20b,20c,20d,20e,20f：电性连接结构
20’：金属衬垫
22：测试衬垫
22a,22b,22c,22d,22e,22f,22g,22h,22i,22j,22k,22l,22m,22n,22o,22p：测试衬垫
24.240：光吸收层
26：粘着层
32,34,320,340：接触衬垫
32a1,32a2,32b1,32b2,32c1,32c2,32d1,32d2,32e1,32e2,32f1,32f2,32g1,32g2,
32h1,32h2,32i1,32i2,32j1,32j2,32k1,32k2,32l1,32l2：接触衬垫
36：阵列基板的第一区
38：阵列基板的第二区
40：阵列基板的第三区
42：阵列基板的第四区
44：穿孔
44a：穿孔的第一末端
44b：穿孔的第二末端
46：第一衬垫
48：第二衬垫
50：导电桥(导电材料)
54：支撑基板
56(56a,56b)：光取出层
56a’,56b’：光取出层的平坦上表面
58,580：保护层
60(60a,60b),600：封装单元
62：载板
640：导电粒子
660：粘着层
680：连接衬垫
680a：连接衬垫的第一部分
680b：连接衬垫的第二部分
680c：连接衬垫的第三部分
具体实施方式
以下的揭露内容提供许多不同的实施例以实施本案的不同特征。以下的揭露内容叙述各个构件及其排列方式的特定范例，以简化说明。当然，该多个特定的范例并非用以限定。例如，若是本发明实施例叙述了一第一特征部件形成于一第二特征部件之上或上方，即表示其可能包含上述第一特征部件与上述第二特征部件是直接接触的实施例，亦可能包含了有附加特征部件形成于上述第一特征部件与上述第二特征部件之间，而使上述第一特征部件与第二特征部件可能未直接接触的实施例。
应理解的是，额外的操作步骤可实施于所述方法之前、之间或之后，且在所述方法的其他实施例中，部分的操作步骤可被取代或省略。
此外，其中可能用到与空间相关用词，例如「在…下方」、「下方」、「较低的」、「在…上方」、「上方」、「较高的」及类似的用词，该多个空间相关用词是为了便于描述图示中一个(些)组件或特征部件与另一个(些)组件或特征部件之间的关系，该多个空间相关用词包括使用中或操作中的装置的不同方位，以及附图中所描述的方位。当装置被转向不同方位时(旋转45度或其他方位)，则其中所使用的空间相关形容词也将依转向后的方位来解释。
在说明书中，「约」、「大约」、「大抵」、「大致」、「实质上」的用语通常表示一特征值在一给定值的正负20％之内，或正负10％之内，或正负5％之内，或正负3％之内，或正负2％之内，或正负1％之内，或正负0.5％之内的范围。在此给定的数量为大约的数量，亦即在没有特定说明「约」、「大约」、「大抵」、「大致」、「实质上」的情况下，仍可隐含「约」、「大约」、「大抵」、「大致」、「实质上」的含义。
应当理解的是，虽然本文使用术语「第一」、「第二」、「第三」等来描述不同的组件、部件、区域、层及/或区段，该多个组件、部件、区域、层及/或区段不应当被该多个术语所限制。该多个术语可以仅被用于将一个组件、部件、区域、层或区段与另一组件、部件、区域、层或区段区分开来。因此，在不脱离本发明的技术的前提下，以下讨论的第一组件、部件、区域、层或区段可以被称为第二组件、部件、区域、层或区段。
除非另外定义，在此使用的全部用语(包括技术及科学用语)具有与此篇揭露所属的一般技艺者所通常理解的相同涵义。能理解的是，该多个用语，例如在通常使用的字典中定义的用语，应被解读成具有与相关技术及本发明的背景或上下文一致的意思，而不应以一理想化或过度正式的方式解读，除非在本发明实施例有特别定义。
请参阅图1、图2，根据本发明的一实施例，提供一种电子装置10。图1为电子装置10的俯视图。图2为图1沿A-A’剖面线所得的剖面示意图。
在图1、图2所示的实施例中，电子装置10包括电路基板12、阵列基板14、多个发光单元16(16a、16b、16c、16d、16e、16f、16g、16h、16i、16j、16k、16l)、驱动装置18、多个电性连接结构20(20a、20b、20c、20d、20e、20f)、多个测试衬垫22(22a、22b、22c、22d、22e、22f、22g、22h、22i、22j、22k、22l、22m、22n、22o、22p)、光吸收层24、以及粘着层26。电路基板12具有上表面12a与下表面12b，上表面12a上设置一上电路(未绘出)，下表面12b上设置一下电路(未绘出)，且下电路电性连接上电路。薄膜晶体管阵列(thin film transistor array，未绘出)设置于阵列基板14上，阵列基板14则设置于电路基板12的上表面12a之上，并电性连接上电路。发光单元16分别借由多个接触衬垫32设置于阵列基板14上。驱动装置18借由多个接触衬垫34设置于电路基板12的下表面12b，并电性连接下电路。电性连接结构20设置于阵列基板14上，并分别穿过阵列基板14与粘着层26而电性连接至电路基板12与其下方的驱动装置18，且电性连接结构20分别位于发光单元16中至少一个的附近，电性连接结构20的结构组成将详述于后(图3)。测试衬垫22设置于阵列基板14上，分别位于发光单元16中至少一个的附近。光吸收层24至少覆盖测试衬垫22中的一个，但本发明不限于此。粘着层26设置于电路基板12与阵列基板14之间。
图1、图2所示的电子装置10为一种发光装置，例如发光二极管(light emittingdiode,LED)发光装置，但本发明不限于此。而发光二极管可包括例如有机发光二极管(organic light emitting diode，OLED)、无机发光二极管(inorganic light emittingdiode)、次毫米发光二极管(mini LED)、微发光二极管(micro LED)或量子点发光二极管(quantum dot LED，QLED/QDLED)等，但本发明不限于此。在部分实施例中，电路基板12可包括但不限于印刷电路板(printed circuit board，PCB)，例如，具有双面电路的印刷电路板。在部分实施例中，阵列基板14可包括可挠式基板，例如，由聚酰亚胺(PI)材料所构成，其厚度可小于或等于50微米(μm)(0微米<厚度≤50微米)，有利于本发明电性连接结构的制作，但本发明中，阵列基板14的材料与厚度并不限于此。在部分实施例中，阵列基板14的材料亦可包括玻璃、蓝宝石、或其他适合的高分子材料、或是具有较佳散热效果的陶瓷或石墨等材料。在部分实施例中，发光单元16可包括前述的发光二极管，但本发明不限于此。在部分实施例中，该多个测试衬垫22可作为制程中检测组件性能之用，待检测后，再以光吸收层24覆盖的。在部分实施例中，测试衬垫22的宽度大约介于100微米至500微米之间(100微米≤宽度≤500微米)。在部分实施例中，光吸收层24的材料包括可吸收特定波长光(例如可见光)的任何适合材料。在部分实施例中，粘着层26可包括任何适合的粘着材料，而将阵列基板14贴合于电路基板12上。
请参阅图1，说明电子装置10的部分电性连接设计。该多个电性连接结构20分别连接位于特定区域内的组件，使该区域内的组件与下方的电路基板12形成电性连接，例如，电性连接结构20b可将发光单元(16a、16b、16c)电性连接至电路基板12，电性连接结构20c可将发光单元(16d、16e、16f)电性连接至电路基板12，电性连接结构20e可将发光单元(16g、16h、16i)电性连接至电路基板12，以及电性连接结构20f可将发光单元(16j、16k、16l)电性连接至电路基板12，使得各发光单元与印刷电路板之间能分别形成较短的电性连接距离，有效降低电阻压降(IR-drop)，但本发明中电性连接结构与发光单元的对应关系并不限于此。此外，在图1、图2所示的实施例中，该多个测试衬垫22与该多个接触衬垫32之间的电性连接方式采用共阴设计，例如，在阵列基板14的第一区36中，测试衬垫22a同时与作为阴极的接触衬垫(32a1、32b1、32c1)电性连接，而测试衬垫22b与作为阳极的接触衬垫32a2电性连接，测试衬垫22f与作为阳极的接触衬垫32b2电性连接，以及测试衬垫22e与作为阳极的接触衬垫32c2电性连接。在阵列基板14的第二区38中，测试衬垫22c同时与作为阴极的接触衬垫(32d1、32e1、32f1)电性连接，而测试衬垫22d与作为阳极的接触衬垫32d2电性连接，测试衬垫22h与作为阳极的接触衬垫32e2电性连接，以及测试衬垫22g与作为阳极的接触衬垫32f2电性连接。在阵列基板14的第三区40中，测试衬垫22i同时与作为阴极的接触衬垫(32g1、32h1、32i1)电性连接，而测试衬垫22j与作为阳极的接触衬垫32g2电性连接，测试衬垫22n与作为阳极的接触衬垫32h2电性连接，以及测试衬垫22m与作为阳极的接触衬垫32i2电性连接，在阵列基板14的第四区42中，测试衬垫22k同时与作为阴极的接触衬垫(32j1、32k1、32l1)电性连接，而测试衬垫22l与作为阳极的接触衬垫32j2电性连接，测试衬垫22p与作为阳极的接触衬垫32k2电性连接，以及测试衬垫22o与作为阳极的接触衬垫32l2电性连接。在部分实施例中，该多个测试衬垫22与该多个接触衬垫32之间的电性连接方式亦可采用共阳设计，其电性连接方式与共阴设计类似，仅是将衬垫的阴、阳极性互换。但本发明中测试衬垫与接触衬垫间的电性连接方式并不限于上述方式。
请参阅图1、图3，根据本发明的一实施例，进一步详述电性连接结构20的结构组成。图3为电子装置10的剖面示意图，其中将以电性连接结构为重点做说明。由于多个电性连接结构20的结构可为类似，故此处仅以电性连接结构20b为例加以说明。如图3所示，电性连接结构20b包括第一衬垫46、第二衬垫48、以及导电桥50，其中导电桥50至少部分设置于穿孔44内，并覆盖部分的第一衬垫46。穿孔44具有第一末端44a与第二末端44b，其中第一末端44a可与阵列基板14的上表面大致等高度，而第二末端44b可接触电路基板12的上表面12a，但不限于此。如图1所示，第一衬垫46围绕穿孔44，并电性连接阵列基板14的电路(未绘出)。第二衬垫48位于穿孔44的第二末端44b，并电性连接电路基板12的上电路。导电桥50借由穿孔44电性连接第一衬垫46与第二衬垫48，以使阵列基板14的电路与电路基板12的上电路彼此电性连接。在图1、图3所示的实施例中，第一衬垫46完全包围穿孔44，并呈现封闭环的形式(如图1所示)，但本发明中第一衬垫46的形状并不限于此。例如在部分实施例中，第一衬垫46亦可仅部分包围穿孔44，而呈现未封闭型的结构型态。在部分实施例中，第一衬垫46与第二衬垫48的材料可包括适合的导电金属材料，例如铜、镍、或金，但不限于此。如图3所示，电性连接结构20b电性连接阵列基板14与电路基板12，也就是，信号可借由电性连接结构20b在阵列基板14与电路基板12间进行传递。阵列基板14承载电路，穿孔44形成于阵列基板14中，且第一衬垫46形成于阵列基板14上，而电路基板12承载上电路，且第二衬垫48形成于电路基板12上。在部分实施例中，导电桥50的材料可包括适合的导电材料，例如，金、铜、银膏、或锡膏。在部分实施例中，电性连接结构的制造方法包括：首先，以外圈金属为屏蔽，借由例如激光、蚀刻、或钻孔等方法移除内圈中阵列基板14的材料，形成穿孔44，之后，将导电材料填入穿孔44，以电性连接电路基板12。
请参阅图1、图4，根据本发明的一实施例，提供一种电子装置10。图1为电子装置10的俯视图。图4为图1的电子装置10在加上部分组件后，沿A-A’剖面线所得的剖面示意图。
在图1、图4所示的实施例中，部分组件与前述的实施例相似而不再覆述。在图4所示的实施例与图2所示的实施例不同之处将于以下段落说明。
如图4所示，电路基板12可设置于支撑基板54上，更具体的说，电路基板12可完全或至少部分包覆支撑基板54。电路基板12具有上表面12a与下表面12b，上表面12a位于支撑基板54上方且最邻近阵列基板14，下表面12b位于支撑基板54下方且最远离阵列基板14，上表面12a上设置一上电路，下表面12b上设置一下电路，且下电路电性连接上电路。光取出层(56a、56b)设置于发光单元上，例如，光取出层56a设置于发光单元(16a、16b、16c)上，以及光取出层56b设置于发光单元(16d、16e、16f)上，也就是，单一光取出层覆盖多个发光单元。在部分实施例中，亦可以单一光取出层覆盖单一发光单元。光取出层56的形状可分别为半球形状，但不限于此。覆盖于发光单元上的光取出层56可保护下方的发光单元及增加光取出的效果(例如，改变光线自发光单元发出后在不同视角下的光强度分布)。保护层58覆盖光吸收层24、至少部分的光取出层56、以及电性连接结构20中的至少一个电性连接结构20b。
图1、图4所示的电子装置10为一种发光装置，例如发光二极管发光装置，但本发明不限于此。而发光二极管可包括例如有机发光二极管(organic light emitting diode，OLED)、无机发光二极管(inorganic light emitting diode)、次毫米发光二极管(miniLED)、微发光二极管(micro LED)或量子点发光二极管(quantum dot LED，QLED/QDLED)等，但本发明不限于此。在部分实施例中，电路基板12可包括但不限于印刷电路板，例如，具有双面电路的印刷电路板。由于电路基板12可至少部分包覆支撑基板54，即表示此处所选用的电路基板12为可挠式的软质电路板(flexible printed circuit board,FPC)。在部分实施例中，支撑基板54的材料可包括陶瓷、铝或铁，但不限于此。在部分实施例中，光取出层56的材料可分别包括任何适合的透明高分子材料。在部分实施例中，保护层58的材料可包括任何适合的绝缘材料，做为平坦化、保护或隔离下方的组件之用，或做为光吸收或光反射之用。
根据产品需求，当阵列基板14下方欲搭配具有高导热或强度较高的金属板时，可选用如图4所示的支撑基板54(材料可为陶瓷、铝或铁等)与电路基板12的基板组合。
请参阅图1、图5，根据本发明的一实施例，提供一种电子装置10。图1为电子装置10的俯视图。图5为图1的电子装置10在加上部分组件后，沿A-A’剖面线所得的剖面示意图。
在图1、图5所示的实施例中，电子装置10包括电路基板12、阵列基板14、多个发光单元16、驱动装置18、多个电性连接结构20、多个测试衬垫22、光吸收层24、粘着层26、多个光取出层56、以及保护层58。其中图5所示的实施例与前述的实施例相似之处不再覆述。图5所示实施例与图2所示的实施例的主要差别在于多个光取出层56以及保护层58的设置。而在图5所示的实施例中，该多个光取出层56以及保护层58的位置、形状与材料等与图4所示的实施例相似，故不再覆述。
请参阅图1、图6，根据本发明的一实施例，提供一种电子装置10。图1为电子装置10的俯视图。图6为图1的电子装置10在加上部分组件后，沿A-A’剖面线所得的剖面示意图。
在图1、图6所示的实施例中，电子装置10包括电路基板12、阵列基板14、多个发光单元16、驱动装置18、多个电性连接结构20、多个测试衬垫22、光吸收层24、粘着层26、多个光取出层56、以及保护层58。其中图6所示的实施例与前述的实施例相似之处不再覆述。图6所示实施例与图5所示的实施例的主要差别在于多个光取出层56以及保护层58的形状。如图6所示，该多个光取出层56可分别具有平坦化上表面(56a’、56b’)。保护层58覆盖光吸收层24以及该多个电性连接结构20中的至少一个电性连接结构20b，但未覆盖光取出层56。但需说明的是，本发明中光取出层56与保护层58的形状并不限于图5与图6所示的形状。
请参阅图7，根据本发明的一实施例，提供一种电子装置10。图7为电子装置10的剖面示意图。
在图7所示的实施例中，电子装置10包括电路基板12、阵列基板14、多个封装单元(60a、60b)、驱动装置18、电性连接结构20b、光吸收层24、以及粘着层26。电路基板12具有上表面12a与下表面12b，上表面12a上设置一上电路，下表面12b上设置一下电路，且下电路可电性连接上电路。薄膜晶体管阵列设置于阵列基板14上，而阵列基板14设置于电路基板12的上表面12a，并电性连接上电路。多个发光单元可组成多个封装单元，也就是说每一封装单元(60a、60b)包括至少一个发光单元16，例如，发光单元(16a、16b、16c)组成封装单元60a，发光单元(16d、16e、16f)组成封装单元60b，但本发明不限于此。封装单元(60a、60b)借由接触衬垫32设置于阵列基板14上。驱动装置18借由接触衬垫34设置于电路基板12的下表面12b，并电性连接下电路。电性连接结构20b设置于阵列基板14上，并穿过阵列基板14与粘着层26而电性连接至电路基板12与其下方的驱动装置18，且电性连接结构20b位于封装单元(60a、60b)的周围，电性连接结构20b的结构组成可如图3所示，因此此处不再赘述。光吸收层24覆盖阵列基板14。粘着层26设置于电路基板12与阵列基板14之间。
图7所示的电子装置10为一种发光装置，例如发光二极管发光装置，但本发明不限于此。而发光二极管可包括例如有机发光二极管(organic light emitting diode，OLED)、无机发光二极管(inorganic light emitting diode)、次毫米发光二极管(mini LED)、微发光二极管(micro LED)或量子点发光二极管(quantum dot LED，QLED/QDLED)等，但本发明不限于此。在部分实施例中，电路基板12可包括印刷电路板(PCB)，例如，具有双面电路的印刷电路板(PCB)，但本发明并不以此为限。在部分实施例中，阵列基板14可包括可挠式基板，例如，由聚酰亚胺(PI)材料所构成，其厚度大约小于30微米，有利于本发明电性连接结构的制作。在部分实施例中，阵列基板14的材料亦可包括玻璃、蓝宝石、或其他适合的高分子材料、或是具有较佳散热效果的陶瓷或石墨等材料。在部分实施例中，封装单元(60a、60b)中的发光单元(16a、16b、16c、16d、16e、16f)可包括前述发光二极管(LED)。在部分实施例中，光吸收层24的材料包括可吸收特定波长光的任何适合材料。在部分实施例中，粘着层26可包括任何适合的粘着材料，以将阵列基板14贴合于电路基板12上。
在图7所示的实施例中，由于封装单元(60a、60b)与阵列基板14之间的接触衬垫32的尺寸已足够大(例如大约介于100微米至500微米之间)而能进行组件效能测试，因此，在图7所示的实施例中，电子装置10不需额外设置测试衬垫。但本发明并不限于此。
在部分实施例中，电子装置10可选择性地设置保护层58，覆盖光吸收层24、部分的封装单元(60a、60b)、以及电性连接结构20b。在部分实施例中，保护层58的材料可包括任何适合的绝缘材料，做为平坦化或保护、隔离下方的组件之用，或做为光吸收或光反射之用。
请参阅图8A～8D，根据本发明的一实施例，提供一种电子装置的制造方法。图8A～8D为电子装置制造方法的剖面示意图。
如图8A所示，提供薄膜晶体管阵列已设置其上的阵列基板14，其上另设置有金属衬垫20’与测试衬垫22。借由粘着层26将阵列基板14贴合在载板62上。需说明的是，金属衬垫20’可为一圆形或环型衬垫，但不限于此。为方便说明，在图8A～8D中，如图2～图7所示的第二衬垫结构将省略，不再赘述。
如图8B所示，以测试衬垫22对薄膜晶体管阵列的性能进行检测，待检测通过后，将光吸收层24覆盖在测试衬垫22上。借由接触衬垫32将发光单元16接合在阵列基板14上。以金属衬垫20’的外圈为屏蔽，借由例如激光、蚀刻、或钻孔等方法移除内圈中阵列基板14的材料，形成穿孔44。
如图8C所示，将光取出层56覆盖在发光单元16上。将阵列基板14从载板62转移至电路基板12上。将导电材料50填入穿孔44，与电路基板12电性连接，完成电性连接结构20的制作。借由接触衬垫34将驱动装置18接合在电路基板12的底部。
如图8D所示，将保护层58覆盖在阵列基板14的表面，以隔离电性连接结构20。至此，即完成图8A～8D所示实施例电子装置10的制作。
请参阅图9A～9D，根据本发明的一实施例，提供一种电子装置的制造方法。图9A～9D为电子装置制造方法的剖面示意图。
如图9A所示，提供薄膜晶体管阵列已设置其上的阵列基板14，其上设置有金属衬垫20’。借由粘着层26将阵列基板14贴合在载板62上。
如图9B所示，以金属衬垫20’的外圈为屏蔽，借由例如激光、蚀刻、或钻孔等方法移除内圈中阵列基板14的材料，形成穿孔44。将阵列基板14从载板62转移至电路基板12上。将导电材料50填入穿孔44，与电路基板12电性连接，完成电性连接结构20的制作。
如图9C所示，将光吸收层24覆盖在阵列基板14上。借由接触衬垫32将封装单元60接合在阵列基板14上。封装单元60包括多个发光单元16。
如图9D所示，借由接触衬垫34将驱动装置18接合在电路基板12的底部。将保护层58覆盖在阵列基板14的表面，以隔离电性连接结构20。至此，即完成图9A～9D所示实施例电子装置10的制作。
请参阅图10，根据本发明的一实施例，提供一种电子装置100。图10为电子装置100的剖面示意图。
在图10所示的实施例中，电子装置100包括电路基板120、阵列基板140、多个发光单元160、驱动装置180、多个电性连接结构200、光吸收层240、粘着层660、以及保护层580。电路基板120具有上表面120a与下表面120b，上表面120a上设置一上电路，下表面120b上设置一下电路，且下电路电性连接上电路。薄膜晶体管阵列已设置于阵列基板140上，，而阵列基板140设置于电路基板120的上表面120a，并电性连接上电路。发光单元160借由接触衬垫320设置于阵列基板140上。驱动装置180借由接触衬垫340设置于电路基板120的下表面120b，并电性连接下电路。电性连接结构200设置于阵列基板140上，穿过阵列基板140与粘着层660并电性连接至电路基板120与其下方的驱动装置180，且电性连接结构200位于发光单元160的周围，电性连接结构200的结构组成将详述于后。光吸收层240覆盖阵列基板140。粘着层660设置于电路基板120与阵列基板140之间。保护层580覆盖光吸收层240与发光单元160。
图10所示的电子装置100为一种发光装置，例如发光二极管发光装置，但不以此为限。而发光二极管可包括例如有机发光二极管(organic light emitting diode，OLED)、无机发光二极管(inorganic light emitting diode)、次毫米发光二极管(mini LED)、微发光二极管(micro LED)或量子点发光二极管(quantum dot LED，QLED/QDLED)等，但本发明不限于此。图10所示的实施例中，其电路基板120、阵列基板140、发光单元160与光吸收层240可与图7所示实施例中的电路基板12、阵列基板10、发光单元16a到16f、光吸收层24相似，在此不再赘述。在图10所示的实施例中，粘着层660与导电粒子640可组成如异方性导电胶(Anisotropic Conductive Film；ACF)的导电胶材，用以将阵列基板140贴合于电路基板120上。在部分实施例中，导电粒子640可由导电金属(例如镍、金、铜、银等)表面覆盖高分子材料所构成，或是金属或金属合金(例如锡合金)颗粒，或上述材料的混合。在部分实施例中，导电金属可包括锡银铜合金、锡铟合金、锡铋合金、锡金合金、或其他锡合金等合金导电金属材料，但不限于此。在部分实施例中，保护层580的材料可包括任何适合的绝缘材料，做为平坦化或保护、隔离下方的组件之用，或做为光吸收或光反射之用。
如图10所示，以下详细说明电性连接结构200的结构组成。电性连接结构200包括连接衬垫680与导电粒子640。连接衬垫680包括第一部分680a、第二部分680b、以及第三部分680c。第一部分680a形成于阵列基板140上，并电性连接阵列基板140的电路(未绘出)。第二部分680b与第一部分680a连接，穿过阵列基板140与粘着层260。第三部分680c与第二部分680b连接，并借由导电粒子640与电路基板120的上电路电性连接，因此，阵列基板140的电路与电路基板120的上电路之间借由电性连接结构200形成电性连接。在部分实施例中，连接衬垫680的材料可包括适合的导电金属材料，例如，铜、镍、银或金，但不限于此。电性连接结构200电性连接阵列基板140与电路基板120，也就是，阵列基板140上的信号会借由电性连接结构200传递至电路基板120。
请参阅图11，根据本发明的一实施例，提供一种电子装置100。图11为电子装置100的剖面示意图。
在图11所示的电子装置100可为一种发光装置，例如发光二极管发光装置，但不限于此。而发光二极管可包括例如有机发光二极管(organic light emitting diode，OLED)、无机发光二极管(inorganic light emitting diode)、次毫米发光二极管(mini LED)、微发光二极管(micro LED)或量子点发光二极管(quantum dot LED，QLED/QDLED)等，但本发明不限于此。电子装置100包括电路基板120、阵列基板140、多个封装单元600、驱动装置180、多个电性连接结构200、光吸收层240、以及粘着层260。其中与图10所示实施例相似之处不再赘述。图11所示实施例与图10所示实施例主要的不同，在于透过接触衬垫320与阵列基板140电性连接的为封装单元600而非发光单元160，更具体的说，该多个封装单元600分别包括至少一个发光单元160，且封装单元600借由接触衬垫320设置于阵列基板140上。
在部分实施例中，电子装置100可选择性地设置保护层580，覆盖光吸收层240与封装单元600。在部分实施例中，保护层580的材料可包括任何适合的绝缘材料，做为平坦化或保护、隔离下方的组件之用，或做为光吸收或光反射之用。另外，在图11中，保护层580覆盖了封装单元600，但本发明并不限于此。
请参阅图12，根据本发明的一实施例，提供一种电子装置500。图12为电子装置500的剖面示意图。
在图12所示的实施例中，电子装置500包括电路基板120、多个发光装置(100a、100b)、以及多个驱动装置(180a、180b)。电路基板120具有上表面120a与下表面120b，上表面120a上设置一上电路，下表面120b上设置一下电路，且下电路电性连接上电路。发光装置(100a、100b)依序拼接，设置于电路基板120上。发光装置(100a、100b)的结构组成如图10所示(此处不再赘述)。驱动装置180a借由接触衬垫320设置于电路基板120的上表面120a，并电性连接上电路。驱动装置180b借由接触衬垫340设置于电路基板120的下表面120b，并电性连接下电路。在组件操作上，驱动装置(180a、180b)可分别调控发光装置(100a、100b)。
图12所示的电子装置500可为一种拼接式显示器(tiled display)，例如由前述相同或不同的发光二极管发光装置所组成的拼接式显示器，但不限于此。而发光二极管可包括例如有机发光二极管(organic light emitting diode，OLED)、无机发光二极管(inorganic light emitting diode)、次毫米发光二极管(mini LED)、微发光二极管(micro LED)或量子点发光二极管(quantum dot LED，QLED/QDLED)等，但本发明不限于此。在部分实施例中，电路基板120可包括印刷电路板(PCB)，例如，具有双面电路的印刷电路板(PCB)，但不限于此。
请参阅图13A～13D，根据本发明的一实施例，提供一种电子装置的制造方法。图13A～13D为电子装置制造方法的剖面示意图。
如图13A所示，提供薄膜晶体管阵列已设置其上的阵列基板140，其上另设置有多个连接衬垫680。
如图13B所示，将光吸收层240覆盖在阵列基板140上。借由接触衬垫320将发光单元160接合在阵列基板140上。将保护层580覆盖在光吸收层240与发光单元160的表面。在部分实例中，亦可选择性地将包含发光单元160的多个封装单元(例如图11中的封装单元600)借由接触衬垫320接合在阵列基板140上。
如图13C所示，将粘着层260贴合在电路基板120上。在部分实施例中，粘着层260包括由导电粒子640与绝缘胶材660所组成的异方性导电胶(Anisotropic Conductive Film；ACF)。可借由接触衬垫340将驱动装置180接合在电路基板120的底部。
如图13D所示，借由粘着层260将阵列基板140贴合在电路基板120上。至此，即完成图13A～13D所示实施例电子装置100的制作。
以上概述数个实施例的部件，以便在本领域技术人员可以更理解本发明实施例的观点。在本领域技术人员应该理解，他们能以本发明实施例为基础，设计或修改其他制程和结构以达到与在此介绍的实施例相同的目的及/或优势。在本领域技术人员也应该理解到，此类等效的结构并无悖离本发明的精神与范围，且他们能在不违背本发明的精神和范围的下，做各式各样的改变、取代和替换。因此，本发明的保护范围当视所附的权利要求书所界定者为准。另外，虽然本发明已以数个较佳实施例揭露如上，然其并非用以限定本发明。
整份说明书对特征、优点或类似语言的引用，并非意味可以利用本发明实现的所有特征和优点应该或者可以在本发明的任何单个实施例中实现。相对地，涉及特征和优点的语言被理解为其意味着结合实施例描述的特定特征、优点或特性包括在本发明的至少一个实施例中。因而，在整份说明书中对特征和优点以及类似语言的讨论可以但不一定代表相同的实施例。
再者，在一个或多个实施例中，可以任何合适的方式组合本发明的所描述的特征、优点和特性。根据本文的描述，相关领域的技术人员将意识到，可在没有特定实施例的一个或多个特定特征或优点的情况下实现本发明。在其他情况下，在某些实施例中可辨识附加的特征和优点，该多个特征和优点可能不存在于本发明的所有实施例中。

Claims (10)

1.一种电性连接结构，其特征在于，包括：
一穿孔，具有一第一末端与一第二末端；
一第一衬垫，至少部分包围该穿孔的该第一末端，并电性连接一第一电路；
一第二衬垫，位于该穿孔的该第二末端，并电性连接一第二电路；以及
一导电桥，借由该穿孔电性连接该第一衬垫与该第二衬垫，以使该第一电路与该第二电路彼此电性连接。
2.如权利要求1所述的电性连接结构，其特征在于，该第一衬垫完全围绕该穿孔的该第一末端，并呈现一封闭环的形式。
3.如权利要求1所述的电性连接结构，其特征在于，该第一衬垫的材料包括铜、镍、或金。
4.如权利要求1所述的电性连接结构，其特征在于，该电性连接结构电性连接一第一电子组件与一第二电子组件。
5.如权利要求4所述的电性连接结构，其特征在于，该第一电子组件包括一基板，承载该第一电路，该穿孔形成于该基板中，且该第一衬垫形成于该基板上。
6.如权利要求4所述的电性连接结构，其特征在于，该第二电子组件包括一印刷电路板，承载该第二电路，且该第二衬垫形成于该印刷电路板上。
7.如权利要求1所述的电性连接结构，其特征在于，该导电桥的材料包括金、铜、或锡膏。
8.一种电子装置，其特征在于，包括：
如权利要求1所述的电性连接结构。
9.如权利要求8所述的电子装置，其特征在于，该电子装置包括一有机发光二极管发光装置。
10.如权利要求8所述的电子装置，其特征在于，该电子装置包括一发光二极管发光装置。
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