CN113924662A - 具有悬臂电极的发光元件、具有其的显示面板及显示装置 - Google Patents
具有悬臂电极的发光元件、具有其的显示面板及显示装置 Download PDFInfo
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- CN113924662A CN113924662A CN202080039836.6A CN202080039836A CN113924662A CN 113924662 A CN113924662 A CN 113924662A CN 202080039836 A CN202080039836 A CN 202080039836A CN 113924662 A CN113924662 A CN 113924662A
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- led stack
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- light emitting
- emitting element
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- 239000010410 layer Substances 0.000 claims description 98
- 239000000758 substrate Substances 0.000 claims description 95
- 239000012790 adhesive layer Substances 0.000 claims description 29
- 229910052751 metal Inorganic materials 0.000 claims description 21
- 239000002184 metal Substances 0.000 claims description 21
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 229910052697 platinum Inorganic materials 0.000 claims description 2
- 238000003475 lamination Methods 0.000 claims 4
- 239000004065 semiconductor Substances 0.000 description 18
- 238000000034 method Methods 0.000 description 13
- 239000000463 material Substances 0.000 description 8
- 239000000470 constituent Substances 0.000 description 7
- 239000000126 substance Substances 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 238000005452 bending Methods 0.000 description 5
- 239000003086 colorant Substances 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 238000001723 curing Methods 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 239000012044 organic layer Substances 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229920001486 SU-8 photoresist Polymers 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000000149 argon plasma sintering Methods 0.000 description 1
- 230000003190 augmentative effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000006229 carbon black Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 238000001017 electron-beam sputter deposition Methods 0.000 description 1
- 238000000313 electron-beam-induced deposition Methods 0.000 description 1
- 238000013007 heat curing Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229920003229 poly(methyl methacrylate) Polymers 0.000 description 1
- 229920000052 poly(p-xylylene) Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000004926 polymethyl methacrylate Substances 0.000 description 1
- 230000003014 reinforcing effect Effects 0.000 description 1
- 238000006748 scratching Methods 0.000 description 1
- 230000002393 scratching effect Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
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-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/71—Means for bonding not being attached to, or not being formed on, the surface to be connected
- H01L24/72—Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
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- H—ELECTRICITY
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
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- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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- H01L2224/1308—Plural core members being stacked
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Abstract
本发明涉及一种具有悬臂电极的发光元件、具有其的显示面板及显示装置。根据一实施例的发光元件包括:至少一个LED叠层;电极垫,布置于所述LED叠层上;以及悬臂电极,分别布置于所述电极垫上,其中,各个悬臂电极具有固定于电极垫的固定端以及与电极垫隔开的自由端。
Description
技术领域
本发明涉及一种发光二极管显示面板、具有该发光二极管显示面板的显示装置及其制造方法。
背景技术
发光二极管作为无机光源,被多样地用于显示装置、车辆用灯具、一般照明等多种领域。发光二极管具有寿命长、功耗低且响应速度快的优点,因此正快速地替代现有光源。
另外,现有的发光二极管在显示装置中主要用作背光源。但是,最近正在开发利用发光二极管直接实现图像的LED显示器。
显示装置通常利用蓝色、绿色及红色的混合色实现多样的颜色。显示装置为了实现多样的图像而包括多个像素,各个像素配备蓝色、绿色及红色的子像素,并且通过这些子像素的颜色来确定特定像素的颜色,并且通过这些像素的组合来实现图像。
LED可以根据其材料发出多样颜色的光,从而可以通过将发出蓝色、绿色及红色的单个LED芯片排列于二维平面上来提供显示装置。
现有的大型电子屏所使用的LED在被制成封装件后,发光二极管封装件以像素单位排设,因此将单个封装件贴装于电路基板。然而,为了实现清晰的画质,智能手表或移动电话或者VR头盔或AR眼镜等小型电子产品的显示器或TV等的显示器需要贴装尺寸比现有的LED封装件更小的微型LED。
由于小尺寸的LED难以操作,因此难以单独地贴装于电路基板上。因此,正在研究利用在基板上生长的半导体层形成多个LED并将这些对应于像素间隔而集体地转印到显示电路基板上的方法。然而,在将多个LED集体地进行转印的期间在一部分LED可能发生不良。尤其,由于显示电路基板与支撑LED的支撑基板之间的热膨胀系数差异可能导致转印的LED无法全部电连接到显示电路基板上的垫。在这种情况下,需要将不良LED个别地替换为良好的LED,但是由于LED较小的尺寸导致替换不良LED极其困难。因此,需要一种能够将集体转印的LED安全地转印到电路基板而不会发生不良的显示装置。
另外,由于将子像素排列在二维平面上,因此包括蓝色、绿色及红色子像素的一个像素占有的面积相对变大。因此,为了将子像素排列在有限的面积内,必须缩小各个LED芯片的面积。但是,减小LED芯片的尺寸可能导致难以贴装LED芯片,进而造成发光面积的减小。
发明内容
技术问题
本发明要解决的课题在于提供一种适合集体地转印到电路基板的发光元件。
本发明要解决的又一课题在于提供一种能够将多个发光元件安全地转印到电路基板的LED显示面板以及具有该LED显示面板的显示装置。
本发明要解决的又一课题在于提供一种能够加固发光元件与电路基板的垫之间的电连接的LED显示面板以及具有该LED显示面板的显示装置。
本发明要解决的又一课题在于提供一种安全地转印能够在有限的像素面积内增加各个子像素的面积的显示用发光元件的方法以及显示装置。
技术方案
根据本发明的一实施例的发光元件包括:至少一个LED叠层;电极垫,布置于所述LED叠层上;以及悬臂电极,分别布置于所述电极垫上,其中,各个悬臂电极具有固定于电极垫的固定端以及与电极垫隔开的自由端。
根据本发明的一实施例的显示面板包括:电路基板,具有垫;发光元件,电连接于所述垫而排设于所述电路基板上;以及粘结层,布置于所述电路基板与所述发光元件之间而粘结所述电路基板与所述发光元件,其中,所述发光元件分别包括:至少一个LED叠层;电极垫,布置于所述LED叠层上;以及悬臂电极,分别布置于所述电极垫上,其中,各个悬臂电极具有固定于电极垫的固定端以及与电极垫隔开的自由端,所述自由端电连接于所述电路基板的垫。
根据本发明的一实施例的显示装置,包括显示面板,所述显示面板包括:电路基板,具有垫;发光元件,电连接于所述垫而排设于所述电路基板上;以及粘结层,布置于所述电路基板与所述发光元件之间而粘结所述电路基板与所述发光元件,其中,所述发光元件分别包括:至少一个LED叠层;电极垫,布置于所述LED叠层上;以及悬臂电极,分别布置于所述电极垫上,其中,各个悬臂电极具有固定于电极垫的固定端以及与电极垫隔开的自由端,所述自由端电连接于所述电路基板的垫。
附图说明
图1是用于说明根据本发明的实施例的显示装置的示意性的立体图。
图2是用于说明根据本发明的一实施例的显示面板的示意性的平面图。
图3是沿图2的截取线A-A截取的示意性的放大剖视图。
图4a是用于说明根据本发明的一实施例的发光元件的示意性的平面图,图4b是为了说明根据本发明的一实施例的发光元件而沿图4a的截取线B-B截取的示意性的剖视图。
图5是用于说明根据本发明的一实施例的发光元件的悬臂电极的示意性的剖视图。
图6是用于说明根据本发明的一实施例的发光元件的示意性的电路图。
图7是用于说明根据本发明的又一实施例的发光元件的示意性的电路图。
图8a及图8b是用于说明根据本发明的一实施例的发光元件制造方法的示意性的剖视图。
图9a、图9b及图9c是用于说明制造根据本发明的一实施例的显示面板的方法的示意性的剖视图。
最优实施方式
以下,参照附图详细说明本发明的实施例。为了能够将本发明的思想充分传递给本发明所属技术领域的通常技术人员,作为示例提供以下介绍的实施例。因此,本发明并不限定于如下所述的实施例,其可以具体化为其他形态。另外,在附图中,也可能为了便利而夸张表现构成要素的宽度、长度、厚度等。并且,当记载为一个构成要素位于另一构成要素的“上部”或“上”时,不仅包括各部分均“直接”位于其他部分的“上部”或“上”的情形,还包括各构成要素与另一构成要素之间夹设有又一构成要素的情形。在整个说明书中,相同的附图标号表示相同的构成要素。
根据本发明的一实施例的发光元件包括:至少一个LED叠层;电极垫,布置于所述LED叠层上;以及悬臂电极,分别布置于所述电极垫上,其中,各个悬臂电极具有固定于电极垫的固定端以及与电极垫隔开的自由端。
通过采用悬臂电极,相比于现有的利用焊料或凸起垫的发光元件的转印,能够更安全地将多个发光元件转印到电路基板。
所述悬臂电极的自由端可以向远离所述至少一个LED叠层的方向弯曲。据此,所述自由端可以提供尖锐的尖点,通过所述自由端的尖点能够达到稳定的电连接。
进而,所述悬臂电极可以包括热膨胀系数互不相同的至少两个金属层。能够利用热膨胀系数差异诱发悬臂电极的弯曲。
另外,所述至少一个LED叠层可以包括:第一LED叠层;第二LED叠层及第三LED叠层,所述发光元件可以包括:第一键合层,夹设于所述第一LED叠层与第二LED叠层之间;以及第二键合层,夹设于所述第二LED叠层与第三LED叠层之间,其中,所述第一LED叠层至第三LED叠层可以射出互不相同的波长的光,所述电极垫可以电连接于所述第一LED叠层至第三LED叠层,以独立驱动所述第一LED叠层至第三LED叠层。
所述发光元件的最大宽度可以为100μm以下,进而可以为50μm以下,尤其可以为10μm以下。宽度为10μm以下的具有小尺寸的发光元件难以利用焊料或凸起垫转印到电路基板。本发明的悬臂电极尤其有助于将小型的发光元件集体地转印。
根据本发明的一实施例的显示面板包括:电路基板,具有垫;发光元件,电连接于所述垫而排设于所述电路基板上;以及粘结层,布置于所述电路基板与所述发光元件之间而粘结所述电路基板与所述发光元件,其中,所述发光元件分别包括:至少一个LED叠层;电极垫,布置于所述LED叠层上;以及悬臂电极,分别布置于所述电极垫上,其中,各个悬臂电极具有固定于电极垫的固定端以及与电极垫隔开的自由端,所述自由端电连接于所述电路基板的垫。
所述发光元件可以以100μm以下的间距排列,进而可以以50μm以下的间距排列,尤其可以以10μm以下的间距排列。
在若干实施例中,所述悬臂电极中的至少一个悬臂电极的自由端可以向所述至少一个LED叠层区域的外侧延伸。在另一实施例中,所述悬臂电极可以位于所述至少一个LED叠层区域内。
在一实施例中,所述悬臂电极可以包括热膨胀系数互不相同的至少两个金属层。利用这些金属层的热膨胀系数差异能够诱发悬臂电极的弯曲。
所述金属层例如可以选自Ni、Co、Cu、Ti、Al或Pt,然而本发明的金属层并不局限于此。
所述至少一个LED叠层可以包括:第一LED叠层;第二LED叠层及第三LED叠层,所述发光元件可以包括:第一键合层,夹设于所述第一LED叠层与第二LED叠层之间;以及第二键合层,夹设于所述第二LED叠层与第三LED叠层之间,其中,所述第一LED叠层至第三LED叠层可以射出互不相同的波长的光,所述电极垫可以电连接于所述第一LED叠层至第三LED叠层,以独立驱动所述第一LED叠层至第三LED叠层。
并且,所述发光元件可以将在所述第一LED叠层至第三LED叠层生成的光通过所述第三LED叠层射出。
另外,所述第三LED叠层可以从生长基板分离。即,所述发光元件可以不包括为了生长所述第三LED叠层而使用的生长基板。
所述粘结层可以部分地覆盖所述发光元件的侧面。并且,所述粘结层可以利用固化树脂形成。
根据本发明的一实施例的显示装置,包括显示面板,所述显示面板包括:电路基板,具有垫;发光元件,电连接于所述垫而排设于所述电路基板上;以及粘结层,布置于所述电路基板与所述发光元件之间而粘结所述电路基板与所述发光元件,其中,所述发光元件分别包括:至少一个LED叠层;电极垫,布置于所述LED叠层上;以及悬臂电极,分别布置于所述电极垫上,其中,各个悬臂电极具有固定于电极垫的固定端以及与固定端隔开的自由端,所述自由端电连接于所述电路基板的垫。
所述发光元件可以以100μm以下的间距排列,进而可以以50μm以下的间距排列,尤其可以以10μm以下的间距排列。
所述悬臂电极可以分别包括热膨胀系数互不相同的至少两个金属层。
所述至少一个LED叠层可以分别包括第一LED叠层、第二LED叠层及第三LED叠层,第一LED叠层至第三LED叠层射出互不相同的波长的光,所述发光元件将在所述第一LED叠层至第三LED叠层生成的光通过所述第三LED叠层射出。
以下,参照附图对本发明的实施例进行具体说明。
图1是用于说明根据本发明的实施例的显示装置的示意性的立体图。
本发明的发光元件不受特别的限定,但是特别地,可以使用于智能手表1000a、诸如虚拟现实头盔(VR headset)1000b的VR显示装置或者诸如增强现实眼镜1000c的AR显示装置内。尤其,对于AR显示装置而言,像素间隔非常小,约为10μm,本发明的发光元件适合于解决在这种具有窄间距的像素的显示装置中所发生的问题。然而,本发明的发光元件并不局限于具有窄间距的像素的显示装置,可以应用于具有相对更宽间距的像素的显示装置。
另外,显示装置内贴装有用于呈现图像的显示面板。图2是用于说明根据本发明的一实施例的显示面板1000的示意性的平面图,图3是沿图2的截取线A-A截取的剖视图。
参照图2及图3,显示面板包括电路基板1001、发光元件100及粘结层1005。
电路基板1001或面板基板可以包括用于无源矩阵驱动或有源矩阵驱动的电路。在一实施例中,电路基板1001在内部可以包括布线及电阻器。在另一实施例中,电路基板1001可以包括布线、晶体管及电容器。电路基板1001还可以在上表面具有用于允许电连接到布置在内部的电路的垫1003。
多个发光元件100在电路基板1001上排设。发光元件100可以是具有微单位尺寸的小型发光元件,并且宽度W1可以为约100μm以下,进而可以为约50μm以下,尤其可以为约10μm以下。发光元件100例如可以具有100μm×100μm以下的尺寸,进而可以具有10μm×10μm以下的尺寸。在一实施例中,在发光元件100排设的方向上,发光元件100之间的间隔L1可以在该方向上大于发光元件100的宽度W1。然而,本发明并不局限于此,间隔L1也可以小于发光元件100的宽度W1。间距可以表示为宽度W1与间隔L1的和。发光元件100的间距可以为约100μm以下,进而可以为约50μm以下,尤其可以为约10μm以下。
发光元件100可以具有电极垫101及悬臂电极103,悬臂电极103可以电连接于电路基板1001上的垫1003。例如,悬臂电极103可以具有自由端(free standing edge),并且自由端电连接于在电路基板1001上暴露的垫1003。
电极垫101可以具有彼此相同的尺寸,也可以具有互不相同的尺寸。电极垫101可以具有相对大的面积,悬臂电极103可以分别形成于电极垫101上。
粘结层1005将发光元件100粘结到电路基板1001。粘结层1005布置于发光元件100与电路基板1001之间,从而防止悬臂电极103从电路基板1001的垫1003隔开。进而,粘结层1005可以在发光元件100之间的区域覆盖电路基板1001。
粘结层1005可以覆盖悬臂电极103及电极垫101并相接于发光元件100的下表面。粘结层1005的上表面大致位于发光元件100的下表面下方。粘结层1005的一部分可以部分地覆盖发光元件100的侧面。
作为粘结层1005物质可以使用多样的粘结物质,尤其,可以利用热固化或者紫外线固化粘结剂形成。并且,粘结层1005可以利用对光透明的物质形成,然而本发明并不局限于此。例如,粘结层1005可以反射光或吸收光,为此,在粘结层1005可以含有反光物质或吸光物质。例如,在粘结层1005内可以含有诸如炭黑等吸光物质,或者诸如二氧化硅等光散射物质。
另外,虽然图2及图3未图示,但是在发光元件100之间的区域可以布置有阻光物质层。阻光物质层吸收光或反射光,因此防止发生发光元件之间的光干涉,从而提高显示器的对比度。
在本实施例中,各个发光元件100可以构成一个像素。例如,各个发光元件100可以包括蓝色、绿色及红色的子像素。
参照图4a、图4b、图5及图6对发光元件100的具体构成进行说明。图4a及图4b是用于说明根据本发明的一实施例的发光元件100的示意性的平面图及剖视图,图5是用于说明根据本发明的一实施例的发光元件100的悬臂电极103的示意性的剖视图,图6是用于说明根据本发明的一实施例的发光元件100的示意性的电路图。为了便于说明,在图4a及图4b中图示并说明了悬臂电极103:103a、103b、103c、103d布置于上侧的情形,但是发光元件100如图3所示地倒装键合于电路基板1001上,在这种情况下,悬臂电极103:103a、103b、103c、103d布置于下侧。
首先,参照图4a及图4b,发光元件100可以包括第一LED叠层23、第二LED叠层33、第三LED叠层43、第一键合层30、第二键合层40、第一绝缘层51、电极垫101a、101b、101c、101d及悬臂电极103a、103b、103c、103d。
第一LED叠层23、第二LED叠层33及第三LED叠层43可以分别利用生长在互不相同的生长基板上的半导体层形成,并且生长基板可以全部从第一LED叠层23、第二LED叠层33及第三LED叠层43被去除。因此,发光元件100可以不包括为了生长第一LED叠层23、第二LED叠层33及第三LED叠层43而使用的基板。但是,本发明并不一定局限于此,也可以使至少一个生长基板不被去除而残留。
在本发明的实施例中,第一LED叠层23、第二LED叠层33、第三LED叠层43沿垂直方向层叠。第一LED叠层23、第二LED叠层33及第三LED叠层43各自包括第一导电型半导体层23a、33a、43a、第二导电型半导体层23c、33c、43c以及置于其之间的活性层23b、33b、43b。活性层尤其可以具有多量子阱结构。
在第一LED叠层23下方布置有第二LED叠层33,在第二LED叠层33下方布置有第三LED叠层43。为了便于说明,在本说明书中对在第一LED叠层23下方布置有第二LED叠层33,在第二LED叠层33下方布置有第三LED叠层43的情形进行说明,但是需要注意发光元件可以倒装键合,因此这些第一LED叠层至第三LED叠层的上下位置可以互换。
在第一LED叠层23、第二LED叠层33、第三LED叠层43生成的光最终通过第三LED叠层43向外部射出。因此,第一LED叠层23相比于第二LED叠层33及第三LED叠层43发出更长波长的光,第二LED叠层33相比于第三LED叠层43发出更长波长的光。例如,第一LED叠层23可以是发出红色光的无机发光二极管,第二LED叠层33可以是发出绿色光的无机发光二极管,第三LED叠层43可以是发出蓝色光的无机发光二极管。第一LED叠层23可以包括AlGaInP系列的阱层,第二LED叠层33可以包括AlGaInP系列或AlGaInN系列的阱层,并且第三LED叠层43可以包括AlGaInN系列的阱层。
由于第一LED叠层23相比于第二LED叠层33及第三LED叠层43发出更长波长的光,因此在第一LED叠层23生成的光可以透过第二LED叠层33及第三LED叠层43而向外部射出。并且,由于第二LED叠层33相比于第三LED叠层43发出更长波长的光,因此在第二LED叠层33生成的光可以透过第三LED叠层43而向外部射出。
另外,各个LED叠层23、33、43的第一导电型半导体层23a、33a、43a分别为n型半导体层,第二导电型半导体层23c、33c、43c可以分别为p型半导体层。并且,在本实施例中,虽然图示了第一LED叠层23、第二LED叠层33、第三LED叠层43的下表面全部为第一导电型半导体层,上表面全部为第二导电型半导体层的情形,但是也可以改变至少一个LED叠层的顺序。例如,第一LED叠层23的上表面可以为第一导电型半导体层23a,第二LED叠层33及第三LED叠层43的上表面全部为第二导电型半导体层33c、43c。
在本实施例中,第一LED叠层23、第二LED叠层33、第三LED叠层43相互重叠。并且,如图所示,第一LED叠层23、第二LED叠层33及第三LED叠层43可以具有大致相同大小的发光面积。但是,由于第一LED叠层23及第二LED叠层33可以具有用于允许电连接的贯通孔,因此可以具有比第三LED叠层43小的面积。
第一键合层30将第一LED叠层23结合于第二LED叠层33。第一键合层30可以布置于第一导电型半导体层23a与第二导电型半导体层33c之间。第一键合层30可以利用透明有机物层形成,或者可以利用透明无机物层形成。有机物层例如可以是SU8、聚甲基丙烯酸甲酯(PMMA:poly(methylmethacrylate))、聚酰亚胺、聚对二甲苯、苯并环丁烯(BCB:Benzocyclobutene)等,无机物层例如可以是Al2O3、SiO2、SiNx等。并且,第一键合层30也可以利用旋涂玻璃(SOG)形成。
第二键合层40将第二LED叠层33结合于第三LED叠层43。如图所示,第二键合层40可以布置于第一导电型半导体层33a与第二导电型半导体层43c之间。第二键合层40可以利用与上文针对第一键合层30说明的材料相同的材料形成,为了避免重复,省略详细说明。
第一绝缘层51可以覆盖第一LED叠层23。并且,第一绝缘层51还可以覆盖第一LED叠层23、第二LED叠层33及第三LED叠层43的侧面。第一绝缘层51可以利用硅氧化膜或硅氮化膜形成。
电极垫101:101a、101b、101c、101d可以布置于第一绝缘层51上。电极垫101a、101b、101c、101d可以通过第一绝缘层51电连接于第一LED叠层23、第二LED叠层33及第三LED叠层43。
悬臂电极103:103a、103b、103c、103d分别形成于电极垫101a、101b、101c、101d上。悬臂电极103a、103b、103c、103d分别包括结合于电极垫101a、101b、101c、101d的固定端和自由端。自由端与电极垫101a、101b、101c、101d沿竖直方向隔开,在电极垫101a、101b、101c、101d与悬臂电极的自由端之间提供能够允许自由端竖直方向下降的充分的空间。
如图4a所示,悬臂电极103a、103b、103c、103d布置为彼此电隔离。悬臂电极103a、103b、103c、103d可以以相互交叉的方式布置,然而并不局限于此,可以以多样的方式排列。悬臂电极103a、103b、103c、103d的自由端可以连接于电路基板(图3的1001)的垫1003,因此电路基板的垫1003以与自由端的排列对应的方式排列。
在一实施例中,悬臂电极103a、103b、103c、103d的自由端可以全部布置于第一LED叠层23、第二LED叠层33、第三LED叠层43的区域内。在另一实施例中,自由端可以布置于第一LED叠层23、第二LED叠层33、第三LED叠层43的区域外。据此,可以将布置于电路基板1001上的垫1003布置为比电极垫101a、101b、101c、101d更宽。
另外,如图5所示,悬臂电极103可以由多重金属层113a、113b、113c形成。例如,第一金属层113a和第二金属层113b可以具有互不相同的热膨胀系数,据此,悬臂电极103的自由端可以向上弯曲。悬臂电极103的自由端的弯曲生成与电路基板1001的垫1003连接的尖锐的尖点。据此,自由端的尖锐的尖点划伤垫1003的表面而确保电连接。在本实施例中,悬臂电极103的上表面与侧面构成的角度(即,自由端的尖点的角度)可以根据悬臂电极形成方法进行多样的变更。例如,在利用镀覆技术形成悬臂电极103的情况下,尖点的角度可以大约为90度,在通过电子束蒸发法或溅射技术等沉积金属层后利用剥离技术的情况下,尖点的角度可以是大于90度的钝角。
为了悬臂电极103的弯曲,第一金属层113a的热膨胀系数可以小于第二金属层113b的热膨胀系数。第一金属层113a及第二金属层113b例如可以从Ti、Ni、Co、Cu、Al、Pt、W、Cr等中选择。例如,第一金属层113a可以为Ti,第一金属层113b可以为Ni。另外,第三金属层113c可以为了保护悬臂电极103的表面而形成,例如,可以利用Au形成。
参照图6,悬臂电极103a、103b、103c可以分别电连接于第一LED叠层23、第二LED叠层33、第三LED叠层43的阳极,并且悬臂电极103d共同连接于第一LED叠层23、第二LED叠层33、第三LED叠层43的阴极。为了电连接悬臂电极103a、103b、103c与第一LED叠层23、第二LED叠层33、第三LED叠层43的阳极,可以在第一LED叠层23、第二LED叠层33、第三LED叠层43的第二导电型半导体层23c、33c、43c中的至少一个上形成透明电极。
另外,在本实施例中,虽然对悬臂电极103d共同连接于第一LED叠层23、第二LED叠层33、第三LED叠层43的阴极的情形进行了说明,但是如图7所示,悬臂电极103d也可以共同连接于第一LED叠层23、第二LED叠层33、第三LED叠层43的阳极。在这种情况下,悬臂电极103a、103b、103c可以分别连接于第一LED叠层23、第二LED叠层33、第三LED叠层43的阴极。
在本实施例中,可以通过悬臂电极103a、103b、103c、103d独立地驱动第一LED叠层23、第二LED叠层33、第三LED叠层43。
图8a及图8b是用于说明根据本发明的一实施例的发光元件制造方法的示意性的剖视图。
参照图8a,在基板41上形成LED叠层(图4b的23、33、43)的层叠体100a。LED叠层23、33、43可以通过第一键合层30及第二键合层40彼此键合。
另外,基板41可以是用于使LED叠层43生长的生长基板,例如可以是氮化镓基板、SiC基板、蓝宝石基板或图案化的蓝宝石基板。
在本实施例中,虽然图示了在基板41上形成一个层叠体100a的情形,但是在基板41上可以形成多个层叠体100a。并且,层叠体100a还可以包括绝缘层(图4b的51)。
在层叠体100a上形成电极垫101。电极垫101电连接于LED叠层23、33、43。如图4a所示,可以在一个层叠体100a上形成四个电极垫101。
接着,形成覆盖所述电极垫101的牺牲层102。牺牲层102可以利用诸如SiO2等介电层或光致抗蚀剂层等形成。牺牲层102具有使电极垫101暴露的开口部。虽然图8a中图示了使一个电极垫101暴露的开口部,但是在四个电极垫101上分别形成有开口部。
接着,利用剥离技术或沉积及蚀刻技术在牺牲层102上形成悬臂电极103。例如,用于形成悬臂电极103的物质层可以利用电子束沉积、溅射或镀覆技术而沉积,并且利用剥离技术或蚀刻技术对沉积的物质层进行图案化,从而能够在牺牲层102上形成悬臂电极103。
参照图8b,去除牺牲层102。此时,悬臂电极103可以从牺牲层102的束缚脱离而向上侧弯曲。通过利用热膨胀系数互不相同的金属层的多层结构形成悬臂电极103可以调节悬臂电极103向上弯曲。
在本实施例中,虽然对在生长基板41上在层叠体100a形成悬臂电极103的情形进行了说明,但是也可以在将形成于生长基板41的层叠体100a从基板41分离而转印到其他支撑基板之后,在支撑基板上形成悬臂电极103。
图9a、图9b及图9c是用于说明制造根据本发明的一实施例的显示面板的方法的示意性的剖视图。
参照图9a,在支撑基板141上排列有多个发光元件100。发光元件100包括悬臂电极103。发光元件100与参照图4a及图4b所述相同,因此为了避免重复而省略详细说明。
支撑基板141可以是用于使第三LED叠层43的半导体层43a、43b、43c生长的生长基板(图8a的41),然而并不局限于此,也可以是与生长基板41不同的支撑基板。例如,形成于生长基板41上的发光元件100可以从生长基板41分离而被转印到支撑基板141。发光元件100可以在支撑基板141上根据像素间隔排设。
参照图9b,在各个像素区域提供形成有垫1003的电路基板1001。垫1003可以以与发光元件100的悬臂电极103的自由端对应的方式布置。
粘结层1005形成为覆盖垫1003。粘结层1005例如可以利用热固型或紫外线固化型树脂形成。但是,在本步骤中涂覆粘结物质层之后,不执行固化。
参照图9c,排列于支撑基板141上的发光元件100朝向电路基板1001靠近,进而悬臂电极103连接于垫1003。悬臂电极103利用自由端的尖锐的尖点穿透粘结层1005而连接于垫1003。
并且,朝向电路基板1001对发光元件100加压,从而悬臂电极103能够划伤垫1003的上表面而易于形成电连接。通过对发光元件100加压,悬臂电极103能够向发光元件100侧弯曲。悬臂电极103的自由端与电极垫101充分隔开,从而防止悬臂电极103与电极垫101之间的电短路。
之后,固化粘结层1005而使发光元件100粘结到电路基板1001。粘结层1005可以通过热固化或紫外线固化等固化。
接着,可以将支撑基板141从发光元件100去除而完成显示面板(图2的1000)。在支撑基板141为诸如蓝宝石等生长基板的情况下,可以利用激光剥离技术从支撑基板141分离发光元件100。与此不同地,发光元件100可以以粘结层为媒介粘结于支撑基板141上,并且通过从粘结层分离发光元件100能够去除支撑基板141。
根据本发明的实施例,通过采用悬臂电极103能够可靠地将多个发光元件100转印到电路基板1001上。
以上,已对本发明的多样的实施例进行了说明,然而本发明并不限定于这些实施例。并且,在不脱离本发明的技术思想的范围内,对一个实施例说明的事项或构成要素也可以应用于其他实施例。
Claims (20)
1.一种发光元件,其特征在于,包括:
至少一个LED叠层;
电极垫,布置于所述LED叠层上;以及
悬臂电极,分别布置于所述电极垫上,
其中,各个悬臂电极具有固定于电极垫的固定端以及与电极垫隔开的自由端。
2.根据权利要求1所述的发光元件,其特征在于,
所述悬臂电极的自由端向远离所述至少一个LED叠层的方向弯曲。
3.根据权利要求1所述的发光元件,其特征在于,
所述悬臂电极包括热膨胀系数互不相同的至少两个金属层。
4.根据权利要求1所述的发光元件,其特征在于,
所述至少一个LED叠层包括:
第一LED叠层;
第二LED叠层;以及
第三LED叠层,
所述发光元件包括:
第一键合层,夹设于所述第一LED叠层与所述第二LED叠层之间;以及
第二键合层,夹设于所述第二LED叠层与所述第三LED叠层之间,
其中,所述第一LED叠层至所述第三LED叠层射出具有互不相同的波长的光,
所述电极垫以个别地驱动所述第一LED叠层至所述第三LED叠层的方式电连接于所述第一LED叠层至所述第三LED叠层。
5.根据权利要求1所述的发光元件,其特征在于,
最大宽度为10μm以下。
6.一种显示面板,其特征在于,包括:
电路基板,具有垫;
发光元件,电连接于所述垫而排设于所述电路基板上;以及
粘结层,布置于所述电路基板与所述发光元件之间而粘结所述电路基板与所述发光元件,
其中,所述发光元件分别包括:
至少一个LED叠层;
电极垫,布置于所述LED叠层上;以及
悬臂电极,分别布置于所述电极垫上,
其中,各个悬臂电极具有固定于电极垫的固定端以及与电极垫隔开的自由端,
所述自由端电连接于所述电路基板的垫。
7.根据权利要求6所述的显示面板,其特征在于,
所述发光元件以50μm以下的间距排列。
8.根据权利要求6所述的显示面板,其特征在于,
所述发光元件以10μm以下的间距排列。
9.根据权利要求6所述的显示面板,其特征在于,
所述悬臂电极中的至少一个悬臂电极的自由端向所述至少一个LED叠层区域的外侧延伸。
10.根据权利要求6所述的显示面板,其特征在于,
所述悬臂电极包括热膨胀系数互不相同的至少两个金属层。
11.根据权利要求10所述的显示面板,其特征在于,
所述金属层选自Ni、Co、Cu、Ti、Al、Ti或Pt。
12.根据权利要求6所述的显示面板,其特征在于,
所述至少一个LED叠层包括:
第一LED叠层;
第二LED叠层;以及
第三LED叠层,
所述发光元件包括:
第一键合层,夹设于所述第一LED叠层与所述第二LED叠层之间;以及
第二键合层,夹设于所述第二LED叠层与所述第三LED叠层之间,
其中,所述第一LED叠层至所述第三LED叠层射出具有互不相同的波长的光,
所述电极垫以个别地驱动所述第一LED叠层至所述第三LED叠层的方式电连接于所述第一LED叠层至第三LED叠层。
13.根据权利要求12所述的显示面板,其特征在于,
所述发光元件将在所述第一LED叠层至所述第三LED叠层生成的光通过所述第三LED叠层射出。
14.根据权利要求13所述的显示面板,其特征在于,
所述第三LED叠层从生长基板分离。
15.根据权利要求12所述的显示面板,其特征在于,
所述粘结层部分地覆盖所述发光元件的侧面。
16.根据权利要求15所述的显示面板,其特征在于,
所述粘结层利用固化树脂形成。
17.一种显示装置,包括显示面板,其特征在于,
所述显示面板包括:
电路基板,具有垫;
发光元件,电连接于所述垫而排设于所述电路基板上;以及
粘结层,布置于所述电路基板与所述发光元件之间而粘结所述电路基板与所述发光元件,
其中,所述发光元件分别包括:
至少一个LED叠层;
电极垫,布置于所述LED叠层上;以及
悬臂电极,分别布置于所述电极垫上,
其中,各个悬臂电极具有固定于电极垫的固定端以及与电极垫隔开的自由端,
所述自由端电连接于所述电路基板的垫。
18.根据权利要求17所述的显示装置,其特征在于,
所述发光元件以10μm以下的间距排列。
19.根据权利要求17所述的显示装置,其特征在于,
所述悬臂电极分别包括热膨胀系数互不相同的至少两个金属层。
20.根据权利要求17所述的显示装置,其特征在于,
所述至少一个LED叠层分别包括第一LED叠层、第二LED叠层及第三LED叠层,第一LED叠层至所述第三LED叠层射出具有互不相同的波长的光,
所述发光元件将在所述第一LED叠层至所述第三LED叠层生成的光通过所述第三LED叠层射出。
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