CN112997407B - 采用引线框架和薄介电层掩膜焊垫限定的低电感激光驱动器封装 - Google Patents

采用引线框架和薄介电层掩膜焊垫限定的低电感激光驱动器封装 Download PDF

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CN112997407B
CN112997407B CN201980072397.6A CN201980072397A CN112997407B CN 112997407 B CN112997407 B CN 112997407B CN 201980072397 A CN201980072397 A CN 201980072397A CN 112997407 B CN112997407 B CN 112997407B
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dielectric layer
circuit package
laser driver
package
pcb
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CN112997407A (zh
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加布里埃尔·查理博伊斯
剧锦瀚
劳伦斯·戈德弗里
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Excelitas Canada Inc
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Abstract

一种表面可安装式激光驱动器电路封装，配置成安装在主印刷电路板(PCB)上。表面安装式电路封装包括引线框架。多个激光驱动器电路元件安装在表面安装式电路封装的引线框架上并与表面安装式电路封装的引线框架电连通。介电层位于引线框架和主PCB之间并且包括穿过介电层的多个入口，每个入口被布置为容纳引线框架和主PCB之间的电连接。引线框架和介电层被布置成使得第一引线框架部分和第一介电层入口与主PCB走线的第一端部对准，并且第二引线框架部分和第二介电层入口与主PCB走线的第二端部对准，所述主PCB走线配置成提供用于表面安装式激光驱动器的电流返回路径。

Description

采用引线框架和薄介电层掩膜焊垫限定的低电感激光驱动器 封装
本申请要求2018年10月30日提交的标题为“高速开关电路配置”的美国临时专利申请62/752,460的权益，其全部内容通过引用并入本文。
技术领域
本发明涉及电子电路，更具体地，涉及用于高速开关电路的封装。
背景技术
图1A示出了基本开关电路100，其中具有漏极D和源极S的电子开关116经过负载(或电流阱(sink)114)连接到电容器112。电容器112可以通过连接CA被充电。目前，这种电路的电路布局不足以使开关电路100产生满足某些特定幅值和持续时间规格的脉冲。对于快速大电流脉冲，例如，具有几纳秒持续时间的脉冲宽度和大于一安培的幅值的脉冲，电路元件的物理布局是至关重要的。不合适的布局，特别是元件之间过大的电引线距离增加了图1B中所示的电流回路180中的电感和/或电阻，这降低了可流过电路100的电流的峰值电平并增加了脉冲宽度持续时间。因此，工业上需要解决上述缺点。
发明内容
本发明的实施例提供了使用引线框架和薄介电层掩膜焊垫限定的低电感激光驱动器封装及其制造方法。简而言之，本发明涉及用于安装在主印刷电路板(PCB)上的激光驱动器电路封装。表面安装式电路封装包括引线框架。多个激光驱动器电路元件安装在表面安装式电路封装的引线框架上并与表面安装式电路封装的引线框架电连通。介电层位于引线框架和主PCB之间并且包括穿过介电层的多个入口，每个入口被布置为容纳引线框架和主PCB之间的电连接。引线框架和介电层被布置成使得第一引线框架部分和第一介电层入口与主PCB走线的第一端部对准，并且第二引线框架部分和第二介电层入口与主PCB走线的第二端部对准，所述主PCB走线配置成提供用于表面安装式激光驱动器的电流返回路径。
在研究以下附图和详细描述之后，本发明的其它系统，方法和特征对于本领域的普通技术人员将会更为清楚或变得更为清楚。所有这些附加的系统，方法和特征都包括在本说明书中，都在本发明的范围内，并由所附的权利要求书保护。
附图说明
本申请的附图使得能够对本发明的进一步理解，并且被结合在本说明书中并构成本说明书的一部分。附图中的元件不一定按比例绘制，而是为了更为清楚地说明本发明的原理。附图示出了本发明的实施例，并且与说明书一起用于阐述本发明的原理。
图1A是现有技术的开关电路的电路图。
图1B示出了图1A的现有技术开关电路的电路图并指示出电流回路。
图2是安装到PCB上的扁平无引线封装中的集成电路的示意性侧剖视图。
图3示出了使用堆叠的PCB的低电感激光驱动器封装的功能特性。
图4是使用引线框架和焊接掩膜的堆叠的电路的第一示例性实施例的示意图。
图5是图4所示的第一实施例的扁平无引线封装的立体透视图。
图6示出了图4所示的第一实施例的引线框架的示例。
图7示出了图4所示的第一实施例的焊接掩膜布局的示例。
图8是图4所示的第一实施例的组装电路的示意性立体图。
图9是用于形成低电感激光器驱动器封装的方法的示例性实施例的流程图。
具体实施方式
以下定义对于解释应用于本文公开的实施例的特征的术语是有用的，并且仅意味着定义本申请内的要素。
如在本公开中所使用的，“引线框架”是指芯片封装(或仅指“封装”)内部的金属结构，其将信号从芯片封装内部的一个或多个管芯传送到芯片封装的外部。引线框架通常通过从铜或铜合金的平板去除材料来制造。例如，可以通过蚀刻(通常适于高密度的引线)或冲压(通常适于低密度的引线)来形成引线框架。引线框架被使用在扁平无引线封装，扁平封装或双列直插式封装(DIP)的制造中。
如本公开中所使用的，“通孔”或“过孔”是指印刷电路板中利于实现印刷电路板的两侧的元件之间的电连通的孔或开口。“入口”(portal)是指焊接掩膜和/或介电层中利于实现其两侧的元件之间的电连通的孔或开口。
如本公开中所使用的，“扁平无引线封装”是将集成电路(IC)物理连接和电连接到印刷电路板(PCB)的制造结构。扁平无引线(也称为微引线框架(micro lead-frame，MLF)和小外形无引线(small-outline no leads，SON))是多种将IC连接到PCB表面的封装技术中的一种表面安装技术，并且通常不存在通孔。扁平无引线是用平的铜引线框架衬底制造的近芯片级的塑料封装式封装。封装底部(附接时与PCB相邻的部分)上的周边焊盘提供了与PCB的电连接。扁平无引线封装可包括暴露的导热垫以改善离开IC(进入PCB)热传递。通过导热垫中的金属过孔可以进一步促进热传递。封装内的单个管芯或多个管芯固定(例如胶合)到引线框架，并且键合线(bond wires)将管芯焊垫附接到引线。通常，在制造过程的最后阶段，引线框架被模制在塑料壳体中，并且引线框架的外部被修剪，从而将所有引线分隔开。虽然本文描述的实施例涉及扁平无引线封装，但应了解，替代实施例可使用类似方式的其它封装，例如陶瓷封装。
为了区分封装内的PCB和外部PCB(所述封装安装到该外部PCB上)，外部PCB在本文中被称为“主PCB”，并且封装内的PCB被称为“内部PCB”。本文所述的封装的实施例可省略内部PCB。
如本发明中所使用，“垂直”是指与封装中的一个或多个封装PCB正交的方向，而“水平”是指与一个或多个封装PCB平行的方向。通常，封装底部是指封装的安装到安装表面(通常是位于封装外部的PCB)的部分，而封装顶部是指所述封装的离安装表面最远的部分。方向性措词(向上，向下，上方，下方)是相对于封装的顶部(向上，上方)和底部(向下，下方)而言。
现在将详细参考本发明的实施例，其示例在附图中示出。在可能的情况下，在附图和说明书中使用相同的附图标记表示相同或相似的元件。
通常，扁平无引线封装被用于将IC芯片安装到主PCB。焊接掩膜(通常是施加在主PCB的金属的顶部的聚合物，用于防止氧化和防止焊垫之间的焊桥)被插入在IC芯片和主PCB之间，并且可以用于使IC芯片的部分与主PCB电绝缘。图2是安装到主PCB 250上的扁平无引线封装200中的集成电路的示意性侧剖视图。在扁平无引线封装200中，IC芯片210经由附接到IC芯片210上的键合线焊垫215的键合线217电连接到引线框架230。IC芯片210和引线框架230被封装在非导体封装材料280(例如塑料)中。随后，通过将扁平无引线封装200安装到焊接掩膜240上，使得扁平无引线封装240被附接到主PCB250。焊接掩膜具有开口(入口)，所述开口(入口)可以部分或全部被焊料245填充，所述焊料将引线框架230电连接到主PCB 250上的走线255。
电路中的环路电感与开关元件的快速脉冲(例如，激光雷达应用中的激光)相干扰。因此，希望将电路元件布置在封装中，并使它们之间具有最小的引线延伸距离。例如，可以通过对元件的层进行堆叠而不使用使电路元件共面的布置来实现短的引线延伸距离。
图3示出了使用堆叠的PCB 340、350的低电感激光驱动器300的功能特性。此处，用于激光驱动器300的电路元件，例如存储电容器310、激光二极管320和开关330，被安装在第一层PCB 340的顶部。
第一层PCB走线345，元件310、320、330和一个或多个键合线317在激光驱动器电路300的第一层301中传导电流。激光驱动器电路300包括用于激光驱动器电路300正常工作的电流的返回路径，因此使用了激光驱动器电路300的至少第二层302(此处为第二层PCB350)。第二层PCB 350具有第二层走线355以在电路的第二层302中传导电流。电流通过穿过第一层PCB 340设置的通孔(过孔)341、342中的导电材料，在第一层PCB走线345和第二层PCB走线355之间通过。电路回路(由黑色箭头示出)从第二层PCB走线355向上行进，经过第一过孔341到达第一层PCB走线345并到达存储电容器310。电流回路从存储电容器310继续行进，经过第一层PCB走线345的一单独的部段并经过键合线317到达激光二极管320。在行进经过激光二极管320之后，电流回路继续行进，经过第一层PCB走线345的第三部分到达开关，该开关通常为GaN场效应晶体管(FET)或硅金属氧化物半导体场效应晶体管(MOSFET)330。然后，电流回路向下行进，通过第二过孔342经过第一层PCB 340到达第二层PCB走线355。虚线箭头表示在放电之前施加到电容器310的偏置电压358。偏置电压358由穿过激光驱动器电路300中的内部过孔(未示出)实施的缓慢非关键路径(slow non-critical path)提供。
尽管对元件进行堆叠可以减小PCB平面中的横向引线和/或走线的长度，但是竖向的层间电连接(例如，过孔，引线，焊料和金属走线)的长度仍然会产生对激光驱动器电路300不利的电感。例如，第一层PCB 340的厚度348可以为大约50μm至200μm。
图4是堆叠的电路400的第一示例性实施例的示意图，其中，使用了引线框架445和焊接掩膜440而不是内部PCB 340，以与堆叠的PCB 340、350(图3)相比减小层竖向厚度。此处，用于激光驱动器的第一电路元件与图3中所示的相同(存储电容器310，激光二极管320，开关330和一个或多个键合线317)，但是此处这些元件被封装在例如扁平无引线封装405或LGA封装中并且被安装到扁平无引线封装405的引线框架445。引线框架导体层445的厚度可以在50-80μm的范围内，优选地为约65μm。扁平无引线封装405可通过封装部480密封，例如，通过塑料封装材料密封。扁平无引线封装405中的元件构成堆叠的电路400的第一(顶部)层401。扁平无引线封装405可不包括内部PCB。
扁平无引线封装405安装在具有薄介电层440的衬底(例如主PCB 450)上，例如，所述薄介电层通常为厚约20至30μm并在引线框架445和PCB 450之间提供电绝缘的焊接掩膜440。焊接掩膜440具有开口(或入口)，以提供引线框架445的部分和PCB 450上的电走线455之间期望的电连接。例如，可以使用位于焊接掩膜440中的开口中的焊料点441、442来将引线框架445的部分电连接到PCB走线455。
激光驱动器400包括使得电路400正常工作的、用于电流的返回路径，因此至少使用了第二层402，在此处是PCB 450和PCB走线455。PCB走线455在电路的第二层402中传导电流。电流通过焊料点441、442经过焊接掩膜440中的开口在第二层402的PCB走线455和第一层401的引线框架445之间向上流动。电路回路(由黑色箭头示出)从PCB走线455向上行进，经过设置在焊接掩膜440中的第一孔中的第一焊料点441到达引线框架445并到达存储电容器310。电流回路从存储电容器310继续行进，经过引线框架445并经过键合线317到达激光二极管320。电流回路从激光二极管320继续行进，经过引线框架445的第三部段到达开关330。随后，电流回路向下行进，通过第二焊点442经过焊接掩膜440中的第二开口到达第二层PCB走线355。虚线箭头表示在放电之前施加到电容器310的偏置电压358。偏置电压358是通过图4中的焊接掩膜中的开口(未示出)实施的缓慢非关键路径。
图6示出了引线框架445的示例，示出了沉积在非导体衬底520上的导体金属(例如铜)的焊垫510。焊垫510可以被布置为提供与电路元件310、320、330(图4)和PCB走线455(图4)的电连接。
图7示出了用于完成电路400(图4)的焊接掩膜布局700的示例。该布局700可以被叠加在图4所示的导体层455上。图7中的非阴影区域指示第二层402(图4)的PCB 450外层455(应注意，为清楚起见，此处未示出单独的走线455(图4))。斜线标记的(hashed)的区域指示焊接掩膜440中的开口(图4)。焊接掩膜440中的开口(图4)使得电路400(图4)的中心部分的大部分与下方的接地层隔离。四个虚线的内圆指示例如从PCB 450(图4)下方的第三层(未示出)向电路400(图4)供以偏置电压358的区域。栅极线710用于传导信号以触发开关330(图4)。
图8是经组装的电路400的透视图。
回到图4，优选地，第二层402被布置成尽可能靠近第一层401，以有助于减小电路400的元件电感。例如，需要减小电感以由激光二极管320产生短持续时间、高功率的脉冲(例如，具有几纳秒持续时间的脉冲宽度和大于一安培的幅值的脉冲)，而不存在过高的电压。下文中，1nH的回路电感对于最佳性能是理想的。例如，对于图3所示的装置的回路电感可为大约1.3nH。尽管图4示出了应用于具有单元件式激光二极管320的第一实施例的低电感配置，但是替代实施例可以采用这种布置用于其它配置，例如激光二极管阵列，如图5所示。虽然这里描述的实施例涉及激光驱动器电路，但是替代实施例可以将这种低电感电路布置用于需要低回路电感的其它类型的电路，例如快速开关电路。
焊接掩膜440可以是直接形成在扁平无引线封装405的与引线框445相邻的底部上的介电层，或者直接形成在PCB 450上的介电层。例如，可以通过将介电材料印刷或以其他方式沉积在扁平无引线封装405和/或PCB 450上来形成焊料层掩膜440介电层。替代性地，焊接掩膜440介电层可以与扁平无引线封装405和PCB 450分开形成，并且例如在扁平无引线封装405被焊接到PCB 450时被附接。
第一实施例的堆叠的电路400的制造相比使用堆叠的PCB(如图3所示)具有许多优点。除了减小电路400的电感之外，形成引线框架445和焊接掩膜440在制造方面比使用两层PCB并形成通孔341、342(图3)更简单和更快。例如，堆叠的电路400可以使用标准PCB制造工艺而不是板上芯片组件(chip-on-board assembly)。引线框架445的使用实现了可测试的元件，这实现了使用已知的良好元件的组件。此外，使用具有单个PCB而不是两个PCB的封装降低了成本，并且允许在PCB上有效地使用容易获得和现有的材料。这些实施例可以使用不常见的且难于获得PCB预浸材料(铜之间的绝缘体)。例如，在构建PCB时可以针对层340使用非常薄(2密耳)的预浸材料层。这接近当前的行业限制，因为很少有制造商使用如此薄的材料。
应该注意的是，层和电路元件在图3和4中示出的厚度不是成比例的，并且仅仅旨在阐明电流路径。虽然本文描述的实施例一般涉及焊接掩膜，但是也可以使用其它薄介电层，例如用于制造陶瓷或有机(FR4)衬底的聚酰亚胺膜。
图9是用于形成低电感激光器驱动器封装的方法的示例性实施例的流程图900。应注意，流程图中的任何过程描述或方框应被理解为表示包括用于在过程中实现特定逻辑功能的一个或多个指令的模块，片段，代码部分或步骤，并且替代实施方式被包括在本发明的范围内，即，根据所涉及的功能，功能可以按与所示或所讨论的顺序不同的顺序(包括基本上同时或按相反的顺序)执行，正如本领域技术人员所理解的。将参考图4中所示的元件来描述图9中所示的方法。
如方框910所示，多个激光驱动器电路元件310、320、330被安装到表面安装式电路封装405的引线框架445。如方框920所示，电连接被形成在激光驱动器电路元件310、320、330和引线框445之间。如方框930所示，被定位在引线框架445和印刷电路板450之间的电绝缘材料的介电层440被形成。如方框940所示，多个入口被形成在介电层440中以容纳引线框架445和印刷电路板450之间的电连接。优选地，入口被布置为提供用于流过激光驱动器电路组件310、320、330的电流的返回路径。
对于本领域技术人员显而易见的是，在不脱离本发明的范围或精神的前提下，可以对本发明的结构进行多种修改和变化。鉴于上述内容，本发明旨在覆盖落入所附权利要求及其等同物的范围内的本发明的修改和变化。

Claims (22)

1.一种表面可安装式激光驱动器电路封装，配置成安装在主印刷电路板PCB上，所述表面可安装式激光驱动器电路封装包括：
表面安装式电路封装，所述表面安装式电路封装包括引线框架；
多个激光驱动器电路元件，所述激光驱动器电路元件安装在所述表面安装式电路封装的引线框架上并与所述表面安装式电路封装的引线框架电连通；和
介电层，所述介电层配置为设置在所述引线框架和所述主PCB之间，所述介电层包括穿过所述介电层的多个入口，每个入口被布置为容纳所述引线框架和所述主PCB之间的电连接，
其中，所述引线框架和所述介电层被布置成使得第一引线框架部分和第一介电层入口与主PCB走线的第一部分对准，并且第二引线框架部分和第二介电层入口与主PCB走线的第二部分对准，所述主PCB走线配置成提供用于表面安装式激光驱动器的电流返回路径。
2.根据权利要求1所述的电路封装，其中，所述介电层包括焊接掩膜。
3.根据权利要求1所述的电路封装，其中，所述介电层具有处于10μm到50μm的范围内的厚度。
4.根据权利要求1所述的电路封装，其中，所述表面安装式电路封装包括扁平无引线封装。
5.根据权利要求1所述的电路封装，其中，所述表面安装式电路封装包括陶瓷封装。
6.根据权利要求1所述的电路封装，进一步包括设置在所述引线框架与所述多个激光驱动器电路元件中的第一电路元件之间的至少一个键合线。
7.根据权利要求1所述的电路封装，进一步包括封装材料，所述封装材料配置成将所述多个激光驱动器电路元件封装在所述表面安装式电路封装上。
8.根据权利要求1所述的电路封装，其中，所述多个激光驱动器电路元件包括激光二极管，电容器和开关。
9.根据权利要求1所述的电路封装，其中，所述电路封装不包括内部PCB。
10.一种用于制造安装在主印刷电路板PCB上的表面安装式激光驱动器的方法，所述主印刷电路板包括用于所述表面安装式激光驱动器的电流返回路径，所述方法包括以下步骤：
将多个激光驱动器电路元件安装到表面安装式电路封装的引线框架上；
将所述激光驱动器电路元件与所述引线框架电连接；和
形成介电层，所述介电层被配置为设置在所述引线框架和所述主PCB之间，其中，所述介电层包括多个入口以容纳所述引线框架和所述主PCB之间的电连接，
其中，所述介电层包括电绝缘材料，且所述入口被定位成提供用于流过所述激光驱动器的电流的返回路径。
11.根据权利要求10所述的方法，其中，所述表面安装式电路封装包括扁平无引线封装。
12.根据权利要求10所述的方法，其中，所述表面安装式电路封装包括陶瓷封装。
13.根据权利要求10所述的方法，还包括以下步骤：在所述引线框架和所述多个激光驱动器电路元件中的第一电路元件之间应用键合线。
14.根据权利要求10所述的方法，还包括以下步骤：将所述多个激光驱动器电路元件封装在所述表面安装式电路封装上。
15.根据权利要求10所述的方法，其中，所述多个激光驱动器电路元件包括激光二极管，电容器和开关。
16.根据权利要求10所述的方法，还包括以下步骤：将所述表面安装式电路封装安装到所述主PCB，其中，所述表面安装式电路封装和所述主PCB通过所述介电层中的入口中的至少两个入口来处于电连通。
17.根据权利要求16所述的方法，还包括以下步骤：将所述介电层附接到所述表面安装式电路封装。
18.根据权利要求16所述的方法，还包括以下步骤：将所述介电层附接到所述主PCB。
19.根据权利要求16所述的方法，其中，所述介电层形成在所述PCB上。
20.根据权利要求16所述的方法，其中，所述介电层形成在所述表面安装式电路封装上。
21.根据权利要求10所述的方法，其中，所述介电层包括焊接掩膜。
22.根据权利要求10所述的方法，其中，所述电路封装不包括内部PCB。
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