CN112993063B - Method for manufacturing ohmic contact electrode of optical communication chip - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 51
- 238000004891 communication Methods 0.000 title claims abstract description 48
- 230000003287 optical effect Effects 0.000 title claims abstract description 48
- 238000000034 method Methods 0.000 title claims abstract description 35
- 238000000137 annealing Methods 0.000 claims abstract description 68
- 238000005275 alloying Methods 0.000 claims abstract description 60
- 229910052751 metal Inorganic materials 0.000 claims abstract description 26
- 239000002184 metal Substances 0.000 claims abstract description 26
- 230000008569 process Effects 0.000 claims abstract description 11
- 238000005520 cutting process Methods 0.000 claims abstract description 10
- 239000010410 layer Substances 0.000 claims description 67
- 239000000758 substrate Substances 0.000 claims description 21
- 238000002161 passivation Methods 0.000 claims description 18
- 238000004544 sputter deposition Methods 0.000 claims description 14
- 238000003776 cleavage reaction Methods 0.000 claims description 10
- 238000005516 engineering process Methods 0.000 claims description 10
- 230000007017 scission Effects 0.000 claims description 10
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 9
- 239000011241 protective layer Substances 0.000 claims description 8
- 238000001259 photo etching Methods 0.000 claims description 7
- 239000000126 substance Substances 0.000 claims description 6
- 239000002344 surface layer Substances 0.000 claims description 6
- 238000001020 plasma etching Methods 0.000 claims description 5
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims description 4
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 239000004065 semiconductor Substances 0.000 description 7
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 6
- 238000004140 cleaning Methods 0.000 description 4
- 229910052681 coesite Inorganic materials 0.000 description 4
- 229910052906 cristobalite Inorganic materials 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 235000012239 silicon dioxide Nutrition 0.000 description 4
- 229910052682 stishovite Inorganic materials 0.000 description 4
- 229910052905 tridymite Inorganic materials 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 230000033001 locomotion Effects 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 238000009210 therapy by ultrasound Methods 0.000 description 2
- XSTXAVWGXDQKEL-UHFFFAOYSA-N Trichloroethylene Chemical group ClC=C(Cl)Cl XSTXAVWGXDQKEL-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 230000002776 aggregation Effects 0.000 description 1
- 238000010923 batch production Methods 0.000 description 1
- 238000009835 boiling Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- UBOXGVDOUJQMTN-UHFFFAOYSA-N trichloroethylene Natural products ClCC(Cl)Cl UBOXGVDOUJQMTN-UHFFFAOYSA-N 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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Abstract
The invention relates to a method for manufacturing an ohmic contact electrode of an optical communication chip, which comprises the following steps: manufacturing laminated ohmic contact electrodes of Ti/Pt/Au elementary metal on the P surface of the optical communication chip in sequence; carrying out P-surface alloying annealing on the P-surface Ti/Pt/Au ohmic contact electrode, wherein the P-surface alloying annealing temperature is T1; manufacturing laminated ohmic contact electrodes of Ti/Pt/Au elementary metal on the N surface of the optical communication chip in sequence; carrying out N-surface alloying annealing on the N-surface Ti/Pt/Au ohmic contact electrode, wherein the N-surface alloying annealing temperature is T2; the P-side alloying annealing temperature T1 is higher than the N-side alloying annealing temperature T2. The ohmic contact electrode manufacturing process can obtain the ohmic contact electrode with stable process and low contact resistance, and finally obtain the optical communication chip with stable performance, excellent chip appearance and high yield by matching with an understanding cutting process.
Description
Technical Field
The invention belongs to the field of semiconductor manufacturing, and particularly relates to a manufacturing method of an ohmic contact electrode of an optical communication chip.
Background
The manufacturing of metal ohmic contact electrodes is a key process in the semiconductor manufacturing industry, particularly the optical communication chip production manufacturing industry, low-resistance and stable-contact ohmic contact is a key factor influencing the performance and stability of a tube core, if the reliability of ohmic contact resistance is poor, the resistance value of a device is increased, and if the reliability of ohmic contact resistance is poor, the device can be directly failed.
In addition, in most conventional optical communication chip manufacturing processes, when the N-side ohmic contact electrode in the same cleavage region as the P-side ohmic contact electrode cannot be manufactured, the cleavage effect is limited by the thickness of the N-side ohmic contact electrode. Although the thicker N-surface ohmic contact electrode is beneficial to the heat dissipation of the chip and reduces the power consumption of the device, the adhesion phenomenon of the N-surface electrode after cleavage is easily caused by the thicker N-surface ohmic contact electrode, the damage of a semi-finished chip is directly caused, and the yield is reduced.
Therefore, how to balance the ohmic contact electrode fabrication and the cleavage cutting process is a key issue that must be considered and paid attention to in the optical communication chip fabrication process.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a method for manufacturing an ohmic contact electrode of an optical communication chip.
The technical scheme of the invention is realized as follows: the invention discloses a method for manufacturing an ohmic contact electrode of an optical communication chip, which comprises the following steps:
manufacturing laminated ohmic contact electrodes of Ti/Pt/Au elementary metal on the P surface of the optical communication chip in sequence;
carrying out P-surface alloying annealing on the P-surface Ti/Pt/Au ohmic contact electrode, wherein the P-surface alloying annealing temperature is T1;
manufacturing laminated ohmic contact electrodes of Ti/Pt/Au elementary metal on the N surface of the optical communication chip in sequence;
carrying out N-surface alloying annealing on the N-surface Ti/Pt/Au ohmic contact electrode, wherein the N-surface alloying annealing temperature is T2;
the P-side alloying annealing temperature T1 is higher than the N-side alloying annealing temperature T2.
Furthermore, the thickness of each layer of simple substance metal of the P-surface Ti/Pt/Au ohmic contact electrode is 30-80 nm, 60-100 nm and 250-320 nm in sequence.
Furthermore, the optical communication chip comprises a substrate, wherein an epitaxial layer is grown on the upper surface of the substrate, and a ridge structure is manufactured on the surface of the epitaxial layer;
a laminated ohmic contact electrode sequentially made of Ti/Pt/Au elementary metal is manufactured on the P surface of an optical communication chip, and the method specifically comprises the following steps: utilizing plasma enhanced chemical vapor deposition, photoetching and reactive ion etching technologies to manufacture a passivation protection layer on the surface of the epitaxial layer and a ridge top ohmic electrode contact region, adopting the photoetching technology to manufacture electrode photoresist patterns on the passivation protection layer and the ridge top ohmic electrode contact region, and then carrying out P-surface Ti/Pt/Au ohmic contact electrode sputtering;
carrying out a stripping process after the sputtering of the P-surface Ti/Pt/Au ohmic contact electrode is finished, and removing redundant metal;
a laminated ohmic contact electrode sequentially made of Ti/Pt/Au elementary metal is manufactured on the N surface of an optical communication chip, and the method specifically comprises the following steps: and sputtering an N-surface Ti/Pt/Au ohmic contact electrode on the bottom surface of the thinned substrate.
The optical communication chip substrate is InP or GaAs, and a basic structure of a semiconductor optical communication chip, such as a ridge, a passivation protective layer, a ridge top ohmic electrode contact area and the like, is manufactured on the surface of the substrate through epitaxial wafer growth, organic cleaning, plasma enhanced chemical vapor deposition, reactive ion etching technology and process.
Further, the substrate sheet of the basic structure of the semiconductor optical communication chip is thinned by adopting a conventional mechanical grinding mode before the N-surface Ti/Pt/Au ohmic contact electrode is manufactured, and the final thinning thickness is 180-300 um.
Furthermore, the P-surface alloying annealing temperature T1 selected during P-surface alloying annealing needs to enable the P-surface Ti/Pt/Au ohmic contact electrode to be fully fused so as to reduce the contact resistance, and simultaneously, the elemental metal Ti in the P-surface Ti/Pt/Au ohmic contact electrode is effectively combined with the contact region epitaxial layer surface molecules and the passivation protection layer molecules, so that the firm adhesion between the whole P-surface Ti/Pt/Au ohmic contact electrode and the contact region epitaxial layer surface molecules and the passivation protection layer is ensured.
Further, the P-surface alloying annealing temperature T1 is 360-420 ℃; the constant temperature time is 20-40 s.
Furthermore, the thickness of the Au layer of the N-surface Ti/Pt/Au ohmic contact electrode needs to be matched with a cleavage cutting process; the thickness of the Au layer of the N-surface Ti/Pt/Au ohmic contact electrode is 300-400 nm.
Further, the thickness of the Ti layer of the N-surface Ti/Pt/Au ohmic contact electrode is 30-80 nm; the thickness of the Pt layer of the N-surface Ti/Pt/Au ohmic contact electrode is 60-100 nm.
Furthermore, the N-surface alloying annealing temperature T2 selected during the N-surface alloying annealing is related to the thickness of the Au layer of the N-surface Ti/Pt/Au ohmic contact electrode, so that the phenomenon that the bonding wire is influenced by the phenomenon that the Ti layer or the Pt layer of the N-surface Ti/Pt/Au ohmic contact electrode is separated out to the surface of the Au layer to form a ball aggregation phenomenon during the N-surface alloying annealing is prevented.
Further, the N-face alloying annealing temperature T2 is 320-360 ℃; the constant temperature time is 20-40 s.
Furthermore, the P-surface Ti/Pt/Au ohmic contact electrode and the N-surface Ti/Pt/Au ohmic contact electrode are manufactured by vacuum magnetron sputtering, and the operation technological parameters corresponding to the vacuum magnetron sputtering device are set as follows: the distance between the target and the slide glass substrate is 90-120 mm, the Ar flow is 100-200 sccm, the direct current source power is 150-250W, and the sputtering cavity pressure is 1-2 Pa.
The invention has at least the following beneficial effects: the manufacturing method of the ohmic contact electrode of the optical communication chip mainly comprises the steps of manufacturing a laminated ohmic contact electrode of Ti/Pt/Au elementary metals on the P surface of the optical communication chip in sequence; carrying out P-surface alloying annealing on the P-surface Ti/Pt/Au ohmic contact electrode; manufacturing laminated ohmic contact electrodes of Ti/Pt/Au elementary metal on the N surface of the optical communication chip in sequence; and carrying out N-surface alloying annealing on the N-surface Ti/Pt/Au ohmic contact electrode. And the N-face alloying annealing temperature is lower than the P-face alloying annealing temperature, and the resistance value of the optical communication chip mainly comes from the combined contact between the ohmic electrode of the electrode contact area on the top of the P-face ridge strip and the epitaxial layer of the contact area under the basic structure of the semiconductor optical communication chip, so that the P-face Ti/Pt/Au ohmic contact electrode is fully fused by higher alloying temperature to reduce the contact resistance, and meanwhile, Ti in the P-face Ti/Pt/Au ohmic contact electrode is effectively combined with the molecules on the surface layer of the epitaxial layer of the contact area and the molecules on the passivation protective layer to ensure the firm adhesion between the whole P-face electrode and the molecules on the surface layer of the epitaxial layer of the contact area and the passivation protective layer, and the N-face Ti/Pt/Au ohmic contact electrode is not suitable for sputtering an excessively thick Au layer due to the matching with the subsequent cleavage cutting process, in order to prevent Ti or Pt layer from separating out to the surface of Au layer to form ball-gathering phenomenon to affect the welding wire, the N-face alloying annealing temperature is not too high, therefore, the P-face annealing is carried out after the P-face Ti/Pt/Au ohmic contact electrode is manufactured, the N-face annealing is carried out after the Ti/Pt/Au ohmic contact electrode is manufactured on the N face, the annealing temperatures respectively meet the respective process requirements, finally, the ohmic contact electrode with stable process and low contact resistance can be obtained, the understanding cutting process is matched, and finally, the optical communication chip with stable performance, excellent chip appearance and high yield is obtained.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a flowchart of a method for manufacturing an ohmic contact electrode of an optical communication chip according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention are clearly and completely described below, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, an embodiment of the present invention provides a method for manufacturing an ohmic contact electrode of an optical communication chip, which mainly includes the following steps:
manufacturing laminated ohmic contact electrodes of Ti/Pt/Au elementary metal on the P surface of the optical communication chip in sequence;
carrying out P-surface alloying annealing on the P-surface Ti/Pt/Au ohmic contact electrode, wherein the P-surface alloying annealing temperature is T1;
manufacturing laminated ohmic contact electrodes of Ti/Pt/Au elementary metal on the N surface of the optical communication chip in sequence;
carrying out N-surface alloying annealing on the N-surface Ti/Pt/Au ohmic contact electrode, wherein the N-surface alloying annealing temperature is T2;
the P-side alloying annealing temperature T1 is higher than the N-side alloying annealing temperature T2.
Furthermore, the P-surface alloying annealing temperature T1 selected during P-surface alloying annealing needs to enable the P-surface Ti/Pt/Au ohmic contact electrode to be fully fused so as to reduce the contact resistance, and simultaneously, the elemental metal Ti in the P-surface Ti/Pt/Au ohmic contact electrode is effectively combined with the contact region epitaxial layer surface molecules and the passivation protection layer molecules, so that the firm adhesion between the whole P-surface Ti/Pt/Au ohmic contact electrode and the contact region epitaxial layer surface molecules and the passivation protection layer is ensured.
The epitaxial layer surface molecules of the contact region are InGaAs molecules, and are InGaAs compounds doped with Zn. In whole electrode pattern district, there are two laminated structure, a laminated structure is exactly ridge top ohmic electrode contact region, and its structure is from up being followed in proper order: substrate → epitaxial layer (surface layer of epitaxial layer is InGaAs layer) → Ti → Pt → Au, Ti enters the surface layer of epitaxial layer, i.e. InGaAs layer, in a mode of molecular motion diffusion through alloying annealing, thereby forming ohmic contact electrode in combination; the other laminated structure is an electrode pattern which does not comprise a ridge top ohmic electrode contact region, and the structure of the laminated structure is as follows from bottom to top in sequence: substrate → epitaxial layer → SiO2 passivation protection layer → Ti → Pt → Au, here SiO2 passivation protection layer because the surface roughness is bigger than InGaAs epitaxial layer, Ti still can be effectively and firmly combined with SiO2 protection layer on the basis of molecular diffusion movement. Preferably, the P-surface alloying annealing temperature T1 is 360-420 ℃; the constant temperature time is 20-40 s.
The thickness of the Au layer of the N-surface Ti/Pt/Au ohmic contact electrode needs to be matched with a cleavage cutting process; the N-surface alloying annealing temperature T2 selected during the N-surface alloying annealing is related to the thickness of the Au layer of the N-surface Ti/Pt/Au ohmic contact electrode, so that the phenomenon that the bonding wire is influenced by the phenomenon that the Ti layer or the Pt layer of the N-surface Ti/Pt/Au ohmic contact electrode is separated out to the surface of the Au layer to form a ball gathering phenomenon during the N-surface alloying annealing is prevented. In order to prevent the phenomenon that Ti or Pt layers are precipitated on the surface of the Au layer to form a ball-gathering phenomenon to influence the bonding wire, the N-face alloying annealing temperature is not too high, certainly not too low, and the N-face alloying annealing temperature cannot be too low so as to achieve the effect of diffusing Ti into InGaAs (P face) and InP (N face) to form ohmic contact to reduce the resistance. Preferably, the N-face alloying annealing temperature T2 is 320-360 ℃; the constant temperature time is 20-40 s.
Preferably, the N-side alloying annealing temperature is 40 to 60 ℃ lower than the P-side alloying annealing temperature.
One specific embodiment of the method for manufacturing the ohmic contact electrode of the optical communication chip is as follows:
growing quantum wells and active regions on the surface of an InP or GaAs substrate slice by an epitaxial technology, manufacturing ridge photoresist patterns on the surface of an epitaxial layer by adopting organic cleaning, plasma enhanced chemical vapor deposition and photoetching technologies, and transferring the ridge patterns to the epitaxial layer by adopting reactive ion etching and wet etching technologies to manufacture a ridge structure; manufacturing a passivation protective layer on the surface of the epitaxial layer and semiconductor optical communication chip basic structures such as a ridge top ohmic electrode contact region by utilizing plasma enhanced chemical vapor deposition, photoetching and reactive ion etching technologies again, wherein the passivation protective layer is made of SiO2 or SiN;
and (2) manufacturing an electrode photoresist graph on the passivation protective layer and the ohmic electrode contact region on the top of the ridge strip by adopting a photoetching technology, putting the substrate into a vacuum magnetron sputtering device for sputtering the P-surface ohmic contact electrode, and setting the operating technological parameters corresponding to the vacuum magnetron sputtering device as follows: the distance between the target and the slide glass substrate is 90-120 mm, the Ar flow is 100-200 sccm, the direct current source power is 150-250W, the sputtering cavity pressure is 1-2 Pa, and the thicknesses of the Ti/Pt/Au simple substance metal of the ohmic contact electrode are as follows in sequence: 30-80 nm, 60-100 nm and 250-320 nm, wherein the purity of the used elementary metal of each layer is 99.999%;
peeling by adopting a mode of sticking a blue film on the sputtering surface (the peeling is to peel off redundant metal), and removing residual glue by heating acetone and ultrasonic treatment, preferably, the heating temperature of the acetone is 40-60 ℃, and the old acetone and the new acetone are sequentially subjected to ultrasonic treatment for 10 min;
carrying out P-surface alloying annealing on the substrate sheet of the P-surface ohmic contact electrode by adopting a rapid annealing furnace (RTP), wherein the annealing temperature is 360-420 ℃, the constant temperature time is 20-40 s, the temperature rise time is 20s, and N2 is introduced as protective gas in the whole process;
thinning the substrate sheet of the basic structure of the semiconductor optical communication chip by adopting a conventional mechanical grinding mode, and cleaning, wherein the cleaning mode is that trichloroethylene is heated to boiling, acetone is heated to 40-60 ℃ for 20min, and the final thinning thickness is 180-300 um;
and putting the thinned and cleaned substrate slice into a vacuum magnetron sputtering device for carrying out the sputtering of the N-surface ohmic contact electrode, wherein the operating technological parameters corresponding to the vacuum magnetron sputtering device are set as follows: the distance between the target and the slide glass substrate is 90-120 mm, the Ar flow is 100-200 sccm, the direct current source power is 150-250W, the sputtering cavity pressure is 1-2 Pa, and the thicknesses of the Ti/Pt/Au simple substance metals of the ohmic contact electrode are as follows in sequence: 30-80 nm, 60-100 nm and 300-400 nm, wherein the purity of each layer of simple substance metal is also 99.999%;
and finally, carrying out N-surface alloying annealing on the substrate sheet of the N-surface ohmic contact electrode by adopting a rapid annealing furnace (RTP), wherein the annealing temperature is 320-360 ℃, the constant temperature time is 20-40 s, the temperature rise time is 20s, and N2 is introduced as protective gas in the whole process.
The P-surface Ti/Pt/Au ohmic contact electrode and the N-surface Ti/Pt/Au ohmic contact electrode are manufactured by adopting a vacuum magnetron sputtering method in combination with the electrode manufacturing process and parameters, and have obvious superiority in the aspects of film thickness uniformity, adhesive force, compactness, conductivity and the like.
The method is mainly realized by manufacturing a P-surface Ti/Pt/Au ohmic contact electrode, annealing the P surface, manufacturing a Ti/Pt/Au ohmic contact electrode on the N surface and annealing the N surface, can be matched with a wider cleavage and cutting process window, and has the advantages of simple operation, stable process and low contact resistance (about (6-8) multiplied by 10) -6 Ω·cm 2 ) The cutting tool has the characteristics of being beneficial to cleavage and cutting, and is particularly suitable for batch production and manufacturing.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (10)
1. A method for manufacturing an ohmic contact electrode of an optical communication chip is characterized by comprising the following steps:
manufacturing laminated ohmic contact electrodes of Ti/Pt/Au elementary metal on the P surface of the optical communication chip in sequence;
carrying out P-surface alloying annealing on the P-surface Ti/Pt/Au ohmic contact electrode, wherein the P-surface alloying annealing temperature is T1;
manufacturing laminated ohmic contact electrodes of Ti/Pt/Au elementary metal on the N surface of the optical communication chip in sequence;
carrying out N-surface alloying annealing on the N-surface Ti/Pt/Au ohmic contact electrode, wherein the N-surface alloying annealing temperature is T2;
the P-side alloying annealing temperature T1 is higher than the N-side alloying annealing temperature T2.
2. The method for manufacturing the ohmic contact electrode of the optical communication chip according to claim 1, wherein: the thickness of each layer of simple substance metal of the P-surface Ti/Pt/Au ohmic contact electrode is 30-80 nm, 60-100 nm and 250-320 nm in sequence.
3. The method for manufacturing the ohmic contact electrode of the optical communication chip according to claim 1, wherein:
the optical communication chip comprises a substrate, wherein an epitaxial layer grows on the upper surface of the substrate, and a ridge structure is manufactured on the surface of the epitaxial layer;
a laminated ohmic contact electrode sequentially made of Ti/Pt/Au elementary metal is manufactured on the P surface of an optical communication chip, and the method specifically comprises the following steps: utilizing plasma enhanced chemical vapor deposition, photoetching and reactive ion etching technologies to manufacture a passivation protection layer on the surface of the epitaxial layer and a ridge top ohmic electrode contact region, adopting the photoetching technology to manufacture electrode photoresist patterns on the passivation protection layer and the ridge top ohmic electrode contact region, and then carrying out P-surface Ti/Pt/Au ohmic contact electrode sputtering;
carrying out a stripping process after the sputtering of the P-surface Ti/Pt/Au ohmic contact electrode is finished, and removing redundant metal;
a laminated ohmic contact electrode sequentially made of Ti/Pt/Au elementary metal is manufactured on the N surface of an optical communication chip, and the method specifically comprises the following steps: and sputtering an N-surface Ti/Pt/Au ohmic contact electrode on the bottom surface of the thinned substrate.
4. The method for manufacturing the ohmic contact electrode of the optical communication chip according to claim 1 or 3, wherein: the P-surface alloying annealing temperature T1 selected during P-surface alloying annealing needs to enable the P-surface Ti/Pt/Au ohmic contact electrode to be fully fused so as to reduce the contact resistance, and simultaneously enables the simple substance Ti in the P-surface Ti/Pt/Au ohmic contact electrode to be effectively combined with the molecules on the surface layer of the contact area epitaxial layer and the molecules on the passivation protective layer, thereby ensuring the firm adhesion between the whole P-surface Ti/Pt/Au ohmic contact electrode and the molecules on the surface layer of the contact area epitaxial layer and the passivation protective layer.
5. The method for manufacturing the ohmic contact electrode of the optical communication chip according to claim 1, wherein: the P-surface alloying annealing temperature T1 is 360-420 ℃; the constant temperature time is 20-40 s.
6. The method for manufacturing the ohmic contact electrode of the optical communication chip according to claim 1, wherein: the thickness of the Au layer of the N-surface Ti/Pt/Au ohmic contact electrode needs to be matched with a cleavage cutting process; the thickness of an Au layer of the N-surface Ti/Pt/Au ohmic contact electrode is 300-400 nm; the thickness of the Ti layer of the N-surface Ti/Pt/Au ohmic contact electrode is 30-80 nm; the thickness of the Pt layer of the N-surface Ti/Pt/Au ohmic contact electrode is 60-100 nm.
7. The method for manufacturing the ohmic contact electrode of the optical communication chip according to claim 6, wherein: the N-surface alloying annealing temperature T2 selected during the N-surface alloying annealing is related to the thickness of the Au layer of the N-surface Ti/Pt/Au ohmic contact electrode, so that the phenomenon that the bonding wire is influenced by the phenomenon that the Ti layer or the Pt layer of the N-surface Ti/Pt/Au ohmic contact electrode is separated out to the surface of the Au layer to form a ball gathering phenomenon during the N-surface alloying annealing is prevented.
8. The method for manufacturing the ohmic contact electrode of the optical communication chip according to claim 1 or 7, wherein: the N-face alloying annealing temperature T2 is 320-360 ℃; the constant temperature time is 20-40 s.
9. The method for manufacturing the ohmic contact electrode of the optical communication chip according to claim 1, wherein: the N-surface alloying annealing temperature is 40-60 ℃ lower than the P-surface alloying annealing temperature.
10. The method for manufacturing the ohmic contact electrode of the optical communication chip according to claim 1, wherein: the P-surface Ti/Pt/Au ohmic contact electrode and the N-surface Ti/Pt/Au ohmic contact electrode are manufactured in a vacuum magnetron sputtering mode, and the operating technological parameters of the corresponding vacuum magnetron sputtering device are set as follows: the distance between the target and the slide substrate is 90-120 mm, the Ar flow is 100-200 sccm, the direct current source power is 150-250W, and the sputtering cavity pressure is 1-2 Pa.
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| CN202110121320.2A CN112993063B (en) | 2021-01-28 | 2021-01-28 | Method for manufacturing ohmic contact electrode of optical communication chip |
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