CN116525737A - GaAs-based flip-chip Mini LED chip and preparation method thereof - Google Patents
GaAs-based flip-chip Mini LED chip and preparation method thereof Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
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Abstract
The invention relates to a GaAs-based flip-chip Mini LED chip and a preparation method thereof, belonging to the field of LED chip preparation, wherein an epitaxial wafer comprises a substrate, a bonding layer, a P-GaP optical window layer, a P-AlInP waveguide layer, an MQW light-emitting layer, an N-AlInP waveguide layer, an N-AlGaInP current expansion layer and an N-GaAs ohmic layer from bottom to top in sequence, N, P primary electrodes are respectively evaporated on the N-GaAs ohmic layer and the bonding layer, a DBR passivation layer is deposited on the surface of the epitaxial wafer, and P, N electrode pads are respectively manufactured above P, N conductive holes; the bonding layer comprises ITO film and Al 2 O 3 Film and SiO 2 A film. The invention improves the bonding yield after substrate replacement by optimizing the bonding layer structure, saves the epitaxial cost, increases the luminous area to improve the brightness, simultaneously manufactures the P and N primary ohmic contact electrodes, reduces the chip cost and the production cycleEffect of phase.
Description
Technical Field
The invention relates to a GaAs-based flip-chip Mini LED chip and a preparation method thereof, and belongs to the technical field of LED chip preparation.
Background
2021 is not trivial for the display industry, and along with the promotion of terminal giant brand manufacturers such as China, apples, samsung, wound vitamins, TCL and the like, mini LEDs rapidly move to scale commercialization, and the color is greatly increased in the fields such as televisions, displays, notebook computers, tablet computers, vehicle-mounted displays, VR and the like; however, the current application terminal price is generally higher, which is clearly that the Mini LED market keeps growing on the road blocking tiger; the Mini LED chip, the driving IC, the back plate, the auxiliary materials and the like which occupy main cost cause high manufacturing cost of the Mini LED due to the reasons of technical route, yield, industrial chain integration and the like.
The manufacturing route of the GaAs-based flip-chip Mini LED in the current mainstream is as follows: epitaxial growth, substrate replacement, mesa manufacture, P ohmic contact electrode manufacture, N ohmic contact electrode manufacture, passivation layer manufacture, P, N bonding pad manufacture, thinning, spot measurement and sorting and warehousing; wherein the epitaxial cost occupies about 35%, the chip technology occupies about 40%, and the spot measurement sorting occupies 25%; the thickness of the GaP layer of the light window in the epitaxial structure is generally 3-10 mu m, which is an important factor of high epitaxial cost; the bonding material in substrate replacement is generally oxide transparent material such as alumina, silicon oxide, silicon nitride and the like, the method is that a layer of oxide with the thickness of 2-6 mu m is evaporated on a roughened epitaxial P-GaP window layer, after the oxide is polished by CMP, an oxide surface on a GaAs-based chip is bonded with a transparent substrate sapphire by a high-temperature and high-pressure mode, as the coarsening morphology of the P-GaP window layer is difficult to control and better pyramid shape is difficult to obtain, a large number of holes exist on the contact surface of the oxide transparent material and the P-GaP window layer, and cracks and gaps are easy to appear on the contact surface of the oxide and the P-GaP window layer after the subsequent high-temperature and high-pressure chip manufacturing process, so that the chip yield is greatly reduced and the bonding yield is unstable; the mesa etching process mainly uses a dry ICP etching process to etch the P-GaP layer, and high etching uniformity is required; the method for manufacturing the P, N ohmic contact electrode comprises the steps of P electrode photoetching, P electrode evaporation, P electrode stripping and cleaning, P electrode annealing, and then manufacturing an N electrode by the same method, wherein the manufacturing period is longer.
Disclosure of Invention
Aiming at the defects of the manufacturing of the Mini LED chip, the invention provides a GaAs-based flip-chip Mini LED chip and a preparation method thereof.
The invention adopts the following technical scheme:
the GaAs-based flip-chip Mini LED chip comprises an epitaxial wafer, a substrate, a bonding layer, a P-GaP optical window layer, a P-AlInP waveguide layer, an MQW light-emitting layer, an N-AlInP waveguide layer, an N-AlGaInP current expansion layer and an N-GaAs ohmic layer from bottom to top, wherein N primary electrodes and P primary electrodes are evaporated on the N-GaAs ohmic layer and the bonding layer, DBR passivation layers are deposited on the surface of the epitaxial wafer, the DBR passivation layers right above the P primary electrodes and the N primary electrodes are subjected to ICP etching to respectively form P conductive holes and N conductive holes, and P electrode pads and N electrode pads are respectively manufactured above the P conductive holes and the N conductive holes;
the bonding layer comprises an ITO film and Al 2 O 3 Film and SiO 2 A film.
The preparation method of the GaAs-based flip-chip Mini LED chip comprises the following steps:
(1) Sequentially growing a GaInP cut-off layer, an N-GaAs ohmic layer, an N-AlGaInP current expansion layer, an N-AlInP waveguide layer, an MQW light-emitting layer, a P-AlInP waveguide layer and a P-GaP light window layer on a temporary substrate by adopting an MOCVD method to obtain an epitaxial wafer;
(2) Coarsening the P-GaP optical window layer to obtain a coarsened surface of the P-GaP optical window layer;
(3) Depositing an ITO film on the coarsened surface of the P-GaP light window layer, and continuously depositing a layer of Al on the ITO film after the ITO alloy is subjected to 2 O 3 Film, again continuing on Al 2 O 3 Depositing a layer of SiO on the film 2 Thin film, ITO thin film, al 2 O 3 Film and SiO 2 Forming a bonding layer on the film;
(4) SiO of the surface layer of the bonding layer 2 Performing Chemical Mechanical Polishing (CMP) treatment on the film to obtain a flat and clean polished surface;
(5) Cleaning and activating the polished surfaces of the substrate and the bonding layer, and then carrying out high-temperature high-pressure bonding treatment to obtain a bonding sheet;
(6) Removing the temporary substrate and the GaInP cut-off layer from the obtained bonding sheet to complete the substrate replacement process;
(7) Photoetching a mask on the surface of the N-GaAs ohmic layer, and completely etching the epitaxial layer to the ITO film of the bonding layer by utilizing wet etching to form a mesa;
(8) Etching the N-GaAs ohmic layer by using a photoetching mask, photoetching P, N patterns, evaporating a P primary electrode and an N primary electrode, and then carrying out furnace tube annealing to finish P, N primary electrode manufacture;
(9) Depositing a DBR passivation layer on the structure obtained in the step (8), and etching the DBR passivation layer right above the P primary electrode and the N primary electrode by utilizing ICP to form a P conductive hole and an N conductive hole respectively;
(10) Respectively manufacturing a P electrode pad and an N electrode pad above the P conductive hole and the N conductive hole;
(11) And (3) thinning, cutting and sorting the epitaxial wafer obtained in the step (10) to obtain the GaAs-based flip-chip Mini LED.
Preferably, in the step (1), the thickness of the P-GaP light window layer is 600-2000nm.
Preferably, in the step (2), the P-GaP optical window layer is roughened by adopting a wet etching method, the roughening time is 60-180s, and the roughening temperature is 20-30 ℃;
preferably, the roughening treatment is carried out by adopting a mixed solution of sulfuric acid, water, iodic acid and hydrofluoric acid, wherein in the mixed solution, 2000-3000mL of sulfuric acid, 3000-4000mL of water, 80-100g of iodic acid and 1500-2000mL of hydrofluoric acid are adopted.
Preferably, in the step (3), the ITO film is evaporated by electron beam evaporation, sputtering evaporation or RPD evaporation, the evaporation vacuum degree is 1E-6-1E-5 Torr, the evaporation temperature is 120-300 ℃, and the alloy condition is furnace tube annealing at 390 ℃ for 5-10min.
Deposition of Al 2 O 3 The thin film is preferably deposited by electron beam evaporation or ALD, and has a thickness corresponding to the coarsening depth of the P-GaP light window layer, slightly greater than the coarsening depth of the P-GaP light window layer, and a thickness of 0.2-0.8 μm, and is advantageous in that Al 2 O 3 The excellent compactness can completely cover the cavity caused by coarsening the P-GaP optical window layer;
deposition of SiO 2 The film is preferably deposited by electron beam evaporation or PECVD, the refractive index is about 1.4, the thickness corresponds to the CMP polishing precision, the better the polishing uniformity is, the lower the thickness can be relatively, and the general thickness is 2-8 mu m;
preferably, siO 2 The film is deposited by adopting an electron beam evaporation mode with higher yield, the evaporation vacuum degree is 1E10 < -6 > to 1E < -5 > Torr, and the evaporation temperature is 120 ℃ to 300 ℃.
Preferably, the evaporation thickness of the ITO film is adjusted by the wavelength of the GaAs-based flip-chip Mini LED chip, and the thickness is as follows: d=m (1 λ/4 n), where d is the target thickness of the ITO film, m is an odd number, λ is the wavelength of the GaAs based flip chip Mini LED chip, and n is the refractive index of the ITO film. At the target thickness d, the sheet resistance at the center wavelength is the lowest, and the relative transmittance is the highest, reaching 95% or more.
Preferably, in step (4), siO 2 The residual depth of the polished film is 1-3 μm, and the surface roughness Ra is less than 0.1 μm.
Preferably, the substrate in the step (5) is preferably a sapphire substrate, the bonding temperature is 300-500 ℃, the bonding pressure is 9-14KKG, and the bonding yield is optimal.
Preferably, in the step (7), the liquid medicine subjected to wet corrosion is a mixed solution of bromine simple substance, water and HBr, wherein the ratio of bromine simple substance is 2-8%, the ratio of water is 86-91%, the ratio of HBr is 1-12%, the liquid medicine is used after standing for 1 day (24 h) after the preparation is finished, the liquid medicine is corroded for 1-5min at normal temperature, and the color of the ITO layer is observed by naked eyes.
Preferably, in the step (8), the P primary electrode and the N primary electrode are both in Au/AuGeNi/Au/Pt/Au structures, wherein the thickness of the first layer of Au is 5-50nm, the thickness of the second layer of AuGeNi is 80-120nm, the thickness of the third layer of Au is 280-400nm, the thickness of the fourth layer of Pt is 200-300nm, the thickness of the fifth layer of Au is 5-50nm, and the annealing temperature of a furnace tube is 300-360 ℃ for 8-15 minutes.
Preferably, in the step (9), the DBR passivation layer structure is a composite structure comprising n pairs of TiOx/SiOx, where n is an even number, and preferably 32;
the DBR passivation layer is evaporated by an optical film plating machine, the vacuum degree is between 5E-4 and 3E-3Torr, the heating temperature is between 80 and 150 ℃, the TiOx evaporation rate is 1 to 2A/s, the SiOx evaporation rate is 2 to 4A/s, and the reflectivity is more than 99.99 percent.
The invention is not exhaustive and can be found in the prior art.
The invention has the technical characteristics that:
in order to solve the problems of high epitaxial cost, low bonding yield, long chip manufacturing period, high cost and the like in the preparation of the GaAs-based flip-chip Mini LED chip, the invention designs the following bonding layer structure: ITO film+Al 2 O 3 film+SiO 2 Thin film, wherein ITO is a light window layer, al 2 O 3 As a transparent cover layer, siO 2 Is a transparent bonding layer.
The beneficial effects of the invention are as follows:
1. the invention provides a GaAs-based flip-chip Mini LED chip, which is characterized in that the bonding layer structure is optimized: ITO film+Al 2 O 3 film+SiO 2 Thin film, wherein ITO is a light window layer, al 2 O 3 As a transparent cover layer, siO 2 Is a transparent bonding layer, due to Al 2 O 3 The excellent compactness can completely cover the cavity caused by coarsening of the P-GaP optical window layer, thereby improving the bonding yield after substrate replacement.
2. The invention can partially replace the current expansion function and the ESD resistance of the P-GaP in an epitaxial structure by adding the special bonding dielectric layer ITO because of the excellent transparent conductivity, current expansibility and physical chemistry, thereby realizing the thinning of the P-GaP and the miniaturization of the P electrode pattern, and achieving the effects of saving the epitaxial cost and increasing the luminous area to improve the brightness.
3. The invention adds the special bonding dielectric layer ITO film, because of the existence, the mesa etching process can select a wet etching process with higher efficiency, the wet etching process can directly etch the ITO layer, the ITO is used as an ohmic contact layer, and the P/N ohmic contact electrode is operated simultaneously, thus greatly shortening the production cost and the production period compared with the existing method for manufacturing the P electrode and then manufacturing the N electrode.
Drawings
Fig. 1 is a schematic structural diagram of a GaAs based flip chip Mini LED chip of the present invention;
fig. 2 is a schematic diagram of an epitaxial wafer structure;
fig. 3 is a schematic diagram of the structure of the roughened epitaxial wafer;
FIG. 4 is a schematic diagram of the epitaxial wafer structure after the growth of the bonding layer;
FIG. 5 is a schematic diagram of the structure of an epitaxial wafer after polishing of the bonding layer;
fig. 6 is a schematic diagram of an epitaxial wafer structure after active bonding;
fig. 7 is a schematic diagram of the epitaxial wafer structure after removing the temporary substrate and GaInP cut-off layer;
FIG. 8 is a schematic diagram of the structure of an epitaxial wafer after mask lithography and wet etching of the mesa;
fig. 9 is a schematic structural diagram of an epitaxial wafer after P, N primary electrodes are completed;
fig. 10 is a schematic structural diagram of an epitaxial wafer after deposition of a DB passivation layer R to form P, N conductive vias;
fig. 11 is a schematic structural diagram of an epitaxial wafer after preparing a P, N electrode pad;
the semiconductor device comprises a temporary substrate, a GaInP stop layer, a 3, N-GaAs ohmic layer, a 4, N-AlGaInP current expansion layer, a 5, N-AlInP waveguide layer, a 6, an MQW light-emitting layer, a 7, P-AlInP waveguide layer, a 8, P-GaP light window layer, a 9, P-GaP light window layer roughening surface, a 10, a bonding layer, a 11, a bonding layer polishing surface, a 12 and a substrate, wherein the temporary substrate is a semiconductor substrate; 13. p primary electrode, 14, N primary electrode, 15, DBR passivation layer, 16, P electrode pad, 17, N electrode pad.
The specific embodiment is as follows:
in order to make the technical problems, technical solutions and advantages to be solved by the present invention more apparent, the following detailed description will be given with reference to the accompanying drawings and specific embodiments, but not limited thereto, and the present invention is not fully described and is according to the conventional technology in the art.
Example 1:
the GaAs-based flip-chip Mini LED chip comprises a substrate 12, a bonding layer 10, a P-GaP optical window layer 8, a P-AlInP waveguide layer 7, an MQW light-emitting layer 6, an N-AlInP waveguide layer 5, an N-AlGaInP current expansion layer 4, an N-GaAs ohmic layer 3 and a bonding layer 10, wherein an N primary electrode 14 and a P primary electrode 13 are respectively evaporated on the GaAs-based flip-chip Mini LED chip, a DBR passivation layer 15 is deposited on the surface of the epitaxial wafer, P primary electricity is conducted, the DBR passivation layer right above the P primary electrode 14 and the N primary electrode 13 is subjected to ICP etching to respectively form a P conductive hole and an N conductive hole, and a P electrode pad 16 and an N electrode pad 17 are respectively manufactured above the P conductive hole and the N conductive hole;
the bonding layer 10 comprises an ITO film, al 2 O 3 Film and SiO 2 A film as shown in fig. 1.
Example 2:
a preparation method of a GaAs-based flip-chip Mini LED chip comprises the following steps:
(1) A MOCVD method is adopted, a GaInP cut-off layer 2, an N-GaAs ohmic layer 3, an N-AlGaInP current expansion layer 4, an N-AlInP waveguide layer 5, an MQW light-emitting layer 6, a P-AlInP waveguide layer 7 and a P-GaP light window layer 8 are sequentially grown on a temporary substrate 1, and an epitaxial wafer is obtained, as shown in figure 2;
(2) Coarsening the P-GaP light window layer 8 to obtain a coarsened surface 9 of the P-GaP light window layer, as shown in FIG. 3;
(3) Depositing an ITO film on the coarsening surface 9 of the P-GaP light window layer, and continuously depositing a layer of Al on the ITO film after the ITO alloy is processed 2 O 3 Film, again continuing on Al 2 O 3 Depositing a layer of SiO on the film 2 Thin film, ITO thin film, al 2 O 3 Film and SiO 2 Film forming bonding layer 10 as shown in fig. 4;
(4) SiO of the surface layer of the bonding layer 10 2 Performing Chemical Mechanical Polishing (CMP) treatment on the film to obtain a flat and clean bonding layer polished surface 11, as shown in FIG. 5;
(5) After cleaning and activating the polished surfaces of the substrate 12 and the bonding layer 10, performing high-temperature and high-pressure bonding treatment to obtain a bonding sheet, as shown in fig. 6;
(6) Removing the temporary substrate and the GaInP cut-off layer from the obtained bonding sheet to complete the substrate replacement process, as shown in FIG. 7;
(7) Etching mask on the surface of the N-GaAs ohmic layer 3, and etching the epitaxial layer completely to the ITO film of the bonding layer by wet etching to form a mesa, as shown in figure 8;
(8) Etching the N-GaAs ohmic layer 3 by using a photoetching mask, photoetching P, N patterns, evaporating the P primary electrode 13 and the N primary electrode 14, and then performing furnace tube annealing to finish P, N primary electrode manufacture, as shown in FIG. 9;
(9) Depositing a DBR passivation layer 15 on the structure obtained in the step (8), and etching the DBR passivation layer right above the P primary electrode and the N primary electrode by utilizing ICP to form a P conductive hole and an N conductive hole respectively, as shown in figure 10;
(10) P electrode pad 16 and N electrode pad 17 are fabricated over the P conductive via and N conductive via, respectively, as shown in fig. 11;
(11) And (3) thinning, cutting and sorting the epitaxial wafer obtained in the step (10) to obtain the GaAs-based flip-chip Mini LED.
Example 3:
a method for preparing GaAs-based flip chip Mini LED chip, as described in example 2, except that in step (1), the thickness of the P-GaP optical window layer is 1000nm;
in the step (2), coarsening the P-GaP optical window layer by adopting a wet etching method, wherein the coarsening time is 3 x 35s, and the coarsening temperature is 22.5 ℃;
coarsening with mixed solution of sulfuric acid, water, iodic acid and hydrofluoric acid, wherein the mixed solution contains 2500mL of sulfuric acid, 3500mL of water, 90g of iodic acid and 1600mL of hydrofluoric acid.
Example 4:
in the preparation method of the GaAs-based flip-chip Mini LED chip, as shown in the embodiment 2, the difference is that in the step 3, an ITO film adopts an electron beam evaporation mode, the evaporation vacuum degree is 3E-6Torr, the evaporation temperature is 280 ℃, the evaporation thickness is 280nm, the sheet resistance is the lowest at the center wavelength, the relative transmittance is the highest and reaches more than 95%, and the alloy condition is furnace tube annealing at 390 ℃ for 7min.
Deposition of Al 2 O 3 The film preferably adopts an electron beam evaporation method, and the thickness of the film is 0.3 mu m and is equivalent to the coarsening depth of the P-GaP optical window layer;
deposition of SiO 2 The film preferably adopts an electron beam evaporation mode, the refractive index is about 1.4, and the thickness is 3 mu m; the evaporation vacuum degree is 5E10-6 Torr, and the evaporation temperature is 150 ℃.
Example 5:
preparation method of GaAs-based flip chip Mini LED chip as described in example 2, except that in step (4), siO 2 The residual depth of the polished film is 1.6 μm, and the surface roughness Ra is less than 0.1 μm.
The substrate in the step (5) is a sapphire substrate, the bonding temperature is 450 ℃, the bonding pressure is 11 and KKG, and the time is 30 minutes.
Example 6:
in the preparation method of the GaAs-based flip-chip Mini LED chip, as shown in the embodiment 2, the difference is that in the step (7), the liquid medicine subjected to wet etching is a mixed solution of bromine simple substance, water and HBr, wherein the ratio of bromine simple substance is 3%, the ratio of water is 90%, the ratio of HBr is 7%, and the liquid medicine is used after standing for 1 day (24 h) after the preparation is completed and is etched for 3min at normal temperature.
Example 7:
in the preparation method of the GaAs-based flip-chip Mini LED chip, as shown in the embodiment 2, the difference is that in the step (8), the P primary electrode and the N primary electrode are of Au/AuGeNi/Au/Pt/Au structures, wherein the thickness of the first layer of Au is 20nm, the thickness of the second layer of AuGeNi is 100nm, the thickness of the third layer of Au is 300m, the thickness of the fourth layer of Pt is 200nm, the thickness of the fifth layer of Au is 40nm, the annealing temperature of a furnace tube is 320 ℃, and the time is 13 minutes.
Example 8:
in the preparation method of the GaAs-based flip-chip Mini LED chip, as shown in the embodiment 2, the difference is that in the step (9), the DBR passivation layer structure is a composite structure consisting of 32 pairs of TiOx/SiOx, x is 2, the evaporation is performed by using an optical film plating machine, the vacuum degree is 6E-4Torr, the heating temperature is 120 ℃, and the TiO is 2 The vapor deposition rate is 1-2A/s, siO 2 The evaporation rate is 4A/s, and the reflectivity is more than 99.99%.
While the foregoing is directed to the preferred embodiments of the present invention, it will be appreciated by those skilled in the art that various modifications and adaptations can be made without departing from the principles of the present invention, and such modifications and adaptations are intended to be comprehended within the scope of the present invention.
Claims (10)
1. The GaAs-based flip-chip Mini LED chip is characterized in that an epitaxial wafer of the GaAs-based flip-chip Mini LED chip sequentially comprises a substrate, a bonding layer, a P-GaP optical window layer, a P-AlInP waveguide layer, an MQW light-emitting layer, an N-AlInP waveguide layer, an N-AlGaInP current expansion layer and an N-GaAs ohmic layer from bottom to top, wherein N primary electrodes and P primary electrodes are evaporated on the N-GaAs ohmic layer and the bonding layer, a DBR passivation layer is deposited on the surface of the epitaxial wafer, the DBR passivation layer right above the P primary electrodes and the N primary electrodes is etched by ICP to form P conductive holes and N conductive holes respectively, and a P electrode pad and an N electrode pad are manufactured above the P conductive holes and the N conductive holes respectively;
the bonding layer comprises an ITO film and Al 2 O 3 Film and SiO 2 A film.
2. A method for preparing the GaAs based flip chip Mini LED chip of claim 1, comprising the steps of:
(1) Sequentially growing a GaInP cut-off layer, an N-GaAs ohmic layer, an N-AlGaInP current expansion layer, an N-AlInP waveguide layer, an MQW light-emitting layer, a P-AlInP waveguide layer and a P-GaP light window layer on a temporary substrate by adopting an MOCVD method to obtain an epitaxial wafer;
(2) Coarsening the P-GaP optical window layer to obtain a coarsened surface of the P-GaP optical window layer;
(3) Depositing an ITO film on the coarsened surface of the P-GaP light window layer, and continuously depositing a layer of Al on the ITO film after the ITO alloy is subjected to 2 O 3 Film, again continuing on Al 2 O 3 Depositing a layer of SiO on the film 2 Thin film, ITO thin film, al 2 O 3 Film and SiO 2 Forming a bonding layer on the film;
(4) SiO of the surface layer of the bonding layer 2 Performing chemical mechanical polishing treatment on the film to obtain a smooth and clean polished surface;
(5) Cleaning and activating the polished surfaces of the substrate and the bonding layer, and then carrying out high-temperature high-pressure bonding treatment to obtain a bonding sheet;
(6) Removing the temporary substrate and the GaInP cut-off layer from the obtained bonding sheet to complete the substrate replacement process;
(7) Photoetching a mask on the surface of the N-GaAs ohmic layer, and completely etching the epitaxial layer to the ITO film of the bonding layer by utilizing wet etching to form a mesa;
(8) Etching the N-GaAs ohmic layer by using a photoetching mask, photoetching P, N patterns, evaporating a P primary electrode and an N primary electrode, and then carrying out furnace tube annealing to finish P, N primary electrode manufacture;
(9) Depositing a DBR passivation layer on the structure obtained in the step (8), and etching the DBR passivation layer right above the P primary electrode and the N primary electrode by utilizing ICP to form a P conductive hole and an N conductive hole respectively;
(10) Respectively manufacturing a P electrode pad and an N electrode pad above the P conductive hole and the N conductive hole;
(11) And (3) thinning, cutting and sorting the epitaxial wafer obtained in the step (10) to obtain the GaAs-based flip-chip Mini LED.
3. The method for manufacturing a GaAs based flip chip Mini LED chip of claim 2, wherein in step (1), the thickness of the P-GaP optical window layer is 600-2000nm.
4. The method for manufacturing the GaAs-based flip-chip Mini LED chip according to claim 2, wherein in the step (2), the P-GaP optical window layer is roughened by adopting a wet etching method, the roughening time is 60-180s, and the roughening temperature is 20-30 ℃;
preferably, the roughening treatment is carried out by adopting a mixed solution of sulfuric acid, water, iodic acid and hydrofluoric acid, wherein in the mixed solution, 2000-3000mL of sulfuric acid, 3000-4000mL of water, 80-100g of iodic acid and 1500-2000mL of hydrofluoric acid are adopted.
5. The preparation method of the GaAs-based flip-chip Mini LED chip according to claim 2, wherein in the step (3), an ITO film is subjected to electron beam evaporation, sputtering evaporation or RPD evaporation, the evaporation vacuum degree is 1E-6-1E-5 Torr, the evaporation temperature is 120-300 ℃, and the alloy condition is furnace tube annealing at 390 ℃ for 5-10min;
deposition of Al 2 O 3 The thin film is preferably deposited by electron beam evaporation or ALD and has a thickness greater than the coarsening depth of the P-GaP light window layerThe thickness is 0.2-0.8 mu m;
deposition of SiO 2 The film is preferably deposited by electron beam evaporation or PECVD, and the thickness is 2-8 mu m;
preferably, siO 2 The film is deposited by adopting an electron beam evaporation mode, the evaporation vacuum degree is 1E10 < -6 > to 1E < -5 > Torr, and the evaporation temperature is 120 ℃ to 300 ℃.
6. The method for preparing a GaAs-based flip-chip Mini LED chip according to claim 5, wherein the thickness of the ITO thin film evaporated is adjusted by the wavelength of the GaAs-based flip-chip Mini LED chip, and is: d=m (1 λ/4 n), where d is the target thickness of the ITO film, m is an odd number, λ is the wavelength of the GaAs based flip chip Mini LED chip, and n is the refractive index of the ITO film.
7. The method for manufacturing a GaAs based flip chip Mini LED chip as claimed in claim 2, wherein in step (4), siO 2 The residual depth of the polished film is 1-3 mu m, and the surface roughness Ra is less than 0.1 mu m;
preferably, the substrate in the step (5) is a sapphire substrate, the bonding temperature is 300-500 ℃, and the bonding pressure is 9-14KKG.
8. The preparation method of the GaAs-based flip-chip Mini LED chip according to claim 2, wherein in the step (7), the liquid medicine subjected to wet corrosion is a mixed solution of bromine simple substance, water and HBr, wherein the ratio of bromine simple substance is 2-8%, the ratio of water is 86-91%, the ratio of HBr is 1-12%, the liquid medicine is used after standing for 1 day after configuration, and the liquid medicine is corroded for 1-5min at normal temperature.
9. The method for manufacturing a GaAs based flip chip Mini LED chip according to claim 2, wherein in step (8), the P primary electrode and the N primary electrode are both Au/AuGeNi/Au/Pt/Au structures, wherein the thickness of the first Au layer is 5-50nm, the thickness of the second AuGeNi layer is 80-120nm, the thickness of the third Au layer is 280-400nm, the thickness of the fourth Pt layer is 200-300nm, the thickness of the fifth Au layer is 5-50nm, and the annealing temperature of the furnace tube is 300-360 ℃ for 8-15 minutes.
10. The method of manufacturing a GaAs based flip chip Mini LED chip according to claim 2, wherein in step (9), the DBR passivation layer structure is a composite structure of n pairs of TiOx/SiOx, where n is an even number, preferably 32;
the DBR passivation layer is evaporated by an optical film plating machine, the vacuum degree is between 5E-4 and 3E-3Torr, the heating temperature is between 80 and 150 ℃, the TiOx evaporation rate is 1 to 2A/s, the SiOx evaporation rate is 2 to 4A/s, and the reflectivity is more than 99.99 percent.
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| CN117253953A (en) * | 2023-11-16 | 2023-12-19 | 南昌凯捷半导体科技有限公司 | Inverted red light Mini-LED chip and manufacturing method thereof |
| CN117253953B (en) * | 2023-11-16 | 2024-04-05 | 南昌凯捷半导体科技有限公司 | Inverted red light Mini-LED chip and manufacturing method thereof |
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