CN107910406A - The LED chip and its manufacture method of membrane structure - Google Patents
The LED chip and its manufacture method of membrane structure Download PDFInfo
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- CN107910406A CN107910406A CN201711067896.5A CN201711067896A CN107910406A CN 107910406 A CN107910406 A CN 107910406A CN 201711067896 A CN201711067896 A CN 201711067896A CN 107910406 A CN107910406 A CN 107910406A
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- 238000000034 method Methods 0.000 title claims abstract description 29
- 239000012528 membrane Substances 0.000 title claims abstract description 17
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 52
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 46
- 239000010703 silicon Substances 0.000 claims abstract description 46
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 43
- 239000002184 metal Substances 0.000 claims description 9
- 229910052751 metal Inorganic materials 0.000 claims description 9
- 238000001704 evaporation Methods 0.000 claims description 8
- 230000008020 evaporation Effects 0.000 claims description 8
- 229910052594 sapphire Inorganic materials 0.000 claims description 6
- 239000010980 sapphire Substances 0.000 claims description 6
- 239000013078 crystal Substances 0.000 claims description 5
- 238000005530 etching Methods 0.000 claims description 5
- 230000005611 electricity Effects 0.000 claims description 3
- 239000010931 gold Substances 0.000 claims 3
- 230000003287 optical effect Effects 0.000 abstract description 5
- 230000007812 deficiency Effects 0.000 abstract description 4
- 238000009826 distribution Methods 0.000 abstract description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 6
- 238000005520 cutting process Methods 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/382—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/387—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The present invention relates to the LED chip and its manufacture method of a kind of membrane structure, it is characterized in that：Including silicon substrate, the lower surface of silicon substrate sets silicon substrate bottom electrode, the upper surface of silicon substrate sets silicon substrate bonding electrode layer, the upper surface of silicon substrate bonding electrode layer sets chip bonding electrode layer, the upper surface of chip bonding electrode layer sets multiple grooves, insulating layer is set in the bottom of groove and side wall, sets gradually reflecting layer, P GaN layer MQW Quantum Well from bottom to up in a groove；N GaN layers are covered in the upper surface of the chip bonding electrode layer, the upper surface of N GaN layers covering chip bonding electrode layer and the top of groove, N GaN layers are contacted with chip bonding electrode layer and MQW Quantum Well；Opening is set in the N GaN layers, and the bottom-exposed of opening goes out reflecting layer, and chip positive electrode pad layer is set on reflecting layer.The present invention has the characteristics that big, output optical density height of low thermal resistance, homogeneous current distribution, driving current etc., efficiently solves the deficiency of conventional LED chip.
Description
Technical field
The present invention relates to the LED chip and its manufacture method of a kind of membrane structure, belong to technical field of semiconductors.
Background technology
In bright light torch, the application field of the contour output optical density of headlight for vehicles, conventional LED chip is because thermal resistance is high, heat dissipation
The problem of poor, single chip driving current can not further improve, and constrain applications of the LED in height output optical density field.
The content of the invention
The purpose of the present invention is overcome the deficiencies in the prior art, there is provided a kind of LED chip of membrane structure and its
Manufacture method, has the characteristics that big, output optical density height of low thermal resistance, homogeneous current distribution, driving current etc., efficiently solves tradition
The deficiency of LED chip.
According to technical solution provided by the invention, the LED chip of the membrane structure, it is characterized in that：Including silicon substrate, silicon
The lower surface of substrate sets silicon substrate bottom electrode, and the upper surface of silicon substrate sets silicon substrate bonding electrode layer, silicon substrate bonding electricity
The upper surface of pole layer sets chip bonding electrode layer, and the upper surface of chip bonding electrode layer sets multiple grooves, at the bottom of groove
Portion and side wall set insulating layer, set gradually reflecting layer, P-GaN layers of MQW Quantum Well from bottom to up in a groove；In the chip
The top of N-GaN layers of the upper surface covering of bonding electrode layer, the N-GaN layers of upper surface for covering chip bonding electrode layer and groove,
N-GaN layers contact with chip bonding electrode layer and MQW Quantum Well；Opening, the bottom-exposed of opening are set on the N-GaN layers
Go out reflecting layer, chip positive electrode pad layer is set on reflecting layer.
The manufacture method of the LED chip of the membrane structure, it is characterized in that, comprise the following steps：
Step 1：LED epitaxial structure is grown on a sapphire substrate, and LED epitaxial structure includes N-GaN layers, the MQW grown successively
Quantum Well and P-GaN layers；
Step 2：Shallow slot is etched on N-GaN layers, shallow slot is extended to N-GaN layers of top by P-GaN layers of upper surface；
Step 3：Reflecting layer is made on P-GaN layers；
Step 4：Insulating layer, and etching insulating layer are prepared in crystal column surface, insulating layer is formed multiple discontinuous parts, each
Partial insulating layer wraps up reflecting layer, P-GaN layers and MQW Quantum Well；
Step 5：Chip bonding electrode layer is made in crystal column surface, chip bonding electrode layer is connected by shallow slot with N-GaN layers；
Step 6：Wafer is bonded with the silicon substrate for having bonded layer is deposited, the surface evaporation silicon substrate lower electrode layer of silicon substrate,
Another surface evaporation silicon substrate bonding electrode layer of silicon substrate, by chip bonding electrode layer and silicon substrate bonding electrode layer into line unit
Close；
Step 7：Sapphire Substrate is peeled off, performs etching to form opening in release surface, is open and is extended to by N-GaN layers of surface
Reflecting layer；
Step 8：Chip positive terminal pad layer is made in the opening that step 7 obtains.
Further, the metal in the reflecting layer is AgTiW.
Further, the metal of the chip bonding electrode layer is followed successively by Cr/Al/Pt/Au/Sn, wherein Sn layer thickness not
Less than 1 μm.
Further, in the step 6, bonding temperature is 250 ~ 350 DEG C, and bonding pressure is 1000 ~ 5000N, during bonding
Between be 10 ~ 30min.
Further, the metal of the chip positive terminal pad layer is followed successively by Cr/Al/Pt/Au, and wherein Au layer thickness is not less than
1um。
The LED chip and its manufacture method of membrane structure of the present invention, have low thermal resistance, homogeneous current distribution, driving
The features such as electric current is big, output optical density height, efficiently solve the deficiency of conventional LED chip.
Brief description of the drawings
Fig. 1 is the structure diagram of the LED chip of membrane structure of the present invention.
Description of reference numerals：1-N-GaN layers, 2-MQW Quantum Well, 3-P-GaN layers, 4- reflecting layer, 5- insulating layers, 6- chips
Bonding electrode layer, 7- silicon substrate bonding electrodes layer, 8- silicon substrates, 9- silicon substrates lower electrode layer, 10- chip positive electrode pad layers.
Embodiment
With reference to specific attached drawing, the invention will be further described.
As shown in Figure 1, the LED chip of membrane structure of the present invention includes silicon substrate 8, the lower surface of silicon substrate 8 is set
Silicon substrate bottom electrode 9, the upper surface of silicon substrate 8 set silicon substrate bonding electrode layer 7, the upper surface of silicon substrate bonding electrode layer 7
Chip bonding electrode layer 6 is set, and the upper surface of chip bonding electrode layer 6 sets multiple grooves, set in the bottom of groove and side wall
Insulating layer 5 is put, sets gradually reflecting layer 4, P-GaN layers 3 and MQW Quantum Well 2 from bottom to up in a groove；In the chip bonding
The upper surface covering N-GaN layers 1 of electrode layer 6, N-GaN layers 1 cover the upper surface of chip bonding electrode layer 6 and the top of groove；
Opening is set on the N-GaN layers 1, and the bottom-exposed of opening goes out reflecting layer 4, and the weldering of chip positive electrode is set on reflecting layer 4
Disc layer 10.
The manufacture method of the LED chip of membrane structure of the present invention, comprises the following steps
Step 1：N-GaN layers 1,3 shape of MQW Quantum Well 2 and P-GaN layers are grown successively on a sapphire substrate using MOCVD device
Into complete LED epitaxial structure, luminous ripple can be changed by varying temperature in 2 growth course of MQW Quantum Well and In, Al component
It is long；
Step 2：Using positive photoresist mask technique, mask pattern is made, by ICP lithographic techniques, by N-GaN layers 1
Shallow slot, which etches, to be come, and shallow slot is extended in N-GaN layers 1 by the upper surface of P-GaN layers 3；
Step 3：Using negative photoresist mask technique, the figure in reflecting layer 4 is made, and is made and reflected by magnetron sputtering technique
Layer 4, reflecting layer 4 is arranged on P-GaN layers 3, and 4 metal of reflecting layer is generally AgTiW；
Step 4：Using PVD technique AlN insulating layers, low temperature are prepared in crystal column surface（25~100℃）PVD process can use negative
Property photolithographic techniques make insulating layer 5, high temperature（100~600℃）PVD process does mask using positive photoresist, is carved by RIE
Lose fabrication techniques insulating layer 5；The insulating layer 5 wraps up reflecting layer 4, P-GaN layers 3 and MQW Quantum Well 2；
Step 5：Using negative photoresist mask technique, 6 figure of chip bonding electrode layer is made, and pass through electron beam evaporation equipment
Chip bonding electrode layer 6 is made with thermal resistance evaporation equipment, metal layer is followed successively by Cr/Al/Pt/Au/Sn, and wherein Sn layer thickness is not low
In 1 μm；
Step 6：Using thermocompression bonding technology, wafer is bonded with the silicon substrate 8 for having bonded layer is deposited, a surface of silicon substrate 8
Silicon substrate lower electrode layer 9, another surface evaporation silicon substrate bonding electrode layer 7 of silicon substrate 8 is deposited；Bonding temperature：250~350
DEG C, bonding pressure：1000 ~ 5000N, bonding time：10 ~ 30min, by chip bonding electrode layer 6 and silicon substrate bonding electrode layer 7
Form good metal bonding；
Step 7：Using laser lift-off technique, laser incides LED epitaxial structure from wafer rear, using GaN to laser absorption
Principle, by GaN and Al2O3With reference to layer open, the stripping for completing Sapphire Substrate removes；
Step 8：Continue technique processing in release surface, mask pattern is made using positive photoresist mask technique, utilizes ICP
Lithographic technique, the GaN epitaxial layer of unmasked areas is etched, until arriving reflecting layer 4, forms opening；
Step 9：Using negative photoresist mask technique, 10 figure of chip positive terminal pad layer is made in opening, and pass through electronics
Beam evaporation equipment making chip positive terminal pad layer 10, metal layer is followed successively by Cr/Al/Pt/Au, and wherein Au layer thickness is not less than 1um；
Step 10：Using crusher cutting technique, silicon substrate and epitaxial film are subjected to cutting separation along Cutting Road, complete chip
Processing.
Claims (6)
1. a kind of LED chip of membrane structure, it is characterized in that：Including silicon substrate（8）, silicon substrate（8）Lower surface set silicon substrate
Plate bottom electrode（9）, silicon substrate（8）Upper surface set silicon substrate bonding electrode layer（7）, silicon substrate bonding electrode layer（7）It is upper
Surface sets chip bonding electrode layer（6）, chip bonding electrode layer（6）Upper surface multiple grooves are set, in the bottom of groove
Insulating layer is set with side wall（5）, set gradually reflecting layer from bottom to up in a groove（4）, P-GaN layers（3）With MQW Quantum Well
（2）；In the chip bonding electrode layer（6）Upper surface cover N-GaN layers（1）, N-GaN layers（1）Cover chip bonding electrode
Layer（6）Upper surface and groove top, N-GaN layers（1）With chip bonding electrode layer（6）With MQW Quantum Well（2）Contact；
It is N-GaN layers described（1）Upper to set opening, the bottom-exposed of opening goes out reflecting layer（4）, in reflecting layer（4）Upper setting chip positive electricity
Pole pad layer（10）.
2. a kind of manufacture method of the LED chip of membrane structure, it is characterized in that, comprise the following steps：
Step 1：LED epitaxial structure is grown on a sapphire substrate, and LED epitaxial structure includes the N-GaN layers grown successively（1）、
MQW Quantum Well（2）With P-GaN layers（3）；
Step 2：At N-GaN layers（1）Upper etching shallow slot, shallow slot is by P-GaN layers（3）Upper surface extend to N-GaN layers（1）It is upper
Portion；
Step 3：At P-GaN layers（3）Upper making reflecting layer（4）；
Step 4：Insulating layer is prepared in crystal column surface（5）, and etching insulating layer（5）, make insulating layer（5）Formed multiple discontinuous
Part, the insulating layer of each part（5）Wrap up reflecting layer（4）, P-GaN layers（3）With MQW Quantum Well（2）；
Step 5：Chip bonding electrode layer is made in crystal column surface（6）, chip bonding electrode layer（6）Pass through shallow slot and N-GaN layers
（1）Connection；
Step 6：Wafer is had to the silicon substrate of bonded layer with evaporation（8）Bonding, silicon substrate（8）A surface evaporation silicon substrate under electricity
Pole layer（9）, silicon substrate（8）Another surface evaporation silicon substrate bonding electrode layer（7）, by chip bonding electrode layer（6）With silicon substrate
Plate bonding electrode layer（7）It is bonded；
Step 7：Sapphire Substrate is peeled off, performs etching to form opening in release surface, is open by N-GaN layers（1）Surface prolong
Extend reflecting layer（4）；
Step 8：Chip positive terminal pad layer is made in the opening that step 7 obtains（10）.
3. the manufacture method of the LED chip of membrane structure as claimed in claim 2, it is characterized in that：The reflecting layer（4）Gold
Belong to for AgTiW.
4. the manufacture method of the LED chip of membrane structure as claimed in claim 2, it is characterized in that：The chip bonding electrode
Layer（6）Metal be followed successively by Cr/Al/Pt/Au/Sn, wherein Sn layer thickness is not less than 1 μm.
5. the manufacture method of the LED chip of membrane structure as claimed in claim 2, it is characterized in that：In the step 6, bonding
Temperature is 250 ~ 350 DEG C, and bonding pressure is 1000 ~ 5000N, and bonding time is 10 ~ 30min.
6. the manufacture method of the LED chip of membrane structure as claimed in claim 2, it is characterized in that：The chip positive terminal pad
Layer（10）Metal be followed successively by Cr/Al/Pt/Au, wherein Au layer thickness is not less than 1um.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711067896.5A CN107910406A (en) | 2017-11-03 | 2017-11-03 | The LED chip and its manufacture method of membrane structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711067896.5A CN107910406A (en) | 2017-11-03 | 2017-11-03 | The LED chip and its manufacture method of membrane structure |
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| Publication Number | Publication Date |
|---|---|
| CN107910406A true CN107910406A (en) | 2018-04-13 |
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ID=61842443
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| Application Number | Title | Priority Date | Filing Date |
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| CN201711067896.5A Pending CN107910406A (en) | 2017-11-03 | 2017-11-03 | The LED chip and its manufacture method of membrane structure |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108470812A (en) * | 2018-06-04 | 2018-08-31 | 佛山市国星半导体技术有限公司 | A kind of film flip LED chips and preparation method thereof |
| CN110021691A (en) * | 2019-04-03 | 2019-07-16 | 厦门市三安光电科技有限公司 | A kind of light emitting semiconductor device |
| CN110265520A (en) * | 2019-07-02 | 2019-09-20 | 华南理工大学 | Optimize the embedded electrode structure LED chip and preparation method thereof of current distribution |
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| CN103311395A (en) * | 2013-05-08 | 2013-09-18 | 北京大学 | Laser stripping film LED (Light-Emitting Diode) and preparation method thereof |
| CN104576872A (en) * | 2013-10-12 | 2015-04-29 | 山东浪潮华光光电子股份有限公司 | Semiconductor LED chip and manufacturing method thereof |
| CN105428471A (en) * | 2015-11-12 | 2016-03-23 | 晶能光电（江西）有限公司 | Thin film flip LED chip and preparation method thereof and white light LED chip |
| CN105914277A (en) * | 2016-06-04 | 2016-08-31 | 华南理工大学 | Inverted-type high-power ultraviolet LED chip and manufacturing method thereof |
-
2017
- 2017-11-03 CN CN201711067896.5A patent/CN107910406A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103311395A (en) * | 2013-05-08 | 2013-09-18 | 北京大学 | Laser stripping film LED (Light-Emitting Diode) and preparation method thereof |
| CN104576872A (en) * | 2013-10-12 | 2015-04-29 | 山东浪潮华光光电子股份有限公司 | Semiconductor LED chip and manufacturing method thereof |
| CN105428471A (en) * | 2015-11-12 | 2016-03-23 | 晶能光电（江西）有限公司 | Thin film flip LED chip and preparation method thereof and white light LED chip |
| CN105914277A (en) * | 2016-06-04 | 2016-08-31 | 华南理工大学 | Inverted-type high-power ultraviolet LED chip and manufacturing method thereof |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108470812A (en) * | 2018-06-04 | 2018-08-31 | 佛山市国星半导体技术有限公司 | A kind of film flip LED chips and preparation method thereof |
| CN108470812B (en) * | 2018-06-04 | 2024-07-12 | 佛山市国星半导体技术有限公司 | Thin film flip LED chip and manufacturing method thereof |
| CN110021691A (en) * | 2019-04-03 | 2019-07-16 | 厦门市三安光电科技有限公司 | A kind of light emitting semiconductor device |
| CN110021691B (en) * | 2019-04-03 | 2020-05-01 | 厦门市三安光电科技有限公司 | Semiconductor light emitting device |
| CN110265520A (en) * | 2019-07-02 | 2019-09-20 | 华南理工大学 | Optimize the embedded electrode structure LED chip and preparation method thereof of current distribution |
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Application publication date: 20180413 |
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