KR20100035846A - Light emitting device and method for fabricating the same - Google Patents

Light emitting device and method for fabricating the same Download PDF

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KR20100035846A
KR20100035846A KR1020080095207A KR20080095207A KR20100035846A KR 20100035846 A KR20100035846 A KR 20100035846A KR 1020080095207 A KR1020080095207 A KR 1020080095207A KR 20080095207 A KR20080095207 A KR 20080095207A KR 20100035846 A KR20100035846 A KR 20100035846A
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layer
semiconductor layer
mesa
light emitting
substrate
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KR1020080095207A
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Korean (ko)
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KR101457209B1 (en
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서원철
김창연
이장우
김윤구
윤여진
김종규
이준희
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서울옵토디바이스주식회사
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Abstract

A light emitting device and a method of manufacturing the same are disclosed. This light emitting element includes a substrate. A light emitting structure of the compound semiconductor is positioned over an area of the substrate, and includes an upper semiconductor layer of a first conductivity type, an active layer, and a lower semiconductor layer of a second conductivity type. Meanwhile, a separate layer of the first conductivity type semiconductor spaced apart from the light emitting structure is positioned above another region of the substrate. A metal material structure is positioned between the light emitting structure and the separated layer and the substrate to electrically connect the lower semiconductor layer and the separated layer. Meanwhile, an insulating structure covers the side surface of the light emitting structure to insulate the metal material structure from the upper semiconductor layer and the active layer. In addition, a first bonding pad is formed on the light emitting structure, and a second bonding pad is formed on the separated layer. Accordingly, it is possible to prevent an electrical short circuit of the light emitting structure due to the metal etching by-product and to provide a light emitting device having improved adhesion of bonding pads.

Light Emitting Diode, Substrate Separation, Sacrificial Substrate, Bonding Pad, Gallium Nitride

Description

LIGHT EMITTING DEVICE AND METHOD FOR FABRICATING THE SAME}

The present invention relates to a light emitting device and a method of manufacturing the same, and more particularly to a light emitting device and a method of manufacturing the same to prevent the electrical short-circuit of the light emitting diode is generated by the metal by-products during the etching process and to enhance the adhesion of the bonding pads It is about.

In general, nitrides of Group III elements such as gallium nitride (GaN) and gallium aluminum nitride (AlGaN) have excellent thermal stability and have a direct transition energy band structure. It is attracting much attention as a substance. In particular, blue and green light emitting devices using indium gallium nitride (GaInN) have been used in various applications such as large-scale color flat panel display devices, traffic lights, indoor lighting, high density light sources, high resolution output systems, and optical communications.

Such nitride semiconductors of group III elements are difficult to fabricate homogeneous substrates capable of growing them. Is grown through. As a hetero substrate, a sapphire substrate having a hexagonal structure is mainly used. Also, in recent years, after growing nitride semiconductor layers on a sacrificial substrate such as sapphire, a technique of manufacturing a light emitting diode having a vertical structure by separating the sacrificial substrate by a laser lift-off (LLO) process is disclosed. Is being studied.

1 is a cross-sectional view illustrating a vertical light emitting diode according to the prior art.

Referring to FIG. 1, the vertical light emitting diode includes a conductive substrate 31. Compound semiconductor layers including an N-type semiconductor layer 15, an active layer 17, and a P-type semiconductor layer 19 are positioned on the conductive substrate 31. In addition, a reflective metal layer 23, a protective metal layer 25, and an adhesive layer 27 are interposed between the conductive substrate 31 and the P-type semiconductor layer 19.

Compound semiconductor layers are generally grown on a sacrificial substrate (not shown), such as a sapphire substrate, using metalorganic chemical vapor deposition or the like. Thereafter, the metal reflective layer 23, the protective metal layer 25, and the adhesive layer 27 are formed on the compound semiconductor layers, and the conductive substrate 31 is bonded. Subsequently, the sacrificial substrate is separated from the compound semiconductor layers using laser lift-off techniques or the like, and the N-type semiconductor layer 15 is exposed. Thereafter, the compound semiconductor layers are separated into respective light emitting cell regions on the conductive substrate 31 through etching. Subsequently, an electrode pad 33 is formed on the N-type half body layer 15 for each of the separated light emitting cell regions, and the conductive substrate 31 is diced for each light emitting cell region and separated into individual elements. Accordingly, by adopting the conductive substrate 31 having excellent heat dissipation performance, the light emitting efficiency of the light emitting diode can be improved, and the light emitting diode of FIG. 1 having a vertical structure can be provided.

However, since the conductive substrate generally has a large coefficient of thermal expansion in comparison with a sacrificial substrate such as sapphire, warpage of the conductive substrate occurs when the sacrificial substrate is separated from the compound semiconductor layers. The warpage of the substrate increases not only the separation process of the sacrificial substrate but also subsequent processes such as separation of the light emitting cell regions, formation of electrode pads, dicing processes, and the like, thereby increasing device defects.

In order to improve this problem, a method of using an insulating substrate having the same or similar thermal expansion coefficient as that of the sacrificial substrate instead of the conductive substrate has been proposed as a bonding substrate. When using an insulated substrate, in addition to the electrode pads 33 formed on the N-type semiconductor layer 15, another electrode pad needs to be provided on the metal layer on the bonding substrate, for example, the protective metal layer 25 to supply current. There is. To this end, in the process of separating the light emitting cell regions, for example, the protective metal layer 25 is exposed around the light emitting cell regions, and an electrode pad may be formed on the exposed protective metal layer 25.

In order to expose the protective metal layer 25, the compound semiconductor layers are dry etched using plasma. At this time, in order to prevent the compound semiconductor layers from remaining on the protective metal layer 25, overetching is generally performed. In this case, a part of the protective metal layer 25 may be etched, and metal by-products may adhere to sidewalls of the compound semiconductor layers, thereby causing an electrical short between the N-type semiconductor layer 15 and the P-type semiconductor layer 19.

In addition, the protective metal layer 25 is easily damaged by plasma during the dry etching process. Such modification of the protective metal layer 25 lowers the adhesive force with the electrode pad to be formed thereon, making it difficult to form the electrode pad.

SUMMARY OF THE INVENTION An object of the present invention is to provide a light emitting device capable of preventing an electrical short circuit between an N-type semiconductor layer and a P-type semiconductor layer due to etching by-products of a metal layer, and a method of manufacturing the same.

Another object of the present invention is to provide a light emitting device capable of enhancing the adhesion of electrode pads and a method of manufacturing the same.

The present invention provides a light emitting device and a method of manufacturing the same. A light emitting device according to an aspect of the present invention includes a substrate; A light emitting structure of a compound semiconductor positioned on an area of the substrate and including an upper semiconductor layer of a first conductivity type, an active layer, and a lower semiconductor layer of a second conductivity type; A separate layer of a first conductivity type semiconductor positioned over another region of the substrate and spaced apart from the light emitting structure; A metal material structure positioned between the light emitting structure and the separated layer and the substrate to electrically connect the lower semiconductor layer and the separated layer; And an insulating structure covering the side surface of the light emitting structure to insulate the metal material structure from the upper semiconductor layer and the active layer.

According to one aspect of the present invention, since the side surface of the light emitting structure is covered by the insulating structure, it is possible to prevent the electrical short circuit of the light emitting structure by the metal by-products.

The light emitting device may further include a first electrode pad formed on the light emitting structure and a second electrode pad formed on the separated layer. Since the second electrode pad is formed on the separated layer of the first conductivity type semiconductor, adhesion strength is enhanced as compared with the case where the second electrode pad is formed on the modified metal layer.

Meanwhile, a reflective metal layer may be interposed between the lower surface of the lower semiconductor layer and the metal material structure. The reflective metal layer reflects light generated from the light emitting structure to improve light emission efficiency. The reflective metal layer may be formed of, for example, silver (Ag), aluminum (Al), silver alloy, or aluminum alloy in the light emitting structure. In addition, an ohmic metal layer may be interposed between the reflective metal layer and the lower semiconductor layer. In addition, the metal material structure may include a protective metal layer covering the reflective metal layer. The protective metal layer prevents the reflective metal layer from being exposed to the atmosphere.

In addition, the light emitting device may further include a bonding metal bonding the metal material structure and the substrate. Bonding metals enhance adhesion of the substrate and transfer heat generated from the light emitting structure toward the substrate.

Meanwhile, the metal material structure may be connected to the separated layer through the insulating structure. To this end, the insulating structure has a through hole exposing the separated layer.

The separated layer may be positioned at the same level as the upper semiconductor layer. In addition, the separated layer may be formed of the same material as a material forming at least a portion of the upper semiconductor layer. Thus, the separated layer may be formed from the compound semiconductor layer grown by the same process as the upper semiconductor layer, and does not require a separate process for growing the separated layer.

 The separated layer may be positioned on some regions around the light emitting structure or on some regions, but is not limited thereto, and may continuously surround the light emitting structure.

The insulating structure may extend to a lower surface of the lower semiconductor layer and be interposed between the lower semiconductor layer and the metal material structure. In addition, the insulating structure may cover the periphery of the reflective metal layer.

The insulating structure may include at least one of SiO 2 , SiN, MgO, TaO, TiO 2 , and a polymer.

Meanwhile, an upper surface of the upper semiconductor layer may include a roughened surface. The roughened surface improves the extraction efficiency of light generated by the light emitting structure.

A light emitting device manufacturing method according to another aspect of the present invention includes a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first and second conductive semiconductor layers on a sacrificial substrate. Forming compound semiconductor layers, wherein the first conductivity-type semiconductor layer is located closer to the sacrificial substrate; Patterning the compound semiconductor layers to form a mesa, wherein the first conductivity type semiconductor layer is exposed around the mesa; Forming an insulating structure covering the first conductive semiconductor layer and the active layer exposed on the side of the mesa, wherein a portion of the first conductive semiconductor layer around the mesa is exposed; Forming a metal material structure electrically connecting the mesa and a portion of the first conductivity type semiconductor layer exposed around the mesa; Bonding a substrate on the metal material structure; Removing the sacrificial substrate to expose the first conductivity type semiconductor layer; And patterning the exposed first conductive semiconductor layer to separate the partial region around the mesa from the first conductive semiconductor layer on the mesa.

According to this aspect, since the mesa side surface is covered with the insulating structure, it can prevent that a 1st conductivity type semiconductor layer and a 2nd conductivity type semiconductor layer are electrically short-circuited by a metal by-product. Moreover, during certain etching processes, the metal layer can be prevented from being exposed, thus preventing the generation of metal byproducts.

The light emitting device manufacturing method includes: forming a first electrode pad on a first conductive semiconductor layer on the mesa; And forming a second electrode pad on the partial region around the mesa. Since the second electrode pad is formed on the first conductive semiconductor layer in the same manner as the first electrode pad, the adhesive force of the second electrode pad is enhanced as compared with the case where the second electrode pad is formed on the modified metal layer.

Prior to forming the metal material structure, a reflective metal layer may be formed on the mesa. Furthermore, the reflective metal layer may be formed before forming the insulating structure. The reflective metal layer reflects light generated by the active layer to improve luminous efficiency. Meanwhile, an ohmic contact layer may be formed before forming the reflective metal layer.

Meanwhile, the metal material structure may include a protective metal layer protecting the reflective metal layer. The protective metal layer prevents the reflective metal layer from being exposed to the outside.

In some embodiments of the present invention, forming the insulating structure includes: forming an insulating layer covering the mesa and a first conductive semiconductor layer exposed around the mesa; And patterning the insulating layer to form a through hole exposing the upper portion of the mesa and exposing a portion of the first conductivity-type semiconductor layer around the mesa. A plurality of through holes may be formed.

In some embodiments of the present invention, forming the insulating structure includes: forming an insulating layer covering the mesa and a first conductive semiconductor layer exposed around the mesa; And patterning the insulating layer to expose the upper portion of the mesa, and to expose a portion of the first conductive semiconductor layer around the mesa, wherein the portion may surround the mesa.

The insulating structure may cover an edge of the upper surface of the mesa. In addition, when the reflective metal layer is formed, the insulating structure may be formed to cover an edge of the reflective metal layer.

In addition, in some embodiments of the present disclosure, after the sacrificial substrate is removed, a roughened surface may be formed on a surface of the exposed first conductive semiconductor layer. The roughened surface may be formed before or after forming the electrode pads.

The first conductive semiconductor layer is formed of an n-type gallium nitride compound semiconductor layer, and the second conductive semiconductor layer is formed of a p-type gallium nitride compound semiconductor layer. In addition, the active layer may be formed of a gallium nitride compound semiconductor layer, such as indium gallium nitride, and may have a single quantum well structure or a multiple quantum well structure.

According to the present invention, it is possible to provide a light emitting device capable of preventing an electrical short circuit between an N-type semiconductor layer and a P-type semiconductor layer by etching by-products of the metal layer, and a method of manufacturing the same. In addition, it is possible to enhance the adhesion of the electrode pads.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided as examples to ensure that the spirit of the present invention to those skilled in the art will fully convey. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms. And, in the drawings, the width, length, thickness, etc. of the components may be exaggerated for convenience. Like numbers refer to like elements throughout.

2 is a cross-sectional view illustrating a light emitting device according to an embodiment of the present invention.

Referring to FIG. 2, the light emitting device includes a bonding substrate 71, a light emitting structure 58, an insulating structure 62, a metal material structure 63, and a separated layer 55s. In addition, the light emitting device may include a reflective metal layer 61, a bonding metal 67, and first and second bonding pads 83a and 83b.

The bonding substrate 71 is separated from a growth substrate for growing the compound semiconductor layers, and means a substrate bonded to the compound semiconductor layers that have been grown. The bonding substrate 71 may be a sapphire substrate, but is not limited thereto, and may be another kind of insulating or conductive substrate.

The light emitting structure 58 is positioned on the bonding substrate 71 and includes a first conductive upper semiconductor layer 55, an active layer 57, and a second conductive lower semiconductor layer 59. The active layer 57 is interposed between the upper and lower semiconductor layers. The active layer 57 and the upper and lower semiconductor layers 55 and 59 may be formed of III-N-based compound semiconductors such as (Al, Ga, In) N semiconductors. The upper and lower semiconductor layers 55 and 59 may be a single layer or multiple layers, respectively. For example, the upper or lower semiconductor layers 55 and 59 may include a contact layer and a cladding layer, and may also include a superlattice layer. In addition, the active layer 55 may have a single quantum well structure or a multiple quantum well structure.

The upper semiconductor layer 55 may have a roughened surface 55a on its upper surface. The roughened surface 55a improves the extraction efficiency of light generated in the active layer 57.

On the other hand, the separated layer 55s is formed of a first conductive semiconductor of the same conductivity type as the upper semiconductor layer 55 and is spaced apart from the light emitting structure 58. One or more separated layers 55s may be positioned around the light emitting structure 58, or may be positioned to surround the light emitting structure 58, that is, in a ring shape, for example, a rectangular ring shape.

The separated layer 55s may be formed by being grown together with the upper semiconductor layer 55 and then separated from the upper semiconductor layer 55. Therefore, the separated layer 55s may be positioned at the same level as the upper semiconductor layer 55 and may be formed of the same material as at least a portion of the upper semiconductor layer 55.

The metal material structure 63 is disposed between the light emitting structure 58 and the substrate 71 and between the separated layer 55s and the substrate 71 so as to be separated from the lower semiconductor layer 59. The layers 55s are electrically connected. The metal material structure 63 may be formed in a single layer structure or a multilayer structure, for example, Ni, Ti, Ta, Pt, W, Cr, Pd and the like. The metal material structure 62 is preferably in ohmic contact with the separated layer 55s.

Meanwhile, a reflective metal layer 61 may be interposed between the metal material structure 63 and the light emitting structure 58. The reflective metal layer 61 may be formed of a metal material having a high reflectance such as silver (Ag) or aluminum (Al), or an alloy thereof. The reflective metal layer 61 may be formed on a portion of the lower surface of the lower semiconductor layer 59. In addition, an ohmic contact layer (not shown) may be interposed between the reflective metal layer 61 and the lower semiconductor layer 59.

The metal material structure 63 includes a protective metal layer covering the reflective metal layer 61. The protective metal layer covers the reflective metal layer 61 to prevent diffusion of the metal material and prevents the reflective metal layer 61 from being exposed to the outside.

An insulating structure 62 covers the side surface of the light emitting structure 58 to insulate the metal material structure 63 from the upper semiconductor layer 55 and the active layer 57. The insulating structure 62 may cover a portion of the upper semiconductor layer 55 and the active layer 57 exposed on the side surface of the light emitting structure 58, and may also cover the lower semiconductor layer 59. In addition, the insulating structure 62 may extend to the lower surface of the lower semiconductor layer 59 to be interposed between the metal material structure 63 and the lower surface of the lower semiconductor layer 59. In addition, the insulating structure 62 may cover an edge of the reflective metal layer 61. The insulating structure 62 may be formed of, for example, SiO 2 , SiN, MgO, TaO, TiO 2 , or a polymer.

Meanwhile, the insulating structure 62 may have a through hole exposing the separated layer 55s, and the metal material structure 63 may be electrically connected to the separated layer 55s through the through hole. Can be. A plurality of through holes may be formed around the light emitting structure 58. Alternatively, the insulating structure 62 is defined around the side surface of the light emitting structure 58, and the metal material structure 63 covers the insulating structure 62 and the separated layer 55s to separate the separated structure. May be electrically connected to layer 55s.

The bonding metal 67 is interposed between the bonding substrate 71 and the metal material structure 63. The bonding metal 67 improves the adhesion between the metal material structure 63 and the bonding substrate 71 to prevent the bonding substrate 71 from being separated from the metal material structure 63.

Meanwhile, a first electrode pad 83a is formed on the first conductive upper semiconductor layer 55, and a second electrode pad 83b is formed on the separated layer 55s. Similarly to the first electrode pad 83a, since the second electrode pad 83b is formed on the first conductive semiconductor layer, the adhesive force of the second electrode pad 83b is improved. In addition, the first electrode pad 83a and the second electrode pad 83b may be formed of the same metal material.

Wires may be bonded to the first and second electrode pads 83a and 83b so that current is supplied to generate light in the active layer 57 of the light emitting structure 58.

In this embodiment, it is preferable that the first conductivity type is N type and the second conductivity type is P type. In general, an N-type compound semiconductor, in particular, an N-type gallium nitride-based compound semiconductor has a lower specific resistance than a P-type gallium nitride-based compound semiconductor, so that transparent electrodes formed on the P-type compound semiconductor are generally omitted to disperse current. can do.

3 to 11 are cross-sectional views illustrating a method of manufacturing a light emitting device according to an embodiment of the present invention.

Referring to FIG. 3, compound semiconductor layers are formed on the sacrificial substrate 51. The sacrificial substrate 51 may be a sapphire substrate, but is not limited thereto and may be another hetero substrate. Meanwhile, the compound semiconductor layers include a first conductive semiconductor layer 55 and a second conductive semiconductor layer 59 and an active layer 57 interposed therebetween. The first conductivity type semiconductor layer 55 is located close to the sacrificial substrate 51.

The first and second conductivity-type semiconductor layers 55 and 59 may be formed in a single layer or multiple layers, respectively. In addition, the active layer 57 may be formed in a single quantum well structure or a multiple quantum well structure.

The compound semiconductor layers may be formed of a III-N-based compound semiconductor, and may be grown on the sacrificial substrate 51 by a process such as metal organic chemical vapor deposition (MOCVD) or molecular beam deposition (MBE). Can be.

Meanwhile, before forming the compound semiconductor layers, a buffer layer (not shown) may be formed. The buffer layer is adopted to mitigate lattice mismatch between the sacrificial substrate 51 and the compound semiconductor layers, and may be a gallium nitride-based material layer such as gallium nitride or aluminum nitride.

Referring to FIG. 4, the compound semiconductor layers are patterned to form mesas 60. The light emitting area is defined by the mesa 60. The compound semiconductor layers can be patterned using photo and etching processes, which are similar to the commonly known mesa etching processes. In this case, the second conductive semiconductor layer 59 and the active layer 57 around the mesa 60 are removed, and the first conductive semiconductor layer 55 is exposed. As shown, the first conductivity type semiconductor layer 55 may also be partially etched away. As a result, the first conductivity type semiconductor layer 55, the active layer 59, and the second conductivity type semiconductor layer are exposed on the mesa 60 side surface.

Referring to FIG. 5, an insulating structure 62 covering the first conductivity-type semiconductor layer 55 and the active layer exposed on the side of the mesa 60 is formed.

The insulating structure 62 may form, for example, an insulating layer covering the mesa 60 and the first conductive semiconductor layer 55 around the mesa 60, and then pattern the insulating layer to form the mesa 60. The upper region may be exposed, and a through hole 62a may be formed to expose a portion of the first conductivity-type semiconductor layer 55 around the mesa 60. The insulating layer may be formed of, for example, SiO 2 , SiN, MgO, TaO, TiO 2 , or a polymer. Alternatively, the insulating structure 62 forms an insulating layer covering the mesa 60 and the first conductivity-type semiconductor layer 55 around the mesa 60, and then covers the mesa 60 sidewalls. It may be formed by removing the insulating layer on the mesa 60 and the insulating layer on the first conductive semiconductor layer 55 around the mesa leaving the. In this case, an area of the first conductivity-type semiconductor layer 55 exposed around the mesa surrounds the mesa 60.

Meanwhile, before or after the insulation structure 62 is formed, the reflective metal layer 61 may be formed. The reflective metal layer 61 may be formed of silver (Ag) or aluminum (Al) or silver alloy or aluminum alloy, for example. The reflective metal layer 61 may be formed using a plating or deposition technique, for example, using a lift off process. Meanwhile, when the reflective metal layer 61 does not make ohmic contact with the second conductive semiconductor layer 59, an ohmic contact layer (not shown) may be formed before forming the reflective metal layer 61. The insulating structure 62 may cover an edge of the second conductivity-type semiconductor layer 59 and further cover an edge of the reflective metal layer 61.

Referring to FIG. 6, a metal material structure 63 is formed to electrically connect the mesa 60 and a portion of the first conductive semiconductor layer 55 exposed around the mesa. 63 may include a protective metal layer covering reflective metal layer 61. In addition, the metal material structure 63 covers the insulating structure 62 and is connected to the first conductivity-type semiconductor layer 55 exposed around the mesa 60. The metal material structure 63 may be formed of a single layer or multiple layers, for example, Ni, Ti, Ta, Pt, W, Cr, Pd and the like.

Referring to FIG. 7, a bonding metal 67a may be formed on the metal material structure 63. The bonding metal 67a may be formed of, for example, AuSn (80 / 20wt%) to a thickness of about 15,000 μm.

Referring to FIG. 8, a bonding metal 67b may be formed on the substrate 71, and the metal material structure 63 may be bonded to the substrate 71 by bonding the bonding metals 67a and 67b to face each other. Is bonded onto the phase. The substrate 71 is not particularly limited, but may be a substrate having the same thermal expansion coefficient as the sacrificial substrate 51, and may be, for example, a sapphire substrate.

Referring to FIG. 9, the sacrificial substrate 51 is removed and the first conductivity type semiconductor layer 55 is exposed. The sacrificial substrate 51 may be separated by laser lift off (LLO) technology or other mechanical or chemical methods. At this time, the buffer layer is also removed to expose the first conductivity-type semiconductor layer 55. FIG. 10 is a view illustrating the first conductive semiconductor layer 55 facing upward after the sacrificial substrate 51 is removed.

Referring to FIG. 11, the exposed first conductive semiconductor layer 55 is patterned to form the first conductive semiconductor layer around the mesa 60 from the first conductive semiconductor layer 55 on the mesa 60. Some areas of layer 55 are separated. As a result, the light emitting structure (58 of FIG. 2) is completed, and a separated layer 55s spaced from the light emitting structure 58 is formed.

Referring to FIG. 12, a first electrode pad 83a is formed on the first conductive semiconductor layer 55 on the mesa 60, and a second electrode pad 83b is formed on the separated layer 55s. Is formed. The electrode pads 83a and 83b may be formed of the same material. Meanwhile, a roughened surface may be formed on the upper surface 55a of the first conductivity-type semiconductor layer 55 on the mesa 60 by PEC (photoelectric chemistry) etching or the like. The roughened surface may be formed before or after forming the first electrode pad 83a. Thereby, the light emitting element of FIG. 2 is completed.

According to the present invention, by adopting the insulating structure 62, it is possible to prevent the etching by-products of the metal layer from sticking to the side surfaces of the light emitting structure 60. Therefore, an electrical short circuit between the first and second conductivity type semiconductor layers can be prevented. In addition, since the second electrode pad 83b is formed on the separated layer 55s of the first conductivity type semiconductor, the adhesive force of the second electrode pad 83b can be enhanced.

Although the embodiments of the present invention have been described above by way of example, the present invention is not limited to the above-described embodiments and may be variously modified and changed by those skilled in the art without departing from the spirit of the present invention. . Such modifications and variations are included in the scope of the present invention as defined in the following claims.

1 is a cross-sectional view illustrating a conventional vertical light emitting diode.

2 is a cross-sectional view illustrating a light emitting diode according to an embodiment of the present invention.

3 to 12 are cross-sectional views illustrating a method of manufacturing a light emitting diode according to an embodiment of the present invention.

Claims (19)

Board; A light emitting structure of a compound semiconductor positioned on an area of the substrate and including an upper semiconductor layer of a first conductivity type, an active layer, and a lower semiconductor layer of a second conductivity type; A separate layer of a first conductivity type semiconductor positioned over another region of the substrate and spaced apart from the light emitting structure; A metal material structure positioned between the light emitting structure and the separated layer and the substrate to electrically connect the lower semiconductor layer and the separated layer; And And an insulating structure covering a side surface of the light emitting structure to insulate the metal material structure from the upper semiconductor layer and the active layer. The method according to claim 1, The light emitting device further comprises a first electrode pad formed on the light emitting structure and a second electrode pad formed on the separated layer. The method according to claim 1, Further comprising a reflective metal layer interposed between the lower surface of the lower semiconductor layer and the metal material structure, The metal material structure includes a protective metal layer covering the reflective metal layer. The method according to claim 3, And a bonding metal bonding the metal material structure and the substrate. The method according to claim 1, And the metal material structure is connected to the separated layer through the insulating structure. The method according to claim 1, The separated layer is a light emitting device positioned on the same level as the upper semiconductor layer. The method according to claim 1, And the separated layer is formed of the same material as a material forming at least a portion of the upper semiconductor layer. The method according to claim 1, And the separated layer surrounds the light emitting structure. The method according to claim 1, The insulating structure extends to a lower surface of the lower semiconductor layer and is interposed between the lower semiconductor layer and the metal material structure. The method according to claim 1, The upper surface of the upper semiconductor layer comprises a rough surface. Compound compound layers including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first and second conductive semiconductor layers are formed on the sacrificial substrate, wherein the first conductive semiconductor is formed. A layer is located close to the sacrificial substrate; Patterning the compound semiconductor layers to form a mesa, wherein the first conductivity type semiconductor layer is exposed around the mesa; Forming an insulating structure covering the first conductive semiconductor layer and the active layer exposed on the side of the mesa, wherein a portion of the first conductive semiconductor layer around the mesa is exposed; Forming a metal material structure electrically connecting the mesa and a portion of the first conductivity type semiconductor layer exposed around the mesa; Bonding a substrate on the metal material structure; Removing the sacrificial substrate to expose the first conductivity type semiconductor layer; And Patterning the exposed first conductive semiconductor layer to separate the partial region around the mesa from the first conductive semiconductor layer on the mesa. The method according to claim 11, Forming a first electrode pad on the first conductivity-type semiconductor layer on the mesa, And forming a second electrode pad on the partial region around the mesa. The method according to claim 11, And forming a reflective metal layer on the mesa prior to forming the metal material structure. 14. The method of claim 13, And the metal material structure comprises a protective metal layer protecting the reflective metal layer. The method according to claim 11, The insulating structure is formed Forming an insulating layer covering the mesa and the first conductive semiconductor layer exposed around the mesa; Patterning the insulating layer to expose the upper portion of the mesa and to form a through hole for exposing a portion of the first conductivity-type semiconductor layer around the mesa. The method according to claim 15, And the insulating structure covers an edge of the upper surface of the mesa. The method according to claim 11, The insulating structure is formed Forming an insulating layer covering the mesa and the first conductive semiconductor layer exposed around the mesa; And patterning the insulating layer to expose the upper portion of the mesa, and to expose a portion of the first conductivity-type semiconductor layer around the mesa, wherein the portion of the region surrounds the mesa. The method according to claim 11, And after the sacrificial substrate is removed, forming a roughened surface on the exposed first conductive semiconductor layer. The method according to claim 11, The first conductive semiconductor layer is an n-type gallium nitride compound semiconductor layer, the second conductive semiconductor layer is a p-type gallium nitride compound semiconductor layer.
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WO2011162479A2 (en) * 2010-06-24 2011-12-29 Seoul Opto Device Co., Ltd. Light emitting diode
KR101138978B1 (en) * 2010-09-27 2012-04-26 서울옵토디바이스주식회사 High efficiency light emitting diode and method of fabricating the same
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