KR100986963B1 - Light emitting device and method for fabricating the same - Google Patents

Abstract

A compound semiconductor layer including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; A metal reflective layer formed on a portion of the second conductive semiconductor layer; An insulating layer formed in at least a boundary region of the second conductive semiconductor layer; A protective metal layer formed to cover the second conductive semiconductor layer on which the metal reflective layer and the insulating layer are formed; And a substrate bonded to the protective metal layer, wherein a boundary region of the second conductive semiconductor layer includes an outer region of the second conductive semiconductor layer along an outer circumference of the second conductive semiconductor layer. A light emitting element is provided.

Light emitting diode, Dry etching, Insulation oxide, Insulation layer, By-product

Description

LIGHT EMITTING DEVICE AND METHOD FOR FABRICATING THE SAME}

The present invention relates to a light emitting device and a method of manufacturing the same, and in particular, metal by-products by etching are attached to the side surfaces of the compound semiconductor layer exposed during the etching process, so that the metal by-products can be induced so as not to impair the electrical and optical properties. The present invention relates to a light emitting device that prevents or minimizes exposure of a protective metal layer by forming an insulating layer on a portion where the protective metal layer may be exposed, and a method of manufacturing the same.

In general, nitrides of Group III elements, such as gallium nitride (GaN) and aluminum nitride (AlN), have excellent thermal stability and have a direct transition energy band structure. As a lot of attention. In particular, blue and green light emitting devices using gallium nitride (GaN) have been used in various applications such as large-scale color flat panel display devices, traffic lights, indoor lighting, high density light sources, high resolution output systems, and optical communications.

The nitride semiconductor layer of such a group III element, in particular, GaN, is difficult to fabricate a homogeneous substrate capable of growing it, and therefore, it is difficult to manufacture a metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy method on a heterogeneous substrate having a similar crystal structure. ; MBE) is grown through the process. As a hetero substrate, a sapphire substrate having a hexagonal structure is mainly used. However, since sapphire is an electrically insulator, it restricts the light emitting diode structure and is very stable mechanically and chemically, making it difficult to process such as cutting and shaping, and low thermal conductivity. Accordingly, in recent years, after the nitride semiconductor layers are grown on a dissimilar substrate such as sapphire, a technique of manufacturing a light emitting diode having a vertical structure by separating the dissimilar substrate has been studied.

1 is a cross-sectional view illustrating a vertical light emitting diode according to the prior art.

Referring to FIG. 1, the vertical light emitting diode includes a conductive substrate 31. Compound semiconductor layers including an N-type semiconductor layer 15, an active layer 17, and a P-type semiconductor layer 19 are positioned on the conductive substrate 31. In addition, a metal reflective layer 23, a protective metal layer 25, and an adhesive layer 27 are interposed between the conductive substrate 31 and the P-type semiconductor layer 19.

Compound semiconductor layers are generally grown on a sacrificial substrate (not shown), such as a sapphire substrate, using metalorganic chemical vapor deposition or the like. Thereafter, the metal reflective layer 23, the protective metal layer 25, and the adhesive layer 27 are formed on the compound semiconductor layers, and the conductive substrate 31 is attached. Subsequently, the sacrificial substrate is separated from the compound semiconductor layers using laser lift-off techniques or the like, and the N-type semiconductor layer 15 is exposed. Thereafter, the compound semiconductor layers are separated into respective light emitting cell regions on the conductive substrate 31 through etching. Subsequently, an electrode pad 33 is formed on the N-type half body layer 15 for each of the separated light emitting cell regions, and the conductive substrate 31 is diced for each light emitting cell region and separated into individual elements. Accordingly, by adopting the conductive substrate 31 having excellent heat dissipation performance, the light emitting efficiency of the light emitting diode can be improved, and the light emitting diode of FIG. 1 having a vertical structure can be provided.

However, in the case of the vertical type light emitting diode using the conductive substrate as described above, dry etching is usually performed to separate each cell at the time of manufacture. Since this etching is a separation of the device itself, the etching is deep (more than 2um) unlike the mesa etching process to form the electrode. Therefore, the etching is performed deeper than the actual etching depth in order to remove what remains in some exposed portions after etching.

In this etching process, the protective metal layer 25 protecting the metal reflective layer 23 is etched and the etched by-products are adsorbed on the side of each cell. By-products adsorbed to each cell electrically connect the N-type semiconductor layer 15 and the P-type semiconductor layer 19 to cause a short (short circuit). These by-products that may be generated during the etching process should be removed by wet etching, but metals such as W, Pt, and Ni, which are typically used as the protective metal layer 25, are difficult to remove because they have properties that are not removed even by wet etching.

The problem to be solved by the present invention is to provide a light emitting device and a method for manufacturing the same by which the by-products of the protective metal layer generated in the dry etching process is attached to the compound semiconductor layer to reduce the electrical properties as described above.

According to an aspect of the present invention for solving this problem, a compound semiconductor layer comprising a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; A metal reflective layer formed on a portion of the second conductive semiconductor layer; An insulating layer spaced apart from the metal reflective layer and surrounding the metal reflective layer, wherein at least a portion of the insulating layer is in contact with the second conductive semiconductor layer; A protective metal layer formed to cover the second conductive semiconductor layer on which the metal reflective layer and the insulating layer are formed; And a substrate bonded to the protective metal layer, wherein the insulating layer extends outward from at least some region formed in contact with the second conductive semiconductor layer and includes an exposed region formed around the second conductive semiconductor layer. There is provided a light emitting device characterized in that.

Preferably, the substrate is a conductive substrate.

Preferably, the substrate is a sapphire substrate.

Preferably, the insulating layer includes at least one of SiO ₂ , SiN, MgO, TaO, TiO ₂ , and polymer.

The insulating layer is formed to expose a portion of the protective metal layer, and the light emitting device includes: a first electrode formed on the first conductive semiconductor layer; The display device may further include a second electrode formed on the protective metal layer exposed through the insulating layer.

Preferably, the protective metal layer in contact with the second electrode may be filled to the upper surface of the insulating layer.

Preferably, the second electrode in contact with the protective metal layer may be filled to the lower surface of the insulating layer.

Preferably, the insulating layer may be formed to extend at least a portion of the lower surface of the second conductivity type semiconductor layer.

Preferably, the insulating layer may extend to cover at least a portion of the metal reflective layer.

According to another aspect of the invention, forming a first conductive semiconductor layer, an active layer, a second conductive semiconductor layer on the sacrificial substrate and forming a metal reflective layer on a portion of the upper portion of the second conductive semiconductor layer; Forming an insulating layer on the second conductive semiconductor spaced apart from the metal reflective layer and surrounding the metal reflective layer; Forming a protective metal layer on the second conductive semiconductor layer on which the metal reflective layer and the insulating layer are formed; Forming a bonding substrate on the protective metal layer and removing the sacrificial substrate to expose the first conductivity type semiconductor layer; Etching the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer until the insulating layer is exposed, wherein the etching layer comprises at least a portion of the second insulating layer. A light emitting device manufacturing method is provided that is in contact with a conductive semiconductor layer and extends outward from the at least some region to have an exposed region formed around the second conductive semiconductor layer.

Preferably, the bonding substrate is a conductive substrate.

Preferably, the bonding substrate is a sapphire substrate.

Preferably, the insulating layer includes at least one of SiO ₂ , SiN, MgO, TaO, TiO ₂ , and polymer.

Preferably, the insulating layer is formed to expose a portion of the protective metal layer, the light emitting device manufacturing method, the step of forming a first electrode on the first conductive semiconductor layer; And forming a second electrode on the protective metal layer exposed through the insulating layer.

Preferably, the protective metal layer in contact with the second electrode may be filled up to an upper surface of the insulating layer.

Preferably, the insulating layer may be formed to extend at least a portion of the lower surface of the second conductivity type semiconductor layer.

Preferably, the insulating layer may extend to cover at least a portion of the metal reflective layer.

According to an embodiment of the present invention, in the manufacture of a light emitting device by forming a metal reflective layer, a protective metal layer, a bonding substrate on the compound semiconductor layer, an insulating layer is formed in a portion where the protective metal layer that can cause metal by-products can be exposed. . Accordingly, by preventing or minimizing the exposure of the protective metal layer when performing the dry etching process, by-products of the protective metal layer, which have been a problem in the conventional dry etching process, are effectively reduced to adhere to the compound semiconductor layers, thereby lowering electrical characteristics. Can be.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided as examples to ensure that the spirit of the present invention can be fully conveyed to those skilled in the art. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms. And, in the drawings, the width, length, thickness, etc. of the components may be exaggerated for convenience. Like numbers refer to like elements throughout.

2 is a cross-sectional view illustrating a light emitting diode according to an embodiment of the present invention.

Referring to FIG. 2, compound semiconductor layers including an N-type semiconductor layer 55, an active layer 57, and a P semiconductor layer 59 are positioned in a portion of the bonding substrate 71. The bonding substrate 71 may be a sapphire substrate, but is not limited thereto and may be another hetero substrate. Meanwhile, the compound semiconductor layers are III-N series compound semiconductor layers. For example, it is a (Al, Ga, In) N semiconductor layer.

A metal reflective layer 61, an insulating layer 62, and a protective metal layer 63 are interposed between the compound semiconductor layers and the bonding substrate 71.

The metal reflective layer 61 is formed of a metal material having a high reflectance such as silver (Ag) or aluminum (Al).

The insulating layer 62 is formed in the boundary region of the second conductive semiconductor layer 59. Here, the boundary region of the second conductive semiconductor layer 59 is formed along the outer circumference of the second conductive semiconductor layer 59 and the second conductive semiconductor layer 59 and the second conductive semiconductor layer 59. An area that includes the outer area of. In one embodiment, the insulating layer 62 extends between the protective metal layers 63 in contact with at least a portion of the lower surface of the second conductive semiconductor layer 59. For example, SiO ₂ , SiN, MgO, TaO, TiO ₂ , or a polymer may be used as the insulating layer 62. The insulating layer 62 may have an open area so that at least a portion thereof may expose the protective metal layer 63. The open region may be formed by patterning the insulating layer 62. The protective metal layer 63 is exposed through the open region of the insulating layer 62, and the P electrode 83b is formed on the exposed protective metal layer 63.

The protective metal layer 63 is formed to cover the second conductive semiconductor layer 59 on which the metal reflective layer 61 and the insulating layer 62 are formed. The protective metal layer 63 may prevent metal elements from diffusing from the adhesive layer 67 into the metal reflective layer 61 to maintain the reflectivity of the metal reflective layer 61. The protective metal layer 63 not only protects the metal reflective layer 61 but also becomes a layer exposed when etching after removal of the sacrificial substrate. The protection metal layer 63 may generate by-products by dry etching. As the protective metal layer 63 is etched only a portion exposed through the open region of the insulating layer 62, by-products generated by the protective metal layer 63 are significantly reduced. Accordingly, the effects of the by-products on the N-type semiconductor layer 55, the active layer 57, and the P semiconductor layer 59 can be significantly reduced.

In the exemplary embodiment, the protective metal layer 63 in contact with the P electrode 83b is filled up to the upper surface of the insulating layer 62, but the present invention is not limited thereto, and the P electrode 83b may be insulated from the insulating layer 62. It may be formed by filling up to the lower surface of the layer 62.

The adhesive layer 67 improves the adhesion between the bonding substrate 71 and the metal reflective layer 61 to prevent the bonding substrate 71 from being separated from the metal reflective layer 61.

Meanwhile, an N electrode 83a is formed on the N-type semiconductor layer 55, and a P electrode 83b is formed on the protective metal layer 63 exposed through at least a portion (open region) of the insulating layer 62. do. Accordingly, light can be emitted by supplying a current through the conductive substrate 71 and the electrode pad 83.

3 to 13 are cross-sectional views illustrating a method of manufacturing a light emitting diode according to an embodiment of the present invention.

Referring to FIG. 3, compound semiconductor layers are formed on the sacrificial substrate 51. The sacrificial substrate 51 may be a sapphire substrate, but is not limited thereto and may be another hetero substrate. The compound semiconductor layers include an N semiconductor layer 55, an active layer 57, and a P-type semiconductor layer 59. The compound semiconductor layers are III-N-based compound semiconductor layers, and may be grown by a process such as metal organic chemical vapor deposition (MOCVD) or molecular beam deposition (MBE).

Meanwhile, before forming the compound semiconductor layers, a buffer layer (not shown) may be formed. The buffer layer is adopted to mitigate lattice mismatch between the sacrificial substrate 51 and the compound semiconductor layers, and may generally be a gallium nitride-based material layer.

Referring to FIG. 4, the metal reflective layer 61 is formed on a portion of the P-type semiconductor layer 59. The metal reflective layer 61 may be formed using, for example, plating or vapor deposition of silver (Ag) or aluminum (Al).

Referring to FIG. 5, an insulating layer 62 is formed on the P-type semiconductor layer 59 on which the metal reflective layer 61 is formed. The thickness of the insulating layer 62 may be higher than the thickness of the metal reflective layer 61. However, the present invention is not limited thereto and can be modified as many as possible. At least a portion of the insulating layer 62 includes open regions 62a and 62b to expose the P-type semiconductor layer 59. FIG. 6 is a plan view of the process illustrated in FIG. 5. Referring to FIG. 6, it can be seen that a portion of the P-type semiconductor layer 59 is exposed through the open regions 62a and 62b of the insulating layer 62. . The open metal layers 62a and 62b of the insulating layer 62 are filled with the protective metal layer 63 through a later process.

Referring to FIG. 7, after the insulating layer 62 is formed, a protective metal layer 63 covering the insulating layer 62 is formed. The protective metal layer 63 may be formed of, for example, Ni, Ti, Ta, Pt, W, Cr, or Pd. The protective metal layer 63 is formed on a portion of the P-type semiconductor layer 59 and the metal reflective layer 61 exposed through the open area of the insulating layer 62.

Referring to FIG. 8, a first bonding metal 67a is formed on the insulating layer 62. For example, AuSn (80/20 wt%) may be formed to a thickness of 15,000 kPa.

Referring to FIG. 9, the bonding substrate 71 on which the second bonding metal 67b is formed is bonded on the first bonding metal 67a.

Referring to FIG. 10, the sacrificial substrate 51 is separated from the compound semiconductor layers. The sacrificial substrate 51 may be separated by laser lift off (LLO) technology or other mechanical or chemical methods. At this time, the buffer layer is also removed to expose the N-type semiconductor layer 55. When the sacrificial substrate 51 is removed and the exposed N-type semiconductor layer 55 faces upward, the sacrificial substrate 51 is in the form shown in FIG. 11.

Referring to FIG. 12, mesa etching is performed on the P-type semiconductor layer 59, the active layer 57, and the N-type semiconductor layer 55. Mesa etching is performed until the insulating layer 62 and the protective metal layer 63 formed under the P-type semiconductor layer 59 are exposed. Accordingly, a portion of the P-type semiconductor layer 59, the active layer 57, and the N-type semiconductor layer 55 are etched to form side surfaces of the P-type semiconductor layer 59, the active layer 57, and the N-type semiconductor layer 55. Is revealed.

FIG. 13 is a plan view of the process of FIG. 12. Referring to FIG. 13, it can be seen that a portion of the protective metal layer 63 is exposed through the open region of the insulating layer 62.

Thereafter, an N-type electrode 83a is formed on the N-type semiconductor layer 55, a P electrode 83b is formed on the protective metal layer 63 exposed through dry etching, and the compound semiconductor layer is separated into a unit cell region. When dry etching is performed, the light emitting device shown in FIG. 2 is completed.

Meanwhile, a portion of the protective metal layer 63 may be etched during the mesa process of FIG. 12 and the dry etching process performed thereafter, and thus a by-product of the protective metal layer 63 may be generated. However, the area of the protective metal layer 63 in which the by-product may be generated by etching may correspond to a part of the entire area of the insulating layer 62 as shown in FIG. 13. Thus, the amount of by-products that can be generated by etching is significantly reduced compared to the conventional art.

The present invention is not limited to the above described embodiments, and various modifications and changes can be made by those skilled in the art, which are included in the spirit and scope of the present invention as defined in the appended claims.

For example, the insulating layer 62 described above may be formed so that the inner side and the outer side are separated by an open area in which the protective metal layer 63 is filled, and the inner side and the outer side are not completely separated, but partially. The protection metal layer 63 may be filled in the open region formed at a location.

14 to 17 show the shape of the insulating layer 62 according to the modified embodiments of the present invention in plan view corresponding to FIG. 13. In FIG. 13, the protective metal layers 63 are exposed on the left and right sides of the exposed N-type semiconductor layer 55, respectively. Referring to FIG. 14, three protective metal layers 63 are exposed on the left and right sides. Referring to FIG. 15, not only the left and right sides but also the upper and lower sides of the protective metal layer 63 are exposed. Referring to FIG. 16, four protective metal layers 63 are exposed, one at each corner of a rectangle, around the exposed N-type semiconductor layer 55. 14 to 16 show a protective metal layer 63 filled in an open region partially formed in the insulating layer, but FIG. 17 shows an insulation formed surrounding the exposed N-type semiconductor layer 55. The inner side and the outer side are separated by the protective metal layer 63 with the layer exposed.

In addition, the light extraction efficiency can be improved by forming the uneven surface on the N-type semiconductor layer 55 having the N-type electrode 83a formed by roughing.

In addition, in the embodiment of the present invention, the insulating layer is formed so as to expose a portion of the protective metal layer has been described that the P electrode formed on the protective metal layer exposed through the insulating layer is formed. However, the present invention is not limited to this, and modifications as shown in FIG. 18 are also possible. Referring to FIG. 18, a compound semiconductor layer including a first conductive semiconductor layer 55, an active layer 57, and a second conductive semiconductor layer 59 is formed. The metal reflective layer 61 is formed in a part of the second conductivity type semiconductor layer 59. In addition, an insulating layer 62 is formed at least in the boundary region of the second conductivity-type semiconductor layer 59. Here, the boundary region of the second conductive semiconductor layer 59 is a region including an outer region of the second conductive semiconductor layer 59 along the outer circumference of the second conductive semiconductor layer 59. Here, although the insulating layer 62 is shown extending on at least a portion of the lower surface of the second conductivity-type semiconductor layer 59, the present invention is not limited thereto.

The protective metal layer 63 is formed to cover the second conductive semiconductor layer 59 on which the metal reflective layer 61 and the insulating layer 62 are formed. The bonding substrate 71 is bonded to the protective metal layer 53 via the adhesive layer 67. An N electrode 83 is formed on the first conductive semiconductor layer 55, and the conductive substrate 71 is used as the P electrode.

In addition, in an embodiment of the present invention, the insulating layer 62 has been described as being spaced apart from the metal reflective layer 61, but the present invention is not limited thereto. That is, in another embodiment of the present invention, the insulating layer 62 may extend to contact the side surface of the metal reflective layer 61. In another embodiment of the present invention, the insulating layer 62 may be extended to cover at least a portion of the metal reflective layer 61. In another embodiment of the present invention, the insulating layer 62 may extend to cover at least a portion of the metal reflective layer 61 while contacting the side surface of the metal reflective layer 61.

1 is a cross-sectional view illustrating a conventional vertical light emitting diode.

2 is a cross-sectional view illustrating a light emitting diode according to an embodiment of the present invention.

3 to 13 are cross-sectional views illustrating a method of manufacturing a light emitting diode according to an embodiment of the present invention.

14 to 17 are cross-sectional views illustrating a method of manufacturing a light emitting diode according to another embodiment of the present invention.

18 is a cross-sectional view illustrating a light emitting diode according to another embodiment of the present invention.

Claims (17)

A compound semiconductor layer including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; A metal reflective layer formed on a portion of the second conductive semiconductor layer; An insulating layer spaced apart from the metal reflective layer and surrounding the metal reflective layer, wherein at least a portion of the insulating layer is in contact with the second conductive semiconductor layer; A protective metal layer formed to cover the second conductive semiconductor layer on which the metal reflective layer and the insulating layer are formed; And A substrate bonded to the protective metal layer, And the insulating layer extends outward from the at least some region formed in contact with the second conductive semiconductor layer and includes an exposed region formed around the second conductive semiconductor layer. The light emitting device of claim 1, wherein the substrate is a conductive substrate. The light emitting device of claim 1, wherein the substrate is a sapphire substrate. The method according to claim 1, The insulating layer is a light emitting device comprising at least one of SiO ₂ , SiN, MgO, TaO, TiO ₂ , a polymer. The method according to claim 1, The insulating layer is formed to expose a portion of the protective metal layer, The light emitting device, A first electrode formed on the first conductive semiconductor layer; And a second electrode formed on the protective metal layer exposed through the insulating layer. The method according to claim 5, The protective metal layer in contact with the second electrode is filled up to the upper surface of the insulating layer. The method according to claim 5, And the second electrode in contact with the protective metal layer is filled to the lower surface of the insulating layer. The method according to claim 1, And the insulating layer extends on at least a portion of a lower surface of the second conductive semiconductor layer. The method according to claim 1, And the insulating layer extends to cover at least a portion of the metal reflective layer. Forming a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer on the sacrificial substrate, and forming a metal reflective layer on an upper portion of the second conductivity type semiconductor layer; Forming an insulating layer on the second conductive semiconductor spaced apart from the metal reflective layer and surrounding the metal reflective layer; Forming a protective metal layer on the second conductive semiconductor layer on which the metal reflective layer and the insulating layer are formed; Forming a bonding substrate on the protective metal layer and removing the sacrificial substrate to expose the first conductivity type semiconductor layer; Etching the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer until the insulating layer is exposed, By the etching step, The insulating layer has a light emitting device in which at least a portion of the insulating layer is in contact with the second conductivity type semiconductor layer and extends outward from the at least some region to have an exposed area formed around the second conductivity type semiconductor layer. Manufacturing method. The method of claim 10, wherein the bonding substrate is a conductive substrate. The method of claim 10, wherein the bonding substrate is a sapphire substrate. The method according to claim 10, The insulating layer is SiO ₂ , SiN, MgO, TaO, TiO ₂ , a light emitting device manufacturing method comprising a polymer. The method according to claim 10, The insulating layer is formed to expose a portion of the protective metal layer, The light emitting device manufacturing method, Forming a first electrode on the first conductivity type semiconductor layer; And And forming a second electrode on the protective metal layer exposed through the insulating layer. The method according to claim 14, And the protective metal layer in contact with the second electrode is filled up to an upper surface of the insulating layer. The method according to claim 10, And the insulating layer extends on at least a portion of a lower surface of the second conductive semiconductor layer. The method according to claim 10, And the insulating layer extends to cover at least a portion of the metal reflective layer.

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