CN116344708B - Manufacturing method of Micro-LED device based on self-alignment process - Google Patents
Manufacturing method of Micro-LED device based on self-alignment process Download PDFInfo
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- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
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Abstract
The invention discloses a manufacturing method of a Micro-LED device based on a self-alignment process, which comprises the following steps: step one, preparing a row electrode layer and an insulating protective layer based on a smooth panel, and forming a Hole layer on the insulating protective layer to finish the preparation of the display backboard; preparing a Micro-LED crystal grain structure on a display backboard based on a self-alignment process to form a Micro-LED sample wafer; sequentially carrying out AL layer alkali corrosion, passivation insulating layer evaporation and cap layer acid shedding operation on the Micro-LED sample wafer; and fourthly, carrying out surface opening on the sample wafer with the cap layer removed until the column electrode layer is exposed, then preparing a current expansion layer on the surface of the sample wafer, and finally sputtering a metal reflecting layer on the side wall of the Micro-LED crystal grain structure and between the structures to finish the manufacturing of the Micro-LED device. The invention effectively improves the luminous intensity of the upper surface of the Micro-LED device.
Description
Technical Field
The invention relates to the technical field of Micro light emitting diodes, in particular to a manufacturing method of a Micro-LED device based on a self-alignment process.
Background
Micro-displays based on Micro-light emitting diode (Micro-LEDs) arrays have a very high application prospect, and compared with traditional Liquid Crystal Displays (LCDs) and Organic Light Emitting Displays (OLEDs), the Micro-displays have the advantages of high efficiency, low power consumption, ultra-high resolution, ultra-fast response speed, wide visual angle and the like, and are considered as a 'next generation display technology'.
However, many problems of Micro-LED development need to be solved, such as mask intolerance during ICP deep etching and Micro-LED pattern shrink, sidewall damage caused by dry etching, and opening of protective layer before electrode preparation. Nowadays, the main means for preparing gallium nitride-based Micro-LEDs is a dry etching technology represented by ICP etching, however, ICP also etches photoresist when etching GaN, causing the photoresist to shrink in size, which in turn causes the Micro-LEDs to shrink in size, reducing the effective light emitting area. The plasma generated in the ICP dry etching process inevitably introduces side wall etching damage at the edge of the device, and side wall dangling bonds are generated at the same time, and the damage is easy to introduce deep level defects to generate non-radiative recombination centers, so that the optical performance of the small-size device is reduced. The problems of mask precision and photoetching precision are limited, the size of the opening of the protective layer before the electrode is prepared by the Micro-LED with small size is limited, and the opening of the protective layer on the surface of the Micro-LED with small size becomes particularly difficult. In addition, the mass transfer technology for small-sized Micro-LEDs has low efficiency and high cost, and has many technical bottlenecks to be overcome.
Disclosure of Invention
In order to solve the technical problems in the prior art, the invention provides a manufacturing method of a Micro-LED device based on a self-alignment process, which comprises the following specific technical scheme:
a manufacturing method of a Micro-LED device based on a self-alignment process comprises the following steps:
step one, preparing a row electrode layer and an insulating protective layer based on a smooth panel, and forming a Hole layer on the insulating protective layer to finish the preparation of the display backboard;
preparing a Micro-LED crystal grain structure on a display backboard based on a self-alignment process to form a Micro-LED sample wafer;
sequentially carrying out Al layer alkali corrosion, passivation insulating layer evaporation and cap layer acid falling operation on the Micro-LED sample wafer;
and fourthly, carrying out surface opening on the Micro-LED sample wafer after the cap layer is removed until the row electrode layer is exposed, then preparing a current expansion layer on the surface of the sample wafer, and finally sputtering a metal reflecting layer on the side wall of the Micro-LED grain structure and between the structures to finish the manufacture of the Micro-LED device.
Further, the first step specifically includes the following substeps:
step S1, preparing a column electrode layer on the surface of a smooth panel through a photoetching process, a magnetron sputtering process and a Lift-Off process;
step S2, evaporating an insulating protective layer on the surface of the column electrode layer prepared in the step S1 through chemical vapor deposition;
step S3, after the insulating protective layer is evaporated in the step S2, preparing a row electrode layer through a photoetching process, a magnetron sputtering process and a Lift-Off process;
step S4, evaporating an insulating protective layer 2 on the surface of the row electrode layer prepared in the step S3 through chemical vapor deposition;
and S5, after the insulating protective layer is evaporated in the step S4, opening a Hole layer on the insulating protective layer at the position right above the row metal wire in the row electrode layer through a photoetching process and an etching process, wherein the Hole is slightly larger than the width of the row electrode, and the bottom of the Hole completely exposes the row electrode, so that the back plate is completely prepared.
Further, the second step specifically includes the following substeps:
s6, processing an LED epitaxial wafer, wherein the structure of the LED epitaxial wafer comprises a P-type layer, a quantum well layer, an N-type layer, an undoped layer and a substrate layer;
the treatment is specifically as follows: removing the substrate layer of the LED epitaxial wafer through rough grinding, fine grinding, hard polishing and soft polishing processes, and then removing the undoped layer and part of the N-type layer through a dry etching process;
step S7, bonding the display backboard and the LED epitaxial wafer processed in the step S6 through an evaporation process, wherein bonding metal layers are evaporated on two sides of the LED epitaxial wafer, and a P-type layer of the LED epitaxial wafer is connected with a row electrode layer of the display backboard;
step S8, preparing a double-layer metal layer on the surface of the N-type layer based on a self-alignment process through a photoetching process, a magnetron sputtering process and a Lift-Off process to serve as a hard mask, wherein the double-layer metal layer is a metal Al layer and a metal Cr layer;
and S9, etching the LED epitaxial wafer area without hard mask protection through a dry etching process, and further etching away the bonding metal layer without hard mask protection to prepare a Micro-LED grain structure, so that a Micro-LED sample wafer is formed on the basis of the display backboard.
Further, the thickness of the LED epitaxial wafer after being processed is 1um to 2um.
Further, the third step specifically includes the following substeps:
step S10, corroding the metal Al layer by an alkaline corrosive liquid through the Micro-LED crystal grain structure to obtain a shrinking structure of the metal Al layer;
step S11, a passivation insulating layer is evaporated on the surface of the Micro-LED sample, wherein the side wall at the metal Al layer is not covered by the passivation insulating layer, so that a cap layer is formed by the metal Al layer, the metal Cr layer and the passivation insulating layer on the metal Cr layer together;
and S12, placing the Micro-LED sample wafer subjected to evaporation of the passivation insulating layer in the step S11 in an acidic solution, and performing ultrasonic cleaning until the cap layer is completely removed, so that the N-type layer is exposed.
Further, the substep S10 specifically includes: and corroding the Micro-LED crystal grain structure through a KOH solution with the concentration of 1 mol/L, corroding part of the metal Al layer by the KOH solution, retracting the side wall of the metal Al layer to the depth of the retraction which is the thickness of the metal Al layer, and thus obtaining the retraction structure of the metal Al layer.
Further, the thickness of the evaporated passivation insulating layer in the substep S11 is less than half the thickness of the metallic Al layer.
Further, the acidic solution is an HCl solution with the concentration of 20% -40%.
Further, the step four specifically includes the following substeps:
step S13, perforating the Micro-LED sample wafer with the cap layer removed on the surface of the position right above the column metal wire of the column electrode layer through a photoetching process and an etching process;
step S14, preparing a current expansion layer on the surface of the sample wafer after the hole is formed in the step S13 through an evaporation process and an annealing process, wherein the N-type layer of the Micro-LED grain structure is connected with the column electrode layer exposed through the hole through the current expansion layer;
and S15, in the step S14, the side wall of the Micro-LED grain structure and the groove between the Micro-LED grain structures after the current expansion layer is evaporated, a metal reflecting layer is sputtered by magnetron sputtering to cover the side wall of the Micro-LED grain structure and the groove between the Micro-LED grain structures, so that the manufacturing of the Micro-LED device is completed.
Further, the metal reflecting layer is made of a metal electrode material.
The beneficial effects are that: according to the manufacturing method of the Micro-LED device, al and Cr are used as hard masks, so that the shrinkage problem of the Micro-LED pattern in the dry etching process is effectively solved, the side wall damage problem introduced in the dry etching process is effectively removed by using a KOH solution and an HCl solution, the light efficiency of the Micro-LED device can be effectively improved, and the problem of surface hole opening of the Micro-LED is effectively solved by the whole self-alignment process flow; in addition, the metal light-emitting layer is used for effectively improving the conductivity of the current expansion layer, isolation is formed between the Micro-LED crystal grains, the problem of crosstalk of light rays between the Micro-LED crystal grains is effectively avoided, meanwhile, light rays emitted from the side face of the Micro-LED crystal grains are reflected back into the Micro-LED crystal grains and are emitted from the upper surface of the Micro-LED crystal grains, and the light-emitting intensity of the upper surface of the Micro-LED device is improved.
Drawings
FIG. 1 is a schematic flow chart of a method for manufacturing a Micro-LED device based on a self-alignment process;
FIG. 2 is a schematic top view of a smooth panel employed in an embodiment of the present invention;
FIG. 3 is a schematic top plan view of the distribution of column electrode layers prepared on a smooth panel according to an embodiment of the present invention;
FIG. 4 is a schematic top plan view of the distribution of row electrode layers prepared on a smooth panel according to an embodiment of the present invention;
FIG. 5 is a schematic top view of a Hole layer formed on the upper surface of a row electrode layer according to an embodiment of the present invention;
FIG. 6 is a schematic partial side cross-sectional view of FIG. 5;
fig. 7 is a schematic cross-sectional structure of an LED epitaxial wafer according to an embodiment of the present invention;
fig. 8 is a schematic cross-sectional structure of an LED epitaxial wafer according to an embodiment of the present invention after processing in step S6;
fig. 9 is a schematic cross-sectional structure of a bonding display back plate and an LED epitaxial wafer according to an embodiment of the present invention;
FIG. 10 is a schematic cross-sectional view of an embodiment of the present invention after preparing a dual metal layer on the surface of an N-type layer after bonding;
FIG. 11 is a schematic cross-sectional view of a Micro-LED coupon according to an embodiment of the present invention;
FIG. 12 is a schematic view showing a cross-sectional structure of a metal Al layer of a Micro-LED coupon according to an embodiment of the present invention, which is shrunk after etching operation;
FIG. 13 is a schematic cross-sectional view of a Micro-LED sample wafer according to an embodiment of the present invention after shrinking in a metal Al layer and vapor-depositing a passivation insulating layer;
FIG. 14 is a schematic cross-sectional view of a Micro-LED coupon after acid stripping;
FIG. 15 is a schematic cross-sectional view of an embodiment of the invention after opening holes at a position just above the column metal lines of the column electrode layer;
FIG. 16 is a schematic cross-sectional view of a sample wafer after the hole is opened in step S13 after a current spreading layer is formed thereon according to an embodiment of the present invention;
FIG. 17 is a schematic cross-sectional view of a sputtered metal reflector layer according to an embodiment of the present invention;
in the figure, 1-smooth panel, 2-insulating protective layer, 3-column electrode layer, 4-row electrode layer, 5-P type layer, 6-quantum well layer, 7-N type layer, 8-undoped layer, 9-substrate layer, 10-bond metal layer, 11-metal Al layer, 12-metal Cr layer, 13-current spreading layer, 14-metal light reflecting layer, 15-passivation insulating layer, 16-Hole layer.
Detailed Description
In order to make the objects, technical solutions and technical effects of the present invention more apparent, the present invention will be further described in detail with reference to the drawings and examples of the specification.
As shown in fig. 1, the method for manufacturing the Micro-LED device based on the self-alignment process of the present invention comprises the following steps:
step one, preparing a row electrode layer and an insulating protective layer 2 based on a smooth panel 1, and forming a Hole layer 16 on the insulating protective layer 2 to finish the preparation of the display backboard, wherein the preparation method comprises the following substeps:
step S1, as shown in FIG. 2, preparing a column electrode layer 3 on the surface of a smooth panel 1 through a photoetching process, a magnetron sputtering process and a Lift-Off process, wherein the electrode interval is slightly larger than the electrode width, and the distribution of the column electrodes is shown in FIG. 3;
wherein the Lift-Off process is a common stripping mode in the semiconductor industry for preparing metal electrodes;
step S2, evaporating an insulating protection layer 2 on the surface of the column electrode layer 3 prepared in the step S1 through chemical vapor deposition;
step S3, after the insulating protective layer is evaporated in step S2, preparing a row electrode layer 4 through a photoetching process, a magnetron sputtering process and a Lift-Off process, wherein the electrode interval is slightly larger than the electrode width, and the specific distribution of the row electrode is shown in figure 4;
step S4, evaporating an insulating protection layer 2 on the surface of the row electrode layer 4 prepared in the step S3 through chemical vapor deposition;
step S5, as shown in FIG. 5 and FIG. 6, after the evaporation of the insulating protection layer 2 in step S4, a Hole layer 16 is formed on the insulating protection layer 2 at a position right above the row metal wire of the row electrode layer 4 by a photolithography process and an etching process, the Hole is slightly larger than the width of the row electrode, and the bottom of the Hole completely exposes the row electrode, so that the back plate is completely prepared.
Preparing a Micro-LED crystal grain structure on a display backboard based on a self-alignment process to form a Micro-LED sample wafer, wherein the method specifically comprises the following substeps:
s6, processing the LED epitaxial wafer, wherein the thickness of the processed LED epitaxial wafer is about 1um to 2um; the LED epitaxial wafer is a substrate heated to a proper temperature, and the structure comprises a P-type layer 5, a quantum well layer 6, an N-type layer 7, an undoped layer 8 and a substrate layer 9, as shown in fig. 7;
the treatment is specifically as follows: removing the substrate layer 9 of the LED epitaxial wafer through rough grinding, fine grinding, hard polishing and soft polishing processes, and then removing the undoped layer 8 and part of the N-type layer 7 through a dry etching process, as shown in FIG. 8;
step S7, bonding the display backboard prepared in the step S5 and the LED epitaxial wafer processed in the step S6 through an evaporation process, wherein the two sides of the LED epitaxial wafer are subjected to evaporation bonding metal layers 10, namely the display backboard is bonded with the LED epitaxial wafer through the bonding process, and the P-type layer 5 of the LED epitaxial wafer is connected with the row electrode layer 4 of the display backboard, as shown in FIG. 9;
step S8, based on a self-alignment process, preparing a double-layer metal layer as a hard mask on the surface of the N-type layer 7 bonded in the step S7 through a photoetching process, a magnetron sputtering process and a Lift-Off process, as shown in FIG. 10;
in the prior art, photoresist is used as a mask material, and the photoresist is etched at the same time when the LED is etched by a dry method, so that the photoresist is contracted inwards to cause the Micro-LED pattern to be contracted inwards;
therefore, hard mask metal materials which are difficult to etch are selected, and the required Micro-LED patterns can be completely etched, wherein the double-layer metal layers in the invention are a metal Al layer 11 and a metal Cr layer 12, and the double-layer metal layers are used as a hard mask for the self-alignment process based on the invention, the metal Al can react with acid and alkali, and the metal Cr can only react with strong acid, so that the subsequent cap layer can be removed conveniently;
in step S9, after the metal hard mask is prepared in step S8, the LED epitaxial wafer area without hard mask protection is etched through a dry etching process (this step only involves the P-type layer 5, the quantum well layer 6, and the N-type layer 7 in the LED epitaxial wafer), and the bonding metal layer 10 not protected by the hard mask is further etched away, so as to form a Micro-LED die structure, and then a Micro-LED sample wafer is formed based on the display back plate as a whole, as shown in fig. 11.
The isolation grooves between Micro-LED grain structures are in a two-dimensional grid shape, and the isolation grooves penetrate through the whole LED layer.
The dry etching process is to manufacture the Micro-LED crystal grain structure through inductive coupling and ion etching process, and plasma generated in the dry etching process inevitably introduces side wall etching damage at the edge of the device, so that the optical performance of the small-size device is greatly reduced, and an effective measure is needed to treat the side wall damage layer after the dry etching.
Step three, sequentially carrying out Al layer alkali corrosion, passivation insulating layer evaporation and cap layer acid shedding operation on the Micro-LED sample wafer, wherein the method specifically comprises the following substeps:
step S10, corroding the metal Al layer 11 by alkaline corrosive liquid through the Micro-LED crystal grain structure prepared in the step S9 to obtain a retracted structure of the metal Al layer 11, as shown in FIG. 12;
the alkaline etching solution is 1 mol/L KOH solution, the etching time is several minutes, the KOH solution etches part of the metal Al layer 11, the side wall of the metal Al layer 11 is retracted, the retraction depth is the thickness of the metal Al layer 11, and the KOH solution does not corrode the Cr layer; meanwhile, the KOH solution is adopted to corrode the side wall damage layer of the Micro-LED grain structure to a certain extent, so that the side wall damage problem caused by dry etching in the previous step S9 can be effectively repaired;
step S11, evaporating a passivation insulating layer 15 on the surface of the Micro-LED sample wafer including the surface of the Micro-LED grain structure after S10 alkaline solution corrosion, wherein the side wall at the metal Al layer 11 is not covered by the passivation insulating layer 15, so that a cap layer is jointly formed by the metal Al layer 11, the metal Cr layer 12 and the passivation insulating layer 15 on the metal Cr layer 12, as shown in FIG. 13; the thickness of the evaporated passivation insulating layer 15 is smaller than half of the thickness of the metal Al layer 11, so that the passivation insulating layer 15 can cover the metal Al layer 11 side in a small amount or can not cover the metal Al layer 11 side completely, and therefore the situation that the cap layer and the underlying grain structure are disconnected through the passivation insulating layer 15 after evaporation is ensured, a good fault is formed, and subsequent removal is facilitated;
step S12, after the passivation insulating layer 15 is evaporated in step S11, ultrasonic cleaning is performed in an acid solution until the cap layer is completely removed, as shown in FIG. 14, so that the N-type layer 7 is exposed; the passivation insulating layer 15 perfectly coats the side face of the Micro-LED grain structure, and a window for subsequent electrode contact is completely reserved on the upper surface (exposed N-type layer 7) of the Micro-LED grain structure;
the acidic solution subjected to ultrasonic cleaning adopts an HCl solution with the concentration of 20% -40%, so that the Al and Cr metal layers can be corroded simultaneously, bubbles are generated, and the cap layer can be effectively removed; and after the HCl solution is corroded to the metal Al layer 11 and the metal Cr layer 12, the etching damage layer introduced during S6 dry etching of the N-type layer on the upper surface of the Micro-LED crystal grain structure is well removed, and the light efficiency of the Micro-LED can be effectively improved.
The S8-S12 is a self-aligned process flow, the shrinkage problem of the Micro-LED pattern in the dry etching process is effectively solved by using Al and Cr as hard masks, the side wall damage problem introduced in the dry etching process is effectively removed by using KOH solution and HCl solution, and the whole self-aligned process flow effectively solves the problem of surface hole opening of the Micro-LED.
Step four, carrying out surface opening on the Micro-LED sample wafer with the cap layer falling until the row electrode layer 3 is exposed, then preparing the current expansion layer 13 on the surface of the sample wafer, and finally sputtering a metal reflecting layer on the side wall of the Micro-LED grain structure and between the structures to finish the manufacture of the Micro-LED device, wherein the method specifically comprises the following substeps:
step S13, perforating the Micro-LED sample wafer after the self-alignment process of step S12 is completed on the surface of the position right above the column metal wire through a photoetching process and an etching process, and removing the redundant insulating protection layer 2 and the passivation insulating layer 15, as shown in FIG. 15;
step S14, preparing a low-resistance high-transmittance current expansion layer 13 on the surface of the sample wafer after the hole is formed in the step S13 through an evaporation process and an annealing process, wherein the N-type layer 7 of the Micro-LED grain structure is connected with the column electrode layer 3 exposed through the hole through the current expansion layer 13, as shown in FIG. 16;
in step S15, in the recess between the side wall of the Micro-LED grain structure and the Micro-LED grain structure after the current expansion layer is evaporated in step S14, a metal reflective layer 14 is sputtered by magnetron sputtering to cover the recess between the side wall of the Micro-LED grain structure and the Micro-LED grain structure, as shown in fig. 17.
The metal reflecting layer 14 is made of metal electrode material, so that the conductivity of the current expansion layer can be effectively improved, isolation can be formed between Micro-LED grain structures, the problem of light crosstalk between the Micro-LED grain structures is prevented, meanwhile, light emitted from the side face of the Micro-LED grain structures is reflected back into the Micro-LED grain structures and emitted from the upper surfaces of the Micro-LED grain structures, and the luminous intensity of the upper surfaces of Micro-LED devices is improved.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the foregoing detailed description of the invention has been provided, it will be apparent to those skilled in the art that modifications may be made to the embodiments described in the foregoing examples, and that certain features may be substituted for those illustrated and described herein. Modifications, equivalents, and alternatives falling within the spirit and principles of the invention are intended to be included within the scope of the invention.
Claims (6)
1. The manufacturing method of the Micro-LED device based on the self-alignment process is characterized by comprising the following steps of:
step one, preparing a row electrode layer and an insulating protective layer (2) based on a smooth panel (1), and forming a Hole layer (16) on the insulating protective layer (2) to finish the preparation of the display backboard;
preparing a Micro-LED crystal grain structure on a display backboard based on a self-alignment process to form a Micro-LED sample wafer;
sequentially carrying out Al layer alkali corrosion, passivation insulating layer evaporation and cap layer acid falling operation on the Micro-LED sample wafer;
step four, carrying out surface opening on the Micro-LED sample wafer with the cap layer removed until the row electrode layer (3) is exposed, then preparing a current expansion layer (13) on the surface of the sample wafer, and finally sputtering a metal reflecting layer on the side wall of the Micro-LED grain structure and between the structures to finish the manufacturing of the Micro-LED device;
the first step specifically comprises the following substeps:
step S1, preparing a column electrode layer (3) on the surface of a smooth panel (1) through a photoetching process, a magnetron sputtering process and a Lift-Off process;
step S2, evaporating an insulating protective layer (2) on the surface of the column electrode layer (3) prepared in the step S1 through chemical vapor deposition;
step S3, after the insulating protective layer is evaporated in the step S2, preparing a row electrode layer (4) through a photoetching process, a magnetron sputtering process and a Lift-Off process;
step S4, evaporating an insulating protective layer (2) on the surface of the row electrode layer (4) prepared in the step S3 through chemical vapor deposition;
step S5, after the insulating protective layer (2) is evaporated in the step S4, a Hole layer (16) is formed on the insulating protective layer (2) at the position right above the row metal wire in the row electrode layer (4) through a photoetching process and an etching process, the Hole is slightly larger than the width of the row electrode, and the bottom of the Hole completely exposes the row electrode, so that the back plate is completely prepared;
the second step specifically comprises the following substeps:
s6, processing an LED epitaxial wafer, wherein the structure of the LED epitaxial wafer comprises a P-type layer (5), a quantum well layer (6), an N-type layer (7), an undoped layer (8) and a substrate layer (9);
the treatment is specifically as follows: removing a substrate layer (9) of the LED epitaxial wafer through rough grinding, fine grinding, hard polishing and soft polishing processes, and then removing an undoped layer (8) and a part of an N-type layer (7) through a dry etching process;
step S7, bonding the display backboard and the LED epitaxial wafer processed in the step S6 through an evaporation process, wherein the two sides of the LED epitaxial wafer are subjected to evaporation bonding, and a P-type layer (5) of the LED epitaxial wafer is connected with a row electrode layer (4) of the display backboard;
step S8, preparing a double-layer metal layer on the surface of the N-type layer (7) based on a self-alignment process through a photoetching process, a magnetron sputtering process and a Lift-Off process, wherein the double-layer metal layer is a metal Al layer (11) and a metal Cr layer (12);
step S9, etching the LED epitaxial wafer area without hard mask protection through a dry etching process, and further etching away a bonding metal layer (10) which is not protected by the hard mask to prepare a Micro-LED grain structure, so that a Micro-LED sample wafer is integrally formed based on the display backboard;
the third step specifically comprises the following substeps:
step S10, corroding the metal Al layer (11) by an alkaline corrosive liquid through the Micro-LED grain structure to obtain a shrinking structure of the metal Al layer (11);
step S11, a passivation insulating layer (15) is evaporated on the surface of the Micro-LED sample, wherein the side wall at the metal Al layer (11) is not covered by the passivation insulating layer (15), so that a cap layer is formed by the metal Al layer (11), the metal Cr layer (12) and the passivation insulating layer (15) on the metal Cr layer (12) together;
step S12, placing the Micro-LED sample wafer subjected to evaporation of the passivation insulating layer (15) in the step S11 into an acid solution, and performing ultrasonic cleaning until the cap layer is completely removed, so that the N-type layer (7) is exposed;
the substep S10 specifically includes: and corroding the Micro-LED crystal grain structure through a KOH solution with the concentration of 1 mol/L, and corroding part of the metal Al layer (11) by the KOH solution to retract the side wall of the metal Al layer (11) to the depth of the thickness of the metal Al layer (11), so as to obtain the retracted structure of the metal Al layer (11).
2. The method for manufacturing the Micro-LED device based on the self-alignment process according to claim 1, wherein the thickness of the LED epitaxial wafer after being processed is 1um to 2um.
3. The method for fabricating a Micro-LED device based on a self-aligned process according to claim 1, wherein the thickness of the evaporated passivation insulating layer (15) in the substep S11 is less than half the thickness of the metallic Al layer (11).
4. The method for manufacturing the Micro-LED device based on the self-alignment process according to claim 1, wherein the acidic solution is 20% -40% HCl solution.
5. The method for manufacturing a Micro-LED device based on a self-aligned process according to claim 1, wherein the fourth step comprises the following steps:
step S13, perforating the Micro-LED sample wafer with the cap layer removed on the surface right above the column metal wire of the column electrode layer (3) through a photoetching process and an etching process;
step S14, preparing a current expansion layer (13) on the surface of the sample wafer after the hole is formed in the step S13 through an evaporation process and an annealing process, wherein the N-type layer (7) of the Micro-LED grain structure is connected with the column electrode layer (3) exposed through the hole through the current expansion layer (13);
and S15, in the step S14, the side wall of the Micro-LED grain structure and the groove between the Micro-LED grain structures after the current expansion layer (13) is evaporated, a metal reflecting layer (14) is sputtered by magnetron to cover the side wall of the Micro-LED grain structure and the groove between the Micro-LED grain structures, so that the manufacturing of the Micro-LED device is completed.
6. The method for fabricating a Micro-LED device based on a self-aligned process according to claim 5, wherein said metal reflective layer (14) is a metal electrode material.
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Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006022532A1 (en) * | 2004-08-26 | 2006-03-02 | Epivalley Co., Ltd. | Iii-nitride semiconductor light emitting device |
| CN101681828A (en) * | 2008-07-22 | 2010-03-24 | 住友电气工业株式会社 | Method for manufacturing semiconductor element |
| WO2010111854A1 (en) * | 2009-03-31 | 2010-10-07 | 西安电子科技大学 | Uv led and method for fabricating the same |
| CN103400849A (en) * | 2013-08-14 | 2013-11-20 | 中国科学院长春光学精密机械与物理研究所 | Minitype LED array device for displaying and lighting and preparation method |
| US8778780B1 (en) * | 2005-10-13 | 2014-07-15 | SemiLEDs Optoelectronics Co., Ltd. | Method for defining semiconductor devices |
| CN108831979A (en) * | 2018-08-23 | 2018-11-16 | 中山市华南理工大学现代产业技术研究院 | 2 D photon crystal LED upside-down mounting array chip of efficient broadband and preparation method thereof |
| CN110993762A (en) * | 2019-12-23 | 2020-04-10 | 南京大学 | Micro-LED array device based on III-group nitride semiconductor and preparation method thereof |
| WO2021221437A1 (en) * | 2020-04-27 | 2021-11-04 | 국민대학교 산학협력단 | Micro-nanopin led element and method for producing same |
| CN114005849A (en) * | 2021-10-28 | 2022-02-01 | 厦门士兰明镓化合物半导体有限公司 | Preparation method of micro light-emitting diode |
| WO2023036158A1 (en) * | 2021-09-08 | 2023-03-16 | 深圳市思坦科技有限公司 | Method for preparing micro-led chip, and micro-led chip, display apparatus and light-emitting apparatus |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7592634B2 (en) * | 2004-05-06 | 2009-09-22 | Cree, Inc. | LED fabrication via ion implant isolation |
| TWI239668B (en) * | 2004-10-21 | 2005-09-11 | Formosa Epitaxy Inc | Structure of gallium-nitride based (GaN-based) light-emitting diode with high luminance |
-
2023
- 2023-05-22 CN CN202310576969.2A patent/CN116344708B/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006022532A1 (en) * | 2004-08-26 | 2006-03-02 | Epivalley Co., Ltd. | Iii-nitride semiconductor light emitting device |
| US8778780B1 (en) * | 2005-10-13 | 2014-07-15 | SemiLEDs Optoelectronics Co., Ltd. | Method for defining semiconductor devices |
| CN101681828A (en) * | 2008-07-22 | 2010-03-24 | 住友电气工业株式会社 | Method for manufacturing semiconductor element |
| WO2010111854A1 (en) * | 2009-03-31 | 2010-10-07 | 西安电子科技大学 | Uv led and method for fabricating the same |
| CN103400849A (en) * | 2013-08-14 | 2013-11-20 | 中国科学院长春光学精密机械与物理研究所 | Minitype LED array device for displaying and lighting and preparation method |
| CN108831979A (en) * | 2018-08-23 | 2018-11-16 | 中山市华南理工大学现代产业技术研究院 | 2 D photon crystal LED upside-down mounting array chip of efficient broadband and preparation method thereof |
| CN110993762A (en) * | 2019-12-23 | 2020-04-10 | 南京大学 | Micro-LED array device based on III-group nitride semiconductor and preparation method thereof |
| WO2021221437A1 (en) * | 2020-04-27 | 2021-11-04 | 국민대학교 산학협력단 | Micro-nanopin led element and method for producing same |
| WO2023036158A1 (en) * | 2021-09-08 | 2023-03-16 | 深圳市思坦科技有限公司 | Method for preparing micro-led chip, and micro-led chip, display apparatus and light-emitting apparatus |
| CN114005849A (en) * | 2021-10-28 | 2022-02-01 | 厦门士兰明镓化合物半导体有限公司 | Preparation method of micro light-emitting diode |
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