CN112885936B - Micro-LED array with transparent electrode structure and preparation method - Google Patents
Micro-LED array with transparent electrode structure and preparation method Download PDFInfo
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- CN112885936B CN112885936B CN202011385368.6A CN202011385368A CN112885936B CN 112885936 B CN112885936 B CN 112885936B CN 202011385368 A CN202011385368 A CN 202011385368A CN 112885936 B CN112885936 B CN 112885936B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/385—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending at least partially onto a side surface of the semiconductor body
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/42—Transparent materials
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
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- H—ELECTRICITY
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- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
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- H01L2933/0016—Processes relating to electrodes
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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Abstract
The invention discloses a Micro-LED array with a transparent electrode structure and a preparation method thereof. The light emitting pixel unit includes: n-type GaN, a quantum well active region, P-type GaN, an insulating layer, a transparent electrode, an N-type metal electrode and a P-type metal electrode. According to the invention, ITO is used as a transparent electrode, the transparent electrode is completely covered on the P-type GaN, the P-type metal electrode is prepared on the ITO on the N-type GaN, forward current flows to the ITO through the P-type metal electrode and then is introduced into the light-emitting layer, and the influence on the light-emitting efficiency due to the large area occupation of the P-type metal electrode of the Micro-LED is avoided. Because the refractive index of the ITO is between air and the epitaxial material, the light-emitting angle can be improved, the light escape is facilitated, the luminous flux of the Micro-LED array is increased, and the Micro-LED array can show higher brightness under the same current.
Description
Technical Field
The invention relates to the technical field of photoelectron, in particular to a Micro-LED array with a transparent electrode structure and a preparation method thereof.
Background
As a light emitting device, an led (light emitting diode) plays an important role in life. In the field of illumination, incandescent lamps have been replaced, and a great deal of energy is saved. In the display field, such as Liquid Crystal Displays (LCDs) and Organic Light Emitting Diodes (OLEDs), Micro light emitting diode (Micro-LED) display technologies, etc., a high quality display panel is provided for people, especially the Micro-LED display technology that has been rapidly developed in recent years, and as a unique display, the Micro light emitting diode display technology is applied to the fields of smart glasses, head-mounted displays (HMDs), heads-up displays (HUDs), etc., and is receiving wide attention in the industry. Compared with the traditional LCD and OLED, the Micro LED has the advantages of low power consumption, high brightness, short response time, long service life and the like.
The common LED has a large light-emitting area, and the area of the P-type metal electrode is smaller than that of the whole light-emitting area. And therefore has little effect on light extraction. However, the Micro-LED is tiny in size, and the area of the P-type metal electrode accounts for a large proportion, so that the area of the P-type metal electrode has a great influence on the light emitting of the Micro-LED. ITO (indium Tin oxide), which is an indium Tin oxide, has good transparency, conductivity, low resistivity and chemical stability, and can cut off electron radiation, ultraviolet rays and far infrared rays, which are harmful to the human body, among many materials that can be used as transparent electrodes, ITO is one of the most widely used.
Therefore, the invention covers a layer of transparent electrode ITO on the P-type GaN, and prepares the P-type metal electrode on the ITO on the N-type GaN, thereby improving the luminous efficiency and the brightness.
Disclosure of Invention
The invention aims to provide a Micro-LED array with a transparent electrode structure and a preparation method thereof, which are used for improving the luminous efficiency and the brightness of a device.
The Micro-LED array with the transparent electrode structure comprises a light emitting array 1 and a substrate 2, wherein the light emitting array 1 comprises a plurality of light emitting diode units 11, and pixel unit deep isolation grooves 10. The light-emitting pixel unit 11 comprises an N-type GaN 3, an N-type metal electrode 9, a quantum well active region 4, a P-type GaN 5, a P-type metal electrode 8, a transparent electrode ITO 6, an insulating layer a 7 and an insulating layer b 13.
The size of the pixel unit deep isolation groove is between 5 and 10 mu m, and the size of the light-emitting pixel unit is between 10 and 100 mu m.
The invention provides a Micro-LED array with a transparent electrode structure and a preparation method thereof, wherein the preparation method comprises the following steps:
s1, sequentially growing N-type GaN, a quantum well active region and P-type GaN on a substrate to obtain an epitaxial material;
s2, using photoresist as a mask on the epitaxial material to protect the region which does not need to be etched, and etching the epitaxial material to the N-type GaN by a dry method to form a step;
s3, photoresist or SiO is used2As a mask, etching the epitaxial material to the substrate by a dry method to form a pixel unit deep isolation groove;
s4, preparing an insulating layer on the epitaxial material, then spin-coating photoresist, exposing and developing to remove the photoresist in the area needing to be corroded, and corroding the unnecessary insulating layer through wet etching to leave an insulating layer b;
s5, sputtering the transparent electrode ITO, then spin-coating photoresist, exposing and developing to remove the photoresist in the area needing to be corroded, and corroding the unnecessary transparent electrode through a wet method;
s6, spin-coating photoresist, removing the photoresist in the area where the electrode needs to be prepared through exposure and development, then preparing N-type metal electrodes, and interconnecting the N-type metal electrodes of each light-emitting pixel unit;
and S7, preparing an insulating layer, coating photoresist in a spinning mode, removing the photoresist in a region needing to be corroded by exposure and development, leaving an insulating layer a 7, preparing a P-type metal electrode on the transparent electrode, and connecting the P-type metal electrodes of each row of light-emitting pixel units together.
In the step S1, the substrate is one of silicon, sapphire, silicon carbide and gallium nitride, and the thickness of the N-type GaN is 2-4 μm; the thickness of the quantum well active region is 200 nm-300 nm, and the thickness of the P-type GaN is 70-150 nm; the quantum well active region is formed by alternately circulating InGaN layers and GaN layers, and is grown with N-type GaN, and the preparation method of the quantum well active region and the P-type GaN is MOCVD growth.
In step S5, indium Tin oxide ito (indium Tin oxide) is used as the transparent electrode.
In the steps S4 and S7, SiO is used for the insulating layer a and the insulating layer b2、SiNxThe preparation method of the insulating layer is a plasma enhanced chemical vapor deposition method;
in the steps S6 and S7, Ti/Al/Ti/Au, Ni/Al and the like are used as the N-type metal electrode and the P-type metal electrode, and the preparation method is an electron beam evaporation method.
Drawings
FIG. 1 is a top view of a prepared Micro-LED array chip with an n x m transparent electrode structure;
FIG. 2 is a cross-sectional view of FIGS. 1A-A;
FIG. 3 is a cross-sectional view of a single emissive pixel cell of FIG. 2;
FIG. 4 is a 3D architecture diagram of a single light emitting pixel cell of FIG. 2
FIG. 5 is a 3D structure diagram of a prepared Micro-LED array chip of a 3X 3 transparent electrode structure;
description of reference numerals:
1. a light emitting array; 2. a substrate; 3. n-type GaN; 4. a quantum well active region; 5. p-type GaN; 6. a transparent electrode ITO; 7. an insulating layer a; 8. a P-type metal electrode; 9. an N-type metal electrode; 10. a pixel unit deep isolation groove; 11. a light emitting pixel unit; 12. a step; 13. an insulating layer b; 14. the rear side of the step; 15. the left side of the step; 16. the front side of the step; 17. the right side of the step.
Detailed Description
In order to make the technical problems and technical solutions to be solved by the present invention clearer, the following detailed description is made with reference to the accompanying drawings.
Referring to fig. 1, fig. 2 is a Micro-LED array of a transparent electrode structure, including:
a substrate 2;
an N-type GaN 3 prepared on the substrate 2;
a quantum well active region 4 prepared on the N-type GaN 3;
the P-type GaN 5 is prepared on the quantum well active region 4;
a step 12 formed by etching the epitaxial material to the N-type GaN;
the transparent electrode ITO 6 is prepared on the P-type GaN, the side wall of the step and the N-type GaN;
an N-type metal electrode 9 prepared on the N-type GaN;
the P-type metal electrode is prepared on the transparent electrode on the N-type GaN;
the pixel unit deep isolation groove 10 is used for etching the epitaxial material to the substrate so as to electrically isolate the Micro-LED pixel units;
the metal electrode is Ti/Al/Ti/Au, Ni/Al, etc., the substrate is one of silicon, sapphire, silicon carbide and gallium nitride, and the insulating layer is SiO2、SiNxOne of polyimide insulating and conducting layer
The following details of the Micro-LED array with transparent electrode structure and the preparation thereof are described in conjunction with fig. 2, fig. 3, and fig. 4, and the method is as follows:
s1, sequentially growing N-type GaN 3 (with the thickness of 2 microns) and a quantum well active region 4 (with the thickness of 250nm) on a sapphire substrate 2 by an MOCVD method, wherein the quantum well active region is formed by alternately and circularly forming an InGaN layer (2nm) and a GaN layer (10nm) and forming a P-type GaN 5 (with the thickness of 100nm) to obtain an LED epitaxial material, then respectively cleaning twice with acetone and absolute ethyl alcohol to remove surface organic substances, and finally washing with deionized water for a plurality of times.
S2, using a PD2100 positive photoresist as an ICP etching mask on the epitaxial material to protect an area which does not need etching, and etching the epitaxial wafer to the N-type GaN 3 through an ICP dry method to form a step 12;
s3, again using photoresist or photoresist plus SiO on the epitaxial wafer2Protecting the area which does not need to be etched by using the mask, and etching the epitaxial wafer to the sapphire substrate by an ICP dry method to form a pixel unit deep isolation groove 10, wherein the size of the light-emitting pixel unit is 60 micrometers multiplied by 60 micrometers, and the size of the isolation groove is 4 micrometers;
s4, preparing a layer of SiO on the epitaxial material by PECVD (plasma enhanced chemical vapor deposition)2An insulating layer is coated in a spinning mode, photoresist in a region needing to be corroded is removed through exposure and development, the unnecessary insulating layer is corroded through wet etching, and the insulating layer b 13 is left;
s5, sputtering the transparent electrode ITO, then spin-coating photoresist, exposing and developing to remove the photoresist in the area needing to be corroded, corroding the unnecessary transparent electrode ITO by a wet method, and annealing for 8min at 580 ℃;
s6, photoresist is coated in a spinning mode, photoresist in a region where an N-type metal electrode needs to be prepared is removed through exposure and development, then the N-type metal electrode 9 is prepared through an electron beam evaporation method, good ohmic contact is formed through rapid thermal annealing, the N-type metal electrodes of each light-emitting pixel unit are interconnected, and widening treatment is conducted to ensure the reliability of the N-type metal electrodes at a bridge portion;
s7, preparing a layer of SiO on the epitaxial material by PECVD (plasma enhanced chemical vapor deposition)2Insulating layer and then spinningCoating photoresist, removing the photoresist in the area needing to be corroded by exposure and development, and corroding the unnecessary insulating layer by a wet method to leave an insulating layer a 7;
s8, preparing a P-type metal electrode on a transparent electrode on the N-type GaN, quickly performing thermal annealing to form good ohmic contact, interconnecting the P-type metal electrodes of each light-emitting pixel unit, uniformly widening the electrode width at the climbing position of the P-type metal electrode, and preventing breakage;
finally obtaining the Micro-LED array with the transparent electrode structure.
The foregoing is only a specific embodiment of the present invention, and the above structures and embodiments are only used to help understand the method and core idea of the present invention. It will be apparent to those skilled in the art that modifications and variations can be made in the present invention without departing from the spirit or scope of the invention as defined in the appended claims.
Claims (7)
1. A Micro-LED array of transparent electrode structure, comprising a light emitting array (1) and a substrate (2); the light-emitting array (1) comprises a plurality of light-emitting pixel units (11) and a pixel unit deep isolation groove (10), wherein each light-emitting pixel unit (11) comprises N-type GaN (3), an N-type metal electrode (9), a quantum well active region (4), P-type GaN (5), a P-type metal electrode (8), a transparent electrode ITO (6), an insulating layer a (7) and an insulating layer b (13);
the upper surface (5) of the P-type GaN is completely covered by a transparent electrode ITO (6), and the P-type metal electrode (8) is positioned on the transparent electrode on the N-type GaN and does not obstruct the light from escaping from the upper surface of the P-type GaN;
the transparent electrode ITO (6) comprises three parts:
a portion located above the P-type GaN;
the part is positioned on the side wall of the step (12), covers three side walls, is a step rear side (14), a step left side (15) and a step front side (16), and is isolated from the side wall through an insulating layer b (13);
the part is positioned on the insulating layer on the N-type GaN and is used for connecting the P-type metal electrode to the transparent electrode ITO and the P-type GaN;
the insulating layer b (13) comprises two parts:
the part is positioned on the side wall of the step (12), covers the side walls of three sides, and is respectively a step rear side (14), a step left side (15) and a step front side (16) and is used for isolating the contact between the N-type GaN (3), the quantum well active region (4) and the P-type GaN (5) and the transparent electrode ITO;
the transparent electrode is positioned between the N-type GaN (3) and the transparent electrode ITO (6) and is used for preventing the transparent electrode from contacting with the N-type GaN so as to generate short circuit;
the insulating layer a (7) comprises two parts:
the P-type metal electrode is positioned between the P-type metal electrode (8) and the N-type metal electrode (9) and is in short circuit with the N-type metal electrode when the pixel units are interconnected;
and the right side (17) of the step is used for preventing the side wall from electric leakage.
2. A Micro-LED array of a transparent electrode structure according to claim 1, wherein the size of the deep isolation trench (10) of the pixel unit is between 5 μm and 10 μm, and the size of the light emitting pixel unit is between 10 μm and 100 μm.
3. A method of preparing a Micro-LED array of transparent electrode structures according to claim 1, comprising the steps of:
s1, growing N-type GaN (3), a quantum well active region (4) and P-type GaN (5) on a substrate in sequence to obtain an epitaxial material;
s2, etching the epitaxial material to the N-type GaN (3) to form a step (12);
s3, etching the epitaxial material to the substrate to form a pixel unit deep isolation groove (10);
s4, preparing an insulating layer on the epitaxial material, then spin-coating photoresist, and corroding the unnecessary insulating layer through wet etching after exposure and development to leave an insulating layer b (13);
s5, sputtering a transparent electrode, then spin-coating photoresist, and after exposure and development, corroding the unnecessary transparent electrode through wet corrosion to leave a transparent electrode (6);
s6, spin-coating a photoresist, removing the photoresist in an area needing to prepare the N-type metal electrode through exposure and development, etching by a wet method to form an N-type metal electrode window on the N-type GaN, preparing an N-type metal electrode (9), and connecting the N-type metal electrode of each light-emitting pixel unit;
s7, preparing the insulating layer again, then spin-coating the photoresist, and corroding the unnecessary insulating layer through wet corrosion after exposure and development to leave an insulating layer a (7);
and S8, preparing a P-type metal electrode (8) on the transparent electrode on the N-type GaN, and connecting the P-type metal electrode of each row of light-emitting pixel units.
4. The method according to claim 3, wherein in step S1, the substrate is one of silicon, sapphire, silicon carbide and gallium nitride, the thickness of N-type GaN is 2-4 μm, the thickness of the quantum well active region is 200-300 nm, and the thickness of P-type GaN is 70-150 nm; the quantum well active region is formed by alternately and circularly InGaN layers and GaN layers, and the preparation method of the N-type GaN, the quantum well active region and the P-type GaN is MOCVD growth.
5. The method of claim 3, wherein in step S5, the transparent electrode is made of Indium Tin Oxide (ITO) with refractive index between air and the epitaxial material.
6. The method of claim 3, wherein the steps S4 and S7 are performed by using SiO for the insulating layer a (7) and the insulating layer b (13)2、SiNxAnd the preparation method of the insulating layer is a plasma enhanced chemical vapor deposition method.
7. The method of claim 3, wherein in the steps S6 and S7, the N-type metal electrode and the P-type metal electrode are made of Ti/Al/Ti/Au or Ni/Al, and the method is electron beam evaporation.
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